Bidirectional ESD protection circuit
By combining a series diode and a bias voltage source, a bidirectional ESD protection circuit is realized, which solves the problem of unidirectional interference to integrated circuits by existing ESD protection circuits, expands the safe operating range of integrated circuits, blocks noise interference, and improves the reliability of integrated circuits.
Patent Information
- Application Number
- CN202422604565.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-28
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2034-10-28
AI Technical Summary
Existing ESD protection circuits are prone to interfering with integrated circuits when faced with negative static electricity or noise voltage, and the channels of the protection circuits are usually unidirectional, which cannot effectively protect integrated circuits.
By employing a first and second diode connected in series, combined with a bias voltage source, bidirectional ESD protection is achieved by ensuring that either diode breaks down in reverse during an electrostatic event. Furthermore, current is limited by a resistor to prevent noise interference.
It achieves effective protection of integrated circuits under positive and negative static voltages, expands the safe operating range of integrated circuits, effectively blocks noise interference, and improves the reliability of integrated circuits.
Smart Images
Figure CN223514605U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of integrated circuit technology, and more specifically, to a bidirectional electrostatic discharge (ESD) protection circuit for protecting integrated circuits. Background Technology
[0002] When an electrostatic discharge (such as a human body) comes into contact with an integrated circuit, an ESD pulse may occur. Because this ESD pulse can reach several kilovolts in a very short time, it can potentially damage the integrated circuit. Therefore, ESD protection circuitry is an indispensable part of integrated circuit design, used to protect the internal components of the chip from ESD damage and improve the reliability of the chip or system.
[0003] When an integrated circuit is coupled between two nodes, the ESD protection circuit is also coupled between the two nodes. Typically, the ESD protection circuit is an ESD diode, which provides a path to release static electricity after an ESD event. However, this static discharge path is unidirectional; when negative static voltage or noise voltage is present, the ESD diode will conduct in the forward direction, interfering with the integrated circuit.
[0004] Therefore, an ESD protection circuit is needed that can at least solve the problems caused by the aforementioned ESD protection circuits. Utility Model Content
[0005] The purpose of this disclosure is to provide a bidirectional ESD protection circuit to solve the problems in related technologies.
[0006] To achieve the above objectives, a first aspect of the present disclosure provides a bidirectional ESD protection circuit. It includes: a first diode and a second diode connected in series between a first node and a second node, wherein, in the event of an electrostatic discharge (ESD) event, either the first diode or the second diode will be reverse-biased to achieve ESD protection. The cathode of the first diode is coupled to the first node, the anode of the first diode is coupled to the anode of the second diode to form a common node, and the cathode of the second diode is coupled to the second node; a first resistor is coupled between the common node and the second node.
[0007] A second aspect of the present disclosure provides a bidirectional ESD protection circuit. It includes: a first diode and a second diode connected in series between a first node and a second node, wherein, in the event of an electrostatic discharge (ESD) event, either the first diode or the second diode will be reverse-biased to achieve ESD protection. The anode of the first diode is coupled to the first node, the cathode of the first diode and the cathode of the second diode are coupled to form a common node, and the anode of the second diode is coupled to the second node; a bias voltage source is coupled to the common node for setting a bias voltage on the common node.
[0008] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description
[0009] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings:
[0010] Figure 1 This is a bidirectional ESD protection circuit 10 shown according to an exemplary embodiment;
[0011] Figure 2 This is a bidirectional ESD protection circuit 20 shown according to yet another exemplary embodiment;
[0012] Figure 3 This is a bidirectional ESD protection circuit 30 shown according to yet another exemplary embodiment;
[0013] Figure 4 This is a bidirectional ESD protection circuit 40 shown according to yet another exemplary embodiment. Detailed Implementation
[0014] The specific embodiments of this utility model will be described in detail below. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the utility model. In the following detailed description of this utility model, numerous details are described to better understand it. However, those skilled in the art will understand that this utility model can be implemented without these specific details. To clearly illustrate this utility model, some detailed descriptions of specific structures and functions have been simplified herein. Furthermore, similar structures and functions that have been described in detail in some embodiments will not be repeated in other embodiments. Although the various terms of this utility model are described one by one in conjunction with specific exemplary embodiments, these terms should not be construed as limiting to the exemplary embodiments described herein.
[0015] Throughout this specification, references to “an embodiment,” “an embodiment,” “an example,” or “an example” mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases “in an embodiment,” “in an embodiment,” “an example,” or “an example” appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. Furthermore, specific features, structures, or characteristics can be combined in one or more embodiments or examples in any suitable combination and / or sub-combination. Moreover, those skilled in the art will understand that the accompanying drawings provided herein are for illustrative purposes and are not necessarily drawn to scale. It should be understood that when an element is referred to as “connected to” or “coupled” to another element, it can be a direct connection or coupling to the other element or there may be intermediate elements. Conversely, when an element is referred to as “directly connected to” or “directly coupled to” another element, there are no intermediate elements. The same reference numerals indicate the same elements. The term “and / or” as used herein includes any and all combinations of one or more of the associated listed items.
[0016] Figure 1 This is a bidirectional ESD protection circuit 10 illustrated according to an exemplary embodiment. For example... Figure 1 As shown, ESD protection circuit 10 is coupled between nodes A and B to protect an integrated circuit (shown as a dashed line) also coupled between nodes A and B from ESD damage. In one embodiment, the first node A exemplarily includes a feedback pad (FB pad) for providing a feedback signal representing the output voltage of the integrated circuit, while the second node B exemplarily includes a ground pad (GND pad). However, it should be understood that in other embodiments, nodes A and B can be a combination of any suitable type of pad, such as the first node A being an input pad (IN pad) for providing an input signal to the integrated circuit, a power supply pad (VCC pad) for supplying power to internal components of the integrated circuit, etc., and the second node B being a switching pad (SW pad) for coupling an inductor at the power unit output of the integrated circuit, etc. The ESD protection circuit 10 can be connected between any two pads where an ESD event may occur, or between two pads where noise coupling is not negligible.
[0017] Continue to refer to Figure 1The ESD protection circuit 10 exemplarily includes a first diode D1, a second diode D2, and a first resistor R1. The cathode of the first diode D1 is coupled to a first node A, the anode of the first diode D1 is coupled to the anode of the second diode D2, the cathode of the second diode D2 is coupled to a second node B, and the first resistor R1 is coupled between the anode of the second diode D2 and the second node B. In the event of an electrostatic discharge (ESD) event, either the first diode D1 or the second diode D2 will be reverse-broken down to achieve ESD protection. Here, an ESD event refers to a positive or negative high-voltage electrostatic discharge (VFD) occurring at either the first node A or the second node B, where the positive or negative VFD is greater than the reverse breakdown voltage of the first diode D1 and the second diode D2.
[0018] In one embodiment, assuming the first node A is a feedback pad and the second node B is a ground pad, when a positive static voltage ESD event occurs at the first node A, for example, when the first node A experiences a positive static voltage greater than 10V, the first diode D1 will be reverse-broken and secondary-broken, and the second diode D2 will also be forward-conducting. The static current flows through D1 and D2 to the second node B and is then released, without causing damage to the integrated circuit.
[0019] For example, when a negative static voltage of less than -10V appears at the first node A, the second diode D2 is reverse-biased and the first diode D1 is forward-biased. The static current is released through D1 and D2 and the second node B, without damaging the integrated circuit.
[0020] Furthermore, when the power system experiences a sudden large current surge to ground, significant negative voltage spike noise will occur. At this time, the first diode D1 may be forward-biased. Resistor R1 can limit the current capability of ESD protection circuit 10. That is to say, even if the first diode D1 is forward-biased, the current flowing into the integrated circuit is limited, and the noise will not cause significant interference to the integrated circuit. In one embodiment, resistor R1 is in the kiloohm range.
[0021] In some embodiments, the first diode D1 and the second diode D2 can be replaced with transistors. Figure 2 Another exemplary bidirectional ESD protection circuit 20 is shown. Compared to bidirectional ESD protection circuit 10, bidirectional ESD protection circuit 20 replaces the first diode D1 and the second diode D2 with two transistors M1 and M2. The first transistor M1 and the second transistor M2 each have a source, a drain, and a gate. The source and gate of the first transistor M1 are coupled together, and the source and gate of the second transistor M2 are coupled together. The cathode of the body diode D10 between the drain and source of the first transistor M1 is coupled to the first node A, and the cathode of the body diode D20 between the drain and source of the second transistor M2 is coupled to the second node B.
[0022] exist Figure 2In the illustrated embodiment, the first transistor M1 and the second transistor M2 are schematically represented as gate-grounded N-type metal-oxide-semiconductor devices (GGNMOS). In this case, the drain of the first transistor M1 is coupled to a first node A, the source of the first transistor M1 and the source of the second transistor M2 are coupled to form a common node C, the drain of the second transistor M2 is coupled to a second node B, and a first resistor R1 is coupled between the common node C and the second node B. The drain-body junction formed between the body region and the drain D of the first transistor M1 is the body diode D10, and the drain-body junction formed between the body region and the drain D of the second transistor M2 is the body diode D20.
[0023] It is understandable that the first transistor M1 and the second transistor M2 can also be any other suitable type of transistor. For example, when the first transistor M1 and the second transistor M2 are P-type MOS transistors, the source of the first PMOS transistor M1 will be coupled to the first node A, the drain of the first PMOS transistor M1 and the drain of the second PMOS transistor M2 will be coupled to form a common node C, and the source of the second PMOS transistor M2 will be coupled to the second node B. This allows the cathode of the body diode D10 to be coupled to the first node A, and the cathode of the body diode D20 to be coupled to the second node B.
[0024] In this embodiment, a first resistor R1 is used to couple between the common node C and the second node B of the first transistor M1 and the second transistor M2. This also prevents the gates of the first transistor M1 and the second transistor M2 from floating, ensuring that the body diodes D10 and D20 have normal reverse breakdown voltages.
[0025] The working principle of the bidirectional ESD protection circuit 20 is similar to that of the bidirectional ESD protection circuit 10. For example, if a static voltage greater than 10V appears at the first node A, the body diode D10 will break down in reverse and in the second stage, while the body diode D20 will conduct in the forward direction. The static current will flow through the body diodes D10 and D20 to the second node B and be released.
[0026] For example, when a static voltage of less than -10V appears at the first node A, the body diode D20 will undergo reverse junction breakdown and secondary breakdown, while the body diode D10 will conduct in the forward direction. The static voltage will then flow through the body diode D10 and the body diode to the second node B and be released.
[0027] Similarly, in Figure 2 In this embodiment, if noise interference occurs at the second node B, causing the body diode D10 to conduct, the current flowing into the integrated circuit is limited due to the presence of resistor R1, so the noise will not cause significant interference to the integrated circuit.
[0028] exist Figure 1 and Figure 2 In the illustrated embodiment, the safe operating range of the integrated circuit is -Von to Vbv, where Von is the forward voltage drop of the diode and Vbv is the reverse breakdown voltage of the diode. In some embodiments, it is desirable for the voltage variation threshold range of node A to be wider, or for the safe operating range to be more flexibly adjustable. Figure 3 One embodiment illustrates a bidirectional ESD protection circuit 30, which can further optimize the safe operating range of integrated circuits.
[0029] refer to Figure 3 The ESD protection circuit 30 exemplarily includes a first diode D1, a second diode D2, and a bias voltage source VDD. The anode of the first diode D1 is coupled to a first node A, the cathode of the first diode D1 is coupled to the cathode of the second diode D2 to form a common node C, the anode of the second diode D2 is coupled to a second node B, and the bias voltage source VDD is coupled to the common node C, with a bias voltage VREF set on the common node C.
[0030] In one embodiment, the bias voltage VREF provided by the bias voltage source is a positive voltage, which is less than the reverse breakdown voltage Vbv of the diode. When an electrostatic discharge (ESD) event occurs, either the first diode D1 or the second diode D2 will be reverse-broken down to achieve ESD protection. Similarly, an ESD event here refers to a positive or negative high-voltage ESD event occurring at the first node A or the second node B, where the positive or negative ESD high voltage is greater than the reverse breakdown voltage of the first diode D1 and the second diode D2.
[0031] In one embodiment, assume that the first node A is a feedback pad and the second node B is a ground pad. When the voltage VA of the first node A is greater than the sum of the bias voltage VREF (e.g., 4V) and the conduction threshold of the first diode D1 (e.g., 0.7V), i.e., VA>4.7V, the first diode D1 conducts, and the first node A is connected to ground through D1, R2 and the bias voltage source. The integrated circuit coupled between node A and node B cannot work properly. When a positive static voltage ESD event occurs at the first node A, for example, when the first node A experiences a positive static voltage greater than the diode breakdown voltage Vbv (e.g., 10V), the first diode D1 conducts in the forward direction, and the second diode D2 is reverse-broken and undergoes secondary breakdown. The static current flows through D1 and D2 to the second node B and is released, thereby providing ESD protection for the integrated circuit.
[0032] When a negative electrostatic voltage less than VREF-Vbv appears at the first node A, i.e., VA<-6V, the first diode D1 is reverse-broken and secondary-broken, the second diode D1 is forward-biased, and the electrostatic current is released through D1 and D2 and the second node B, thereby providing ESD protection for the integrated circuit.
[0033] Furthermore, even if noise interference occurs at the second node B, as long as the bias voltage VREF is set appropriately to ensure that the first diode D1 is reverse-biased and cut off, the noise voltage will not be introduced into the integrated circuit. Therefore, the safe operating range of the integrated circuit becomes (VREF-Vbv)~(VREF+Von), and the operating range of the integrated circuit can be flexibly adjusted according to the value of the bias voltage VREF.
[0034] exist Figure 3 In the illustrated embodiment, if the provided bias voltage VREF fluctuates significantly, a second resistor R2 can be added to the ESD protection circuit to prevent the parasitic capacitance in the line from significantly affecting the safe operating range when the bias voltage VREF fluctuates. The bias voltage source is coupled to the common node C through the second resistor R2.
[0035] and Figure 2 The illustrated embodiment is similar. Figure 3 In the illustrated embodiment, the first diode D1 and the second diode D2 can be replaced with transistors. See also Figure 4 This is another exemplary bidirectional ESD protection circuit 40. Compared to the bidirectional ESD protection circuit 30, the bidirectional ESD protection circuit 40 can also use transistors M1 and M2 to replace the first diode D1 and the second diode D2. Similarly, the first transistor M1 and the second transistor M2 each have a source, a drain, and a gate. The source and gate of the first transistor M1 are coupled together, and the source and gate of the second transistor M2 are coupled together. The anode of the body diode D10 between the drain and source of the first transistor M1 is coupled to the first node A, and the anode of the body diode D20 between the drain and source of the second transistor M2 is coupled to the second node B.
[0036] Furthermore, in Figure 4 In the illustrated embodiment, the first transistor M1 and the second transistor M2 can be schematically represented as GGNMOS. In this case, the source of the first transistor M1 is coupled to the first node A, the drain of the first transistor M1 and the drain of the second transistor M2 are coupled to form a common node C, and the source of the second transistor M2 is coupled to the second node B. A bias voltage source and a second resistor R2 are connected in series and coupled between the common node C and the second node B. The drain-body junction formed between the body region and the drain D of the first transistor M1 is the body diode D10, and the drain-body junction formed between the body region and the drain D of the second transistor M2 is the body diode D20.
[0037] The working principles of the bidirectional ESD protection circuit 40 and the bidirectional ESD protection circuit 30 are similar. When an electrostatic event occurs, either the body diode D10 or the body diode D20 will be reverse broken down to achieve ESD protection.
[0038] In addition, similarly, when VA > VREF + Von, the body diode D10 conducts, and the first node A is connected to the ground through D10, the second resistor R2 and the bias voltage source, and the integrated circuit coupled between the node A and the node B cannot work properly. When VA > Vbv, the body diode D10 conducts forward, the body diode D20 is reverse broken down and secondary broken down, and the static current flows through D1 and D2 to the second node B and is released, thereby providing ESD protection to the integrated circuit. When VA < VREF - Vbv, the body diode D10 is reverse broken down and secondary broken down, and the body diode D20 conducts forward, and the static current is released through the body diode D10, the body diode D20 and the second node B, thereby providing ESD protection to the integrated circuit. The safe operating range of the integrated circuit is still (VREF - Vbv) ~ (VREF + Von), which can be flexibly adjusted according to the value of the bias voltage VREF, and the noise is blocked outside the integrated circuit. It can be understood that in other embodiments of the present invention, the transistor can be any other suitable transistor type, such as a P-type MOS transistor, etc.
[0039] The preferred embodiments of the present disclosure have been described in detail above in conjunction with the accompanying drawings. However, the present disclosure is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all fall within the protection scope of the present disclosure. In addition, it should be noted that in the above specific embodiments, the various specific technical features described can be combined in any suitable manner without conflict. To avoid unnecessary repetition, the present disclosure will not separately describe various possible combination manners. In addition, any combination can be made between various different embodiments of the present disclosure as long as it does not violate the idea of the present disclosure, and it should also be regarded as the content disclosed by the present disclosure.
Claims
1. A bidirectional ESD protection circuit, characterized in that, include: A first diode and a second diode are connected in series between a first node and a second node. When an electrostatic event occurs, either the first diode or the second diode will be reverse-broken down to achieve ESD protection. The cathode of the first diode is coupled to the first node, the anode of the first diode is coupled to the anode of the second diode to form a common node, and the cathode of the second diode is coupled to the second node. The first resistor is coupled between the common node and the second node.
2. The bidirectional ESD protection circuit according to claim 1, characterized in that, The first transistor is used instead of the first diode, and the second transistor is used instead of the second diode; The first transistor and the second transistor each have a source, a drain, and a gate. The source and gate of the first transistor are coupled together, and the source and gate of the second transistor are coupled together. The cathode of the body diode between the drain and source of the first transistor is coupled to the first node, and the cathode of the body diode between the drain and source of the second transistor is coupled to the second node.
3. The bidirectional ESD protection circuit according to claim 2, characterized in that, The first crystal and the second transistor include GGNMOS transistors; The drain of the first transistor is coupled to the first node, the source of the first transistor and the source of the second transistor are coupled to form a common node, and the drain of the second transistor is coupled to the second node. The first resistor is coupled between the common node and the second node.
4. The bidirectional ESD protection circuit according to claim 1, characterized in that, The second node includes a grounding pad.
5. A bidirectional ESD protection circuit, characterized in that, include: A first diode and a second diode are connected in series between a first node and a second node. When an electrostatic event occurs, either the first diode or the second diode will be reverse-broken down to achieve ESD protection. The anode of the first diode is coupled to the first node, the cathode of the first diode is coupled to the cathode of the second diode to form a common node, and the anode of the second diode is coupled to the second node. A bias voltage source, coupled to the common node, is used to set a bias voltage on the common node.
6. The bidirectional ESD protection circuit according to claim 5, characterized in that, The bias voltage is a positive voltage, and the bias voltage is less than the reverse breakdown voltage of the first diode and the second diode.
7. The bidirectional ESD protection circuit according to claim 5, characterized in that, The second node includes the ground pad of the integrated circuit.
8. The bidirectional ESD protection circuit according to claim 5, characterized in that, The bidirectional ESD protection circuit further includes: The second resistor is used to couple the bias voltage source to the common node.
9. The bidirectional ESD protection circuit according to claim 5, characterized in that, The first transistor is used instead of the first diode, and the second transistor is used instead of the second diode; The first transistor and the second transistor each have a source, a drain, and a gate. The source and gate of the first transistor are coupled together, and the source and gate of the second transistor are coupled together. The anode of the body diode between the drain and source of the first transistor is coupled to the first node, and the anode of the body diode between the drain and source of the second transistor is coupled to the second node.
10. The bidirectional ESD protection circuit according to claim 9, characterized in that, The first crystal and the second transistor include GGNMOS transistors; The source of the first transistor is coupled to the first node, the drain of the first transistor and the drain of the second transistor are coupled to form a common node, and the source of the second transistor is coupled to the second node. The bias voltage source is coupled to the common node and is used to set the bias voltage on the common node.