Interface circuit and electronic equipment
By introducing a USB interface chip and a serial communication connection between the chip and the SOC chip in the electronic device, the problem of not being able to directly read the internal logs in the electronic device during fault analysis is solved. This enables efficient acquisition of log information without disassembling the device, thus improving the efficiency of fault analysis.
Patent Information
- Application Number
- CN202423026954.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2034-12-06
AI Technical Summary
In the existing technology, electronic devices cannot directly communicate with the internal SOC chip via serial port after assembly. This requires disassembling the device to obtain log files during fault analysis, which may result in the fault being unreproducible and increase ESD risk and material costs.
By introducing a serial communication connection between a USB interface chip and a SOC chip in electronic devices, it is possible to directly read the internally stored work log information through the USB interface and transmit serial communication data using the USB communication protocol.
It enables direct reading of internal storage work log information without disassembling the device, avoiding situations where faults cannot be reproduced, improving fault analysis efficiency and reducing the risk of disassembly.
Smart Images

Figure CN223526705U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of electronics, and particularly relates to an interface circuit and an electronic device. BACKGROUND
[0002] In the prior art, during the development or trial production stage of an electronic device, a universal asynchronous receiver / transmitter (UART) communication serial port is usually used to read log files (task logs) in the internal system on chips (SOC) or to perform burning, so as to analyze and improve the running faults of the electronic product. However, after the electronic device is assembled, the whole machine only has a USB interface used for connecting an external charger for power supply, and cannot directly perform serial port communication with the SOC chip in the electronic device. If the log files are to be obtained, the whole machine needs to be disassembled first, and then the log files are obtained through serial port communication. However, disassembly may damage the product, and after disassembly, the fault cannot be reproduced. Directly reserving an external interface for obtaining log files needs to be simultaneously modified in the structure design of the whole machine, which increases the difficulty of electronic design, and also increases the ESD risk and material cost. CONTENT OF THE UTILITY MODEL
[0003] The main purpose of the present application is to provide an interface circuit and an electronic device, and aims to solve the technical problem of how to read the internal stored work log information without disassembling the electronic product.
[0004] To achieve the above purpose, the present application provides an interface circuit, which comprises a USB interface chip and an SOC chip.
[0005] The first data receiving pin and the first data sending pin of the USB interface chip are connected to a USB female head, and the USB female head is used for connecting a USB male head of an external device;
[0006] The second data receiving pin of the USB interface chip is connected to a serial port sending pin of the SOC chip, and the second data sending pin of the USB interface chip is connected to a serial port receiving pin of the SOC chip;
[0007] The SOC chip is used for transmitting the internal stored work log information to the USB interface chip in a serial port communication mode;
[0008] The USB interface chip is used for transmitting the work log information to the external device in a USB communication protocol when the work log information is received.
[0009] The application provides an interface circuit and electronic equipment, the interface circuit comprises a USB interface chip and a SOC chip; a first data receiving pin and a first data sending pin of the USB interface chip are connected to a USB female head, and the USB female head is used for connecting a USB male head of an external device; a second data receiving pin of the USB interface chip is connected to a serial port sending pin of the SOC chip, and a second data sending pin of the USB interface chip is connected to a serial port receiving pin of the SOC chip; the SOC chip is used for transmitting internal stored work log information to the USB interface chip in a serial port communication mode; and the USB interface chip is used for transmitting the work log information to the external device in a USB communication protocol when the work log information is received. The USB communication line between the USB interface chip and the SOC chip is modified into a serial port communication line, so that the SOC chip can transmit the internal stored work log information to the external device with the USB male head through the USB interface chip and the USB female head in a serial port communication mode. In the above manner, the external device can access the whole machine through the USB interface, and the internal stored work log information of the whole machine can be directly read in a serial port communication mode, so that a technician can analyze product faults without disassembling the machine. The situation that the fault cannot be reproduced due to disassembly during product fault analysis is avoided, and the working efficiency of the user in fault analysis is greatly improved. BRIEF DESCRIPTION OF DRAWINGS
[0010] The drawings incorporated into the specification and constituting a part of the specification show embodiments consistent with the application and, together with the specification, serve to explain the principles of the application.
[0011] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, for those skilled in the art, other drawings can also be obtained without creative labor.
[0012] Figure 1 A structural connection diagram provided for the interface circuit embodiment one of the application;
[0013] Figure 2 A circuit connection diagram provided for the interface circuit embodiment two of the application;
[0014] Figure 3 A circuit connection diagram provided for the interface circuit embodiment three of the application.
[0015] The purpose implementation, functional characteristics and advantages of the application will be further explained with reference to the embodiments and the drawings. DETAILED DESCRIPTION
[0016] It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
[0017] In order to better understand the technical solutions of the present application, the following will be described in detail in combination with the drawings and specific embodiments.
[0018] The present application proposes an interface circuit of the first embodiment, please refer to Figure 1 , the interface circuit comprises: a USB interface chip 10 and a SOC chip 20;
[0019] The first data receiving pin RX1 and the first data transmitting pin TX1 of the USB interface chip 10 are connected to the USB female head 30, and the USB female head 30 is used to connect the USB male head 50 of the external device 40;
[0020] The second data receiving pin RX2 of the USB interface chip 10 is connected to the serial port transmitting pin UTX of the SOC chip 20, and the second data transmitting pin TX2 of the USB interface chip 10 is connected to the serial port receiving pin URX of the SOC chip 20;
[0021] The SOC chip 20 is used to transmit the internal stored work log information to the USB interface chip 10 in a serial port communication mode;
[0022] The USB interface chip 10 is used to transmit the work log information to the external device 40 in a USB communication protocol when receiving the work log information.
[0023] It should be noted that the USB communication protocol refers to a serial communication standard mode based on the USB interface and the USB communication bus, which is realized based on the polling principle, and the communication end will constantly check whether the input / output device is ready for data transmission, and when it is determined that the current is ready for data transmission, the data stored on one side will be transmitted to the other side in the form of differential signals. The USB communication protocol supports a variety of different speed levels, such as USB1.1, USB2.0, USB3.0, etc., and the data transmission rate can reach 12Mbps to 10Gbps, even 20Gbps and above, and the data transmission efficiency is high.
[0024] It should be understood that in the present embodiment, the USB female head 30 is a hardware plug conforming to the USB communication protocol, and the USB male head 50 is a hardware socket corresponding to the USB female head 30. When the USB male head 50 is inserted into the USB female head 30, it can be considered that a bidirectional communication connection relationship is established between the two sides through the USB communication protocol, and information interaction can be performed between the two sides. (The dashed line between the USB male head 50 and the USB female head 30 in the figure only represents that a connection relationship can exist between the two, and is not used to limit the specific number of connection lines; similarly, the connection line between the external device 40 and the USB male head 50 only represents that a connection relationship exists between the two, and is not used to limit the specific number of lines) The USB interface chip 10 refers to a chip that can convert the data, signals or information transmitted through the USB communication protocol and the data, signals and information transmitted through the serial communication protocol. It also supports multiple charging protocols and is mainly used for data, signal or information transmission and power supply. The SOC chip 20 refers to a system-on-chip, which is highly integrated internally and has CPU, clock circuit, timer, built-in memory and other functional units, and can complete various complex calculations and task processing work.
[0025] It should be noted that the external device refers to an electronic device that can perform information interaction, which has a USB male head 50 and can be connected with the USB female head 30, and when connected, information interaction is performed with the USB interface chip 10 through the USB communication protocol. In the present embodiment, the USB female head 30 includes multiple functional leads, which are respectively connected with a part of the functional pins of the USB interface chip 10. The functional pins of the USB interface chip 10 at least include a first data receiving pin RX1, a first data sending pin TX1, a second data receiving pin RX2 and a second data sending pin TX2. Among them, the first data receiving pin RX1 and the first data sending pin TX1 are connected with the corresponding functional leads of the USB female head 30, so that the USB interface chip 10 can receive the signals, information, instructions or data sent by the external device 40 connected with the USB female head 30 through the first data receiving pin RX1, and also can make the USB interface chip 10 send signals, information, instructions or data to the external device 40 connected with the USB female head 30 through the first data sending pin TX1; and the second data receiving pin RX2 and the second data sending pin TX2 are respectively connected with the serial port sending pin UTX and the serial port receiving pin URX of the SOC chip 20, so that the USB interface chip 10 can transmit corresponding signals, information, instructions or data to the serial port receiving pin URX of the SOC chip 20 through the second data sending pin TX2, and also can make the USB interface chip 10 receive the corresponding signals, information, instructions or data transmitted by the serial port sending pin UTX of the SOC chip 20 through the second data receiving pin RX2.
[0026] It is worth noting that in the embodiment, the USB female head 30 (or the USB interface chip 10) and the external device 40 interact information through the USB communication protocol, and the USB interface chip 10 and the SOC chip 20 interact information through the serial communication protocol.
[0027] It is easy to understand that in the embodiment, the work log information refers to various information recorded by the SOC chip 20 in the running process, including the working state, abnormal error, performance data and the like of the SOC chip 20, mainly used for the chip developers, testers and maintenance personnel to understand the running condition of the SOC chip 20, and is an important basis for assisting fault diagnosis and performance optimization. In the specific implementation, when the USB male head 50 is inserted into the USB female head 30 of the external device 40, the USB interface chip 10 and the external device 40 can interact information through the USB communication protocol, and the USB interface chip 10 can interact information with the SOC chip 20 through the serial communication protocol. At this time, the SOC chip 20 can first transmit the internally stored work log information to the USB interface chip 10 through the serial communication protocol, and then transmit the work log information to the external device 40 through the USB communication protocol by the USB interface chip 10. So that the technician can directly obtain the work log information of the internal SOC chip 20 of the electronic product through the external device 40 without disassembling the finished product of the current electronic product, thereby facilitating the technician to diagnose the fault of the whole machine of the electronic product according to the work log information. Since the work log information can be obtained without disassembling, the situation that the fault cannot be reproduced due to disassembling in the traditional whole machine fault diagnosis is avoided, and the time spent on disassembling is also reduced, which greatly improves the efficiency of the technician in fault diagnosis and analysis.
[0028] The application provides an interface circuit, which comprises a USB interface chip and a SOC chip; a first data receiving pin and a first data sending pin of the USB interface chip are connected to a USB female head, which is used for connecting a USB male head of an external device; a second data receiving pin of the USB interface chip is connected to a serial port sending pin of the SOC chip, and a second data sending pin of the USB interface chip is connected to a serial port receiving pin of the SOC chip; the SOC chip is used for transmitting internally stored work log information to the USB interface chip in a serial port communication mode; and the USB interface chip is used for transmitting the work log information to the external device in a USB communication protocol when the work log information is received. The USB communication line between the USB interface chip and the SOC chip is modified into a serial port communication line, so that the SOC chip can transmit the internally stored work log information to the external device with the USB male head through the USB interface chip and the USB female head in a serial port communication mode. In the above mode, the external device can access the whole machine through the USB interface, and the work log information internally stored in the whole machine can be directly read in a serial port communication mode, so that a technician can analyze product faults without disassembling the machine. The situation that the fault cannot be reproduced due to disassembly during product fault analysis is avoided, and the working efficiency of the user in fault analysis is greatly improved.
[0029] Based on the first embodiment of the application, the same or similar contents as the above embodiment one can be referred to the above introduction, and will not be described in detail. On this basis, please refer to Figure 2 The sending preparation pin UTX_R of the SOC chip 20 is connected to the first signal transmission pin TR1 of the USB interface chip 10.
[0030] The SOC chip 20 is further used for transmitting the work log information to the USB interface chip 10 in a first preset time sequence when the sending preparation signal sent by the USB interface chip 10 is received.
[0031] It should be noted that in the embodiment, the USB interface chip 10 further has other functional pins, for example, the first signal transmission pin TR1. Correspondingly, the SOC chip 20 further has the sending preparation pin UTX_R connected to the first signal transmission pin TR1. When the sending preparation pin UTX_R of the SOC chip 20 receives the low-level sending preparation signal, it can be determined that the USB interface chip 10 has prepared to receive the work log information sent by the SOC chip 20, and at this time, the work log information can be transmitted to the USB interface chip 10 through the serial port sending pin UTX.
[0032] It is easy to understand that the work log information is generally large, and the entire work log information cannot be directly transmitted to the USB interface chip 10 at the same time. In the embodiment, the sending preparation signal can be intermittently sent to the SOC chip 20 at a first preset time sequence, so that the SOC chip 20 also intermittently sends the work log information to the USB interface chip 10 at the first preset time sequence until the work log information is completely transmitted. The communication mode between the SOC chip 20 and the USB interface chip 10 can be a serial communication mode. In each process of transmitting data from the SOC chip 20 to the USB interface chip 10, a low level of 1 bit needs to be sent first to indicate the start of data transmission. Then 8 bits of data bits are sent, the lowest bit is sent first, and the highest bit is sent last. After the transmission of the 8-bit data bit is completed, a 1-bit parity bit is sent for error detection. Finally, a 1-bit stop bit is sent, which is represented by a high level. The first preset time sequence refers to the arrangement order of the interval time corresponding to whether the "continue to transmit data" operation needs to be performed in the interval corresponding to the completion of each two data transmission in the case of continuously completing the above process. For example, the work log information can be divided into a plurality of data segments, and each x time interval can complete the transmission of a data segment. The y time interval is needed between the transmission of each two data segments to confirm whether the next data segment needs to be transmitted. Therefore, the actual complete process of transmitting a data segment needs to spend x+y time, and the arrangement order of continuously performing the above operation relative to the system clock (the reference clock of the entire communication system) is the first preset time sequence.
[0033] Further, in the embodiment, the burning detection pin BR of the USB interface chip 10 is connected to the USB female head 30;
[0034] The receiving preparation pin URX_R of the SOC chip 20 is connected to the second signal transmission pin TR2 of the USB interface chip 10;
[0035] The USB interface chip 10 is also used for sending the receiving preparation signal and the burning information to the SOC chip 20 when receiving the burning preparation signal and the corresponding burning information sent by the external device 40;
[0036] The SOC chip 20 is also used for receiving the burning information at the second preset time sequence when receiving the receiving preparation signal.
[0037] It should be understood that the external device 40 can also be an electronic device with a burning function, such as a burner. In the embodiment, the external device 40 can generate burning information and a burning preparation signal. The burning preparation signal refers to a specific electrical signal prompting the USB interface chip 10 to transmit the burning information to the SOC chip 20 for burning, or is understood as a specific electrical signal used to prompt the USB interface chip 10 that it will soon need to receive the burning information, which can be a high-level signal, a low-level signal, or other forms of electrical signals, and the specific form is related to the model of the SOC chip 20. The burning information refers to the operating system, application program, configuration parameter and other related important information that needs to be written into the storage part of the SOC chip 20, which can adjust the function and performance of the SOC chip 20.
[0038] It is easy to understand that the USB interface chip 10 also has a burning detection pin BR connected to the corresponding lead of the USB female head 30; the USB interface chip 10 also has a second signal transmission pin TR2 connected to the receiving preparation pin URX_R of the SOC chip 20.
[0039] In specific implementation, when the USB interface chip 10 receives the burning preparation signal transmitted by the external device 40 through the burning detection pin BR, it can receive the burning information transmitted by the external device through the first data receiving pin RX1. When the burning information is received, the USB interface chip 10 sends a corresponding low-level receiving preparation signal to the receiving preparation pin URX_R of the SOC chip 20 through the second signal transmission pin TR2, so that the SOC chip 20 is ready to receive the burning information. Subsequently, the USB interface chip 10 also transmits the burning information to the serial port data receiving pin of the SOC chip 20 through the second data sending pin TX2, so that the SOC chip 20 obtains the corresponding burning information and performs burning.
[0040] It is worth noting that in the embodiment, since the burning information is also relatively large, it is also required to be transmitted intermittently between the external device 40 and the USB interface chip 10 and between the USB interface chip 10 and the SOC chip 20 in a specific timing. Among them, the burning information is transmitted between the USB interface chip 10 and the SOC chip 20 in a second preset timing, and the burning information is transmitted between the external device 40 and the USB interface chip 10 in a third preset timing. Similar to the first preset timing described above, the second preset timing refers to the arrangement order of the interval time required to continuously complete the operation of "transmitting the burning information in multiple data segments from the USB interface chip 10 to the SOC chip 20 in a serial communication manner" relative to the system clock. Correspondingly, the third preset timing refers to the arrangement order of the interval time required to continuously complete the operation of "transmitting the burning information in multiple data segments from the external device 40 to the USB interface chip 10 in a USB communication protocol" relative to the system clock.
[0041] Further, in the embodiment, the interface circuit further comprises a memory 60;
[0042] The memory 60 is connected with the SOC chip 20 through an SPI bus;
[0043] The memory 60 is used for storing work log information;
[0044] The SOC chip 20 is further used for transmitting the work log information stored in the memory 60 to the USB interface chip 10 in a serial communication manner when reading the work log information.
[0045] It should be noted that in the embodiment, when the information (including work log information, etc.) required to be stored in the electronic product is too much, the SOC chip 20 can be externally connected with another memory 60 through the SPI bus, so that the work log information of the SOC chip 20 can be stored in the memory 60, thereby saving the internal storage space of the SOC chip 20. Among them, the memory 60 can be a large-capacity high-speed Flash memory 60, which can quickly store a large amount of information or data.
[0046] It is easy to understand that in the embodiment, if the external device 40 needs to read the work log information of the SOC chip 20, the SOC chip 20 can first read the work log information from the memory 60 through the SPI communication protocol, then transmit the work log information to the USB interface chip 10 through the serial transmission pin UTX in a serial communication protocol, and finally transmit the work log information to the external device 40 through the USB interface chip 10 in a USB communication protocol.
[0047] Further, in the embodiment, the burning detection pin BR of the USB interface chip 10 is also connected to the burning detection pin of the memory 60;
[0048] The SOC chip 20 is further configured to transmit the burning information to the memory 60 when the burning information is received.
[0049] The memory 60 is further configured to store the burning information when the burning preparation signal and the burning information are received.
[0050] It is easy to understand that, in the embodiment, since the SOC chip 20 and the memory 60 are connected through the SPI bus, the SOC chip 20 and the memory 60 can perform bidirectional transmission of information. In a specific implementation, when the SOC chip 20 receives the burning information, the SOC chip 20 can transmit the burning information to the memory 60 in the SPI communication protocol, so that the memory 60 performs burning based on the received burning information.
[0051] It is worth noting that, in the embodiment, the burning detection pin of the memory 60 is also used to connect a communication line in the SPI bus. The thicker connection line in the figure represents the SPI bus, and a thinner connection line drawn from the SPI bus separately represents the burning detection pin BR of the USB interface chip 10 and the burning detection pin of the memory 60.
[0052] Based on the first embodiment and / or the second embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those in the above-mentioned first embodiment and second embodiment can be referred to the above description, and will not be described hereinafter. On this basis, please refer to Figure 3 The interface circuit further includes a first resistor R1, a second resistor R2, and a third resistor R3.
[0053] A first end of the first resistor R1 is connected to the USB female head 30, and a second end of the first resistor R1 is connected to the burning detection pin BR of the USB interface chip 10.
[0054] A first end of the second resistor R2 is connected to the USB female head 30, and a second end of the second resistor R2 is connected to the first data receiving pin RX1 of the USB interface chip 10.
[0055] A first end of the third resistor R3 is connected to the USB female head 30, and a second end of the third resistor R3 is connected to the first data sending pin TX1 of the USB interface chip 10.
[0056] It should be noted that in the present embodiment, corresponding resistors are also connected in series between each lead of the USB female head 30 and the corresponding functional pin of the USB interface chip 10. The resistors mainly serve the functions of impedance matching, overcurrent protection, improving signal integrity, etc., and can ensure that the USB communication between the external device 40 and the USB interface chip 10 is more stable. In a specific implementation, a first resistor R1 is connected in series between the burn detection pin BR of the USB interface chip 10 and the corresponding lead of the USB female head 30, a second resistor R2 is connected in series between the first data receiving pin RX1 of the USB interface chip 10 and the corresponding lead of the USB female head 30, and a third resistor R3 is connected in series between the first data sending pin TX1 of the USB interface chip 10 and the corresponding lead of the USB female head 30.
[0057] Further, in the present embodiment, the interface circuit further comprises a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7.
[0058] The first end of the fourth resistor R4 is connected to the first signal transmission pin TR1 of the USB interface chip 10, and the second end of the fourth resistor R4 is connected to the sending preparation pin UTX R of the SOC chip 20.
[0059] The first end of the fifth resistor R5 is connected to the second signal transmission pin TR2 of the USB interface chip 10, and the second end of the fifth resistor R5 is connected to the receiving preparation pin URX R of the SOC chip 20.
[0060] The first end of the sixth resistor R6 is connected to the second data receiving pin RX2 of the USB interface chip 10, and the second end of the sixth resistor R6 is connected to the serial port sending pin UTX of the SOC chip 20.
[0061] The first end of the seventh resistor R7 is connected to the second data sending pin TX2 of the USB interface chip 10, and the second end of the seventh resistor R7 is connected to the serial port receiving pin URX of the SOC chip 20.
[0062] It should be noted that in the embodiment, corresponding resistances are also connected in series between each functional pin of the USB interface chip 10 and each corresponding functional pin of the SOC chip 20. Each resistance mainly plays the functions of impedance matching, overcurrent protection, improving signal integrity, etc., and can ensure that the serial port between the USB interface chip 10 and the SOC chip 20 is more stable. In a specific implementation, the fourth resistance R4 is connected in series between the first signal transmission pin TR1 of the USB interface chip 10 and the sending preparation pin UTX R of the SOC chip 20, the fifth resistance R5 is connected in series between the second signal transmission pin TR2 of the USB interface chip 10 and the receiving preparation pin URX R of the SOC chip 20, the sixth resistance R6 is connected in series between the second data receiving pin RX2 of the USB interface chip 10 and the serial port sending pin UTX of the SOC chip 20, and the seventh resistance R7 is connected in series between the second data sending pin TX2 of the USB interface chip 10 and the serial port receiving pin URX of the SOC chip 20.
[0063] Further, in the embodiment, the interface circuit further includes a pin socket 70.
[0064] The first pin P1 of the pin socket 70 is connected to the first data receiving pin RX1 of the USB interface chip 10, the second pin P2 of the pin socket 70 is connected to the first data sending pin TX1 of the USB interface chip 10, the third pin P3 of the pin socket 70 is connected to the second data receiving pin RX2 of the USB interface chip 10, and the fourth pin P4 of the pin socket 70 is connected to the second data sending pin TX2 of the USB interface chip 10.
[0065] It should be noted that in the embodiment, the USB interface chip 10, the SOC chip 20, the memory 60 and other elements or parts in the interface circuit can be welded into the same circuit board. In the circuit board, the connection lines between the USB female head 30, the USB interface chip 10, the SOC chip 20 and the memory 60 are covered by the surface insulating layer, and in actual situations, it is difficult to test a single line in the circuit board after welding. For this kind of situation, a pin socket 70 can be arranged on the circuit board, so that each functional pin of the USB interface chip 10 is connected to each pin of the pin socket through each line on the circuit board. In this way, the change of the electrical signal at a corresponding functional pin of the USB interface chip 10 can be obtained by separately connecting a specific pin, so that whether each functional pin of the USB interface chip 10 is faulty can be determined.
[0066] In a specific implementation, the pin female seat 70 at least has the first to fourth pin P1-P4, the first pin P1 can be connected to the first data receiving pin RX1 of the USB interface chip 10, the second pin P2 can be connected to the first data transmitting pin TX1 of the USB interface chip 10, the third pin P3 can be connected to the second data receiving pin RX2 of the USB interface chip 10, and the fourth pin P4 can be connected to the second data transmitting pin TX2 of the USB interface chip 10.
[0067] In addition, the pin female seat 70 can further include more other pins, which are respectively and one-to-one connected to the power supply pin, the burning detection pin BR, the first signal transmission pin TR1, the second signal transmission pin TR2 and other functional pins (not shown in the figure) of the USB interface chip 10, so as to facilitate the detection of the transmission function or power supply function of the electrical signal (information) of each functional pin.
[0068] Further, in the embodiment, the USB female head 30 is of Type-C type.
[0069] It is easy to understand that, in the embodiment, the USB female head 30 can adopt a female head of Type-C type in appearance. For the USB female head 30 of Type-C type, there are two lines for each function, and they are centrally symmetrically distributed, respectively corresponding to the two kinds of connection methods of reverse connection. Whether it is positive connection or reverse connection, bidirectional transmission of information can be performed. Therefore, in actual situations, each functional pin of the USB interface chip 10 connected to the USB female head 30 should have two groups (not marked in the figure).
[0070] The application also provides an electronic device adopting the interface circuit. The electronic device provided by the application embodiment can solve the technical problem of how to read the internal storage work log information without disassembling the electronic product. Compared with the prior art, the electronic device provided by the application embodiment has the same beneficial effects as the interface circuit provided by the above-mentioned embodiment, and other technical features in the electronic device are the same as those disclosed in the above-mentioned embodiment, which will not be repeated here.
[0071] The above is only the preferred embodiment of the application, and does not limit the patent scope of the application. Any equivalent structure or equivalent process transformation based on the content of the specification and drawings, or direct or indirect application in other related technical fields, is also included in the patent processing scope of the application.
Claims
1. An interface circuit, characterized by The interface circuit comprises a USB interface chip and a SOC chip; a first data receiving pin and a first data sending pin of the USB interface chip are connected to a USB female head used for connecting a USB male head of an external device; a second data receiving pin of the USB interface chip is connected to a serial port sending pin of the SOC chip, and a second data sending pin of the USB interface chip is connected to a serial port receiving pin of the SOC chip; the SOC chip is configured to transmit internal stored working log information to the USB interface chip in a serial port communication mode; the USB interface chip is configured to transmit the working log information to the external device in a USB communication protocol when the working log information is received.
2. The interface circuit of claim 1, wherein, a sending preparation pin of the SOC chip is connected to a first signal transmission pin of the USB interface chip; the SOC chip is further configured to transmit the working log information to the USB interface chip in a first preset timing when a sending preparation signal sent by the USB interface chip is received.
3. The interface circuit of claim 2, wherein, a burning detection pin of the USB interface chip is connected to the USB female head; a receiving preparation pin of the SOC chip is connected to a second signal transmission pin of the USB interface chip; the USB interface chip is further configured to send a receiving preparation signal and burning information to the SOC chip when the receiving preparation signal and the corresponding burning information sent by the external device are received; the SOC chip is further configured to receive the burning information in a second preset timing when the receiving preparation signal is received.
4. The interface circuit of claim 3, wherein, The interface circuit further comprises a memory; the memory is connected to the SOC chip through an SPI bus; the memory is configured to store the working log information; the SOC chip is further configured to transmit the working log information to the USB interface chip in the serial port communication mode when the working log information stored in the memory is read.
5. The interface circuit of claim 4, wherein, the burning detection pin of the USB interface chip is further connected to a burning detection pin of the memory; the SOC chip is further configured to transmit the burning information to the memory when the burning information is received; the memory is further configured to store the burning information when the receiving preparation signal and the burning information are received.
6. The interface circuit of claim 3, wherein, The interface circuit further comprises a first resistor, a second resistor and a third resistor; a first end of the first resistor is connected to the USB female head, and a second end of the first resistor is connected to a burning detection pin of the USB interface chip; a first end of the second resistor is connected to the USB female head, and a second end of the second resistor is connected to a first data receiving pin of the USB interface chip; a first end of the third resistor is connected to the USB female head, and a second end of the third resistor is connected to a first data sending pin of the USB interface chip.
7. The interface circuit of claim 3, wherein, The interface circuit further comprises a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor; A first end of the fourth resistor is connected to a first signal transmission pin of the USB interface chip, and a second end of the fourth resistor is connected to a sending preparation pin of the SOC chip; A first end of the fifth resistor is connected to a second signal transmission pin of the USB interface chip, and a second end of the fifth resistor is connected to a receiving preparation pin of the SOC chip; A first end of the sixth resistor is connected to a second data receiving pin of the USB interface chip, and a second end of the sixth resistor is connected to a serial port sending pin of the SOC chip; A first end of the seventh resistor is connected to a second data sending pin of the USB interface chip, and a second end of the seventh resistor is connected to a serial port receiving pin of the SOC chip.
8. The interface circuit of claim 1, wherein, The interface circuit further comprises a row pin female seat. A first row pin of the row pin female seat is connected to a first data receiving pin of the USB interface chip, a second row pin of the row pin female seat is connected to a first data sending pin of the USB interface chip, a third row pin of the row pin female seat is connected to a second data receiving pin of the USB interface chip, and a fourth row pin of the row pin female seat is connected to a second data sending pin of the USB interface chip.
9. The interface circuit of claim 1, wherein, The USB female head is of a Type-C type.
10. An electronic device, comprising: The electronic device adopts the interface circuit according to any one of claims 1-9.