Interference signal detection device

Abstract

An interference signal detection device comprises a plurality of signal interfaces, a common-mode interference detection module, a differential-mode interference detection module and a display module. Pins of the at least two signal interfaces are mutually connected and are used for being connected in series in a transmission line to be tested, the transmission line to be tested comprises a plurality of groups of twisted pairs, and one group of twisted pairs corresponds to two pins of the signal interfaces; the common-mode interference detection module is connected with the signal interface and is used for acquiring a common-mode interference signal of any group of twisted pairs and generating a first single-ended signal corresponding to the common-mode interference signal; the differential mode interference detection module is connected with the signal interface and is used for acquiring a differential mode interference signal of any group of twisted pairs and generating a second single-ended signal corresponding to the differential mode interference signal; and the display module is connected with the common-mode interference detection module and the differential-mode interference detection module and is used for displaying the first single-ended signal and the second single-ended signal.

Description

Technical Field

[0001] This application belongs to the field of line probe technology, and in particular relates to an interference signal detection device. Background Technology

[0002] In communication networks, twisted-pair cables are widely used as a transmission medium to connect various communication devices. However, in complex network environments, twisted-pair cables often encounter high-amplitude differential-mode or common-mode interference, with voltages reaching thousands of volts. Currently available probes typically require damaging the wiring, which can negatively impact the communication network. Utility Model Content

[0003] The purpose of this application is to provide an interference signal detection device that aims to solve the problem of damage to the circuit caused by traditional detection probes.

[0004] A first aspect of this application provides an interference signal detection device, comprising: a plurality of signal interfaces, wherein the pins of at least two of the signal interfaces are interconnected and used to be connected in series in a transmission line under test, the transmission line under test including a plurality of sets of twisted pairs, each set of twisted pairs corresponding to two pins of the signal interfaces; a common-mode interference detection module connected to the signal interfaces, used to acquire common-mode interference signals of any set of twisted pairs and generate a first single-ended signal corresponding to the common-mode interference signals; a differential-mode interference detection module connected to the signal interfaces, used to acquire differential-mode interference signals of any set of twisted pairs and generate a second single-ended signal corresponding to the differential-mode interference signals; and a display module connected to the common-mode interference detection module and the differential-mode interference detection module, used to display the first single-ended signal and the second single-ended signal.

[0005] In one embodiment, the common-mode interference detection module includes a common-mode signal extraction unit and a first signal processing unit; the common-mode signal extraction unit is connected to the signal interface and the first signal processing unit respectively, and is connected to ground; the common-mode signal extraction unit is used to perform voltage division on the signal transmitted by the signal interface to obtain the common-mode interference signal; the first signal processing unit is connected to the display module, and the first signal processing unit is used to perform subtraction operation on the two voltage signals of the common-mode interference signal to obtain the first single-ended signal relative to the system ground.

[0006] In one embodiment, both signal interfaces include a first pin and a second pin corresponding to one of the twisted pairs. The two first pins are connected by a first wire, and the two second pins are connected by a second wire. The common-mode signal extraction unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a sixth capacitor. The first end of the first resistor is connected to the first wire, the first end of the second resistor is connected to the second wire, the second end of the first resistor is connected to the second end of the second resistor and connected to system ground through the third resistor, the first end of the fourth resistor is connected to system ground, the second end of the fourth resistor is connected to ground through the fifth resistor, and the sixth resistor is connected in parallel with the fifth resistor. The second ends of the first resistor and the fourth resistor are respectively connected to the two input ends of the first signal processing unit. The first capacitor is connected in parallel with the first resistor, the second capacitor is connected in parallel with the second resistor, the third capacitor is connected in parallel with the third resistor, the fourth capacitor is connected in parallel with the fourth resistor, and the fifth and sixth capacitors are connected in parallel with the fifth resistor.

[0007] In one embodiment, the resistance values ​​of the first resistor, the second resistor, the fifth resistor, and the sixth resistor are equal; the resistance values ​​of the third resistor and the fourth resistor are equal; the capacitance values ​​of the first capacitor, the second capacitor, the fifth capacitor, and the sixth capacitor are equal; the capacitance values ​​of the third capacitor and the fourth capacitor are equal; and the product of the first resistor and the first capacitor is equal to the product of the third resistor and the third capacitor.

[0008] In one embodiment, the first signal processing unit includes a first voltage follower, a second voltage follower, and a first subtractor; the input terminal of the first voltage follower is connected to the second terminal of the first resistor, the input terminal of the second voltage follower is connected to the second terminal of the fourth resistor, and the output terminals of the first voltage follower and the second voltage follower are respectively connected to the two input terminals of the first subtractor.

[0009] In one embodiment, the first signal processing unit includes a first voltage follower, a second voltage follower, and a signal averager; the input terminal of the first voltage follower is connected to the second terminal of the first resistor, the input terminal of the second voltage follower is connected to the second terminal of the fourth resistor, and the output terminals of the first voltage follower and the second voltage follower are respectively connected to the input terminal of the signal averager.

[0010] In one embodiment, the differential mode interference detection module includes a differential mode signal extraction unit and a second signal processing unit; the differential mode signal extraction unit is connected to the signal interface and the second signal processing unit respectively, and the differential mode signal extraction unit is used to divide the signal transmitted by the signal interface to obtain the differential mode interference signal; the second signal processing unit is connected to the display module, and the second signal processing unit is used to perform a subtraction operation based on the two voltage signals of the differential mode interference signal to obtain the second single-ended signal.

[0011] In one embodiment, each of the two signal interfaces includes a first pin and a second pin corresponding to one of the twisted pairs. The two first pins are connected by a first wire, and the two second pins are connected by a second wire. The differential signal extraction unit includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, and a tenth capacitor. The first end of the seventh resistor is connected to the second wire, the first end of the eighth resistor is connected to the first wire, the second end of the seventh resistor is connected to system ground through the ninth resistor, and the second end of the eighth resistor is connected to system ground through the tenth resistor. The second ends of the seventh resistor and the eighth resistor are respectively connected to the two input terminals of the second signal processing unit. The seventh capacitor is connected in parallel with the seventh resistor, the eighth capacitor is connected in parallel with the eighth resistor, the ninth capacitor is connected in parallel with the ninth resistor, and the tenth capacitor is connected in parallel with the tenth resistor.

[0012] In one embodiment, the seventh resistor has the same resistance value as the eighth resistor, and the ninth resistor has the same resistance value as the tenth resistor; the seventh capacitor has the same capacitance value as the eighth capacitor, and the ninth capacitor has the same capacitance value as the tenth capacitor; the product of the seventh resistor and the seventh capacitor is equal to the product of the ninth resistor and the ninth capacitor.

[0013] In one embodiment, the second signal processing unit includes a third voltage follower, a fourth voltage follower, and a second subtractor; the input terminal of the third voltage follower is connected to the second terminal of the seventh resistor, the input terminal of the fourth voltage follower is connected to the second terminal of the eighth resistor, and the output terminals of the third and fourth voltage followers are respectively connected to the two input terminals of the second subtractor.

[0014] The beneficial effects of this application embodiment compared with the prior art are: by connecting to the transmission line under test through two signal interfaces, the interference signal detection device can be directly embedded into the transmission line under test without damaging it.

[0015] The common-mode interference detection module and the differential-mode interference detection module can detect both common-mode interference and differential-mode interference simultaneously, and the detection results can be directly displayed through the display module. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of an interference signal detection device provided in an embodiment of this application;

[0017] Figure 2 This is another schematic diagram of the interference signal detection device provided in one embodiment of this application;

[0018] Figure 3 A circuit diagram of a common-mode interference detection module provided in an embodiment of this application;

[0019] Figure 4 A circuit diagram of a differential mode interference detection module provided in an embodiment of this application;

[0020] Figure 5 Another circuit diagram of a common-mode interference detection module provided in an embodiment of this application. Detailed Implementation

[0021] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0022] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0023] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0024] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0025] Figure 1 A schematic diagram of an interference signal detection device according to an embodiment of this application is shown. For ease of explanation, only the parts relevant to this embodiment are shown, and are described in detail below:

[0026] The interference signal detection device includes: multiple signal interfaces 100, a common-mode interference detection module 200, a differential-mode interference detection module 300, and a display module 400.

[0027] At least two signal interfaces 100 have their pins interconnected. These two signal interfaces 100 are connected in series in the transmission line under test, which includes several sets of twisted-pair cables, with each set of twisted-pair cables corresponding to two pins of a signal interface 100. A common-mode interference detection module 200 is connected to the signal interface 100 and is used to acquire the common-mode interference signal of any set of twisted-pair cables and generate a first single-ended signal corresponding to the common-mode interference signal. A differential-mode interference detection module 300 is connected to the signal interface 100 and is used to acquire the differential-mode interference signal of any set of twisted-pair cables and generate a second single-ended signal corresponding to the differential-mode interference signal. A display module 400 is connected to both the common-mode interference detection module 200 and the differential-mode interference detection module 300 and is used to display the first and second single-ended signals.

[0028] By connecting to the transmission line under test via two signal interfaces 100, the interference signal detection device can be directly embedded into the transmission line under test without damaging it.

[0029] It should be noted that traditional common-mode interference detection schemes require two probes to detect signals on two separate lines, followed by additional calculations to obtain the specific parameters of the common-mode interference. With the common-mode interference detection module 200 and the differential-mode interference detection module 300, only one interference signal detection device can be used to simultaneously detect both common-mode and differential-mode interference signals, and the detection results can be directly displayed via the display module 400.

[0030] The specific type of signal interface 100 corresponds to the parameters of the transmission line under test. In some embodiments, signal interface 100 may be an RJ45 interface.

[0031] For example, such as Figure 2As shown, the two signal interfaces 100 include a first interface J1 and a second interface J2, respectively. Both the first interface J1 and the second interface J2 include eight pins. Each pair of pins forms a group, and each group of pins can be connected to a pair of twisted-pair cables.

[0032] In one embodiment, such as Figure 2 As shown, the common-mode interference detection module 200 includes a common-mode signal extraction unit 210 and a first signal processing unit 220. The common-mode signal extraction unit 210 is connected to both the signal interface 100 and the first signal processing unit 220, and is also connected to ground. The common-mode signal extraction unit 210 is used to divide the signal transmitted through the signal interface 100 to obtain a common-mode interference signal. The first signal processing unit 220 is connected to the display module 400. The first signal processing unit 220 is used to perform a subtraction operation on two voltage signals based on the common-mode interference signal to obtain a first single-ended signal relative to system ground.

[0033] It should be noted that the common-mode signal extraction unit 210 can convert excessively high-voltage common-mode interference into a common-mode interference signal that can be identified and processed by the first signal processing unit 220 when common-mode interference exists in the transmission line under test. The first signal processing unit 220 can then obtain a first single-ended signal relative to the system ground based on the common-mode interference signal, so as to complete the detection of common-mode interference in the transmission line under test based on the first single-ended signal.

[0034] In one embodiment, such as Figure 2 , Figure 3 As shown, both signal interfaces 100 include a first pin and a second pin corresponding to one of the twisted pairs. The two first pins are connected by a first wire P, and the two second pins are connected by a second wire N. The common-mode signal extraction unit 210 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6. The first end of the first resistor R1 is connected to the first wire P, the first end of the second resistor R2 is connected to the second wire N, the second end of the first resistor R1 is connected to the second end of the second resistor R2 and connected to system ground through the third resistor R3, the first end of the fourth resistor R4 is connected to system ground, the second end of the fourth resistor R4 is connected to ground through the fifth resistor R5, and the sixth resistor R6 is connected in parallel with the fifth resistor R5. The second ends of the first resistor R1 and the fourth resistor R4 are respectively connected to the two input terminals of the first signal processing unit 220. The first capacitor C1 is connected in parallel with the first resistor R1, the second capacitor C2 is connected in parallel with the second resistor R2, the third capacitor C3 is connected in parallel with the third resistor R3, the fourth capacitor C4 is connected in parallel with the fourth resistor R4, and the fifth capacitor C5 and the sixth capacitor C6 are connected in parallel with the fifth resistor R5.

[0035] It should be noted that common-mode interference typically refers to the average voltage of the two wires of a twisted pair relative to ground, while existing high-voltage differential probes can only measure the voltage of a single wire relative to ground. This means that two probes are needed to measure the signals on both wires separately, and additional calculations are required to obtain the value of the common-mode signal.

[0036] In this embodiment, the common-mode signal extraction unit 210 connected to ground can simultaneously obtain electrical signals from the first conductor P and the second conductor N, and generate a common-mode interference signal corresponding to the common-mode interference on the conductor.

[0037] In one embodiment, the resistance values ​​of the first resistor R1, the second resistor R2, the fifth resistor R5, and the sixth resistor R6 are equal. The resistance values ​​of the third resistor R3 and the fourth resistor R4 are equal. The capacitance values ​​of the first capacitor C1, the second capacitor C2, the fifth capacitor C5, and the sixth capacitor C6 are equal. The capacitance values ​​of the third capacitor C3 and the fourth capacitor C4 are equal. The product of the first resistor R1 and the first capacitor C1 is equal to the product of the third resistor R3 and the third capacitor C3.

[0038] It should be noted that when the resistance values ​​of the first resistor R1 and the second resistor R2 are equal, and the capacitance values ​​of the first capacitor C1 and the second capacitor C2 are equal, it can serve to calculate the average value and effectively separate the common-mode interference between the first conductor P and the second conductor N.

[0039] There exists a first attenuation coefficient K1 between the first single-ended signal and the common-mode interference on the conductor. In this embodiment, K1 = R3 / [(R1 / R2) + R3]. Simultaneously, when the product of the first resistor R1 and the first capacitor C1 is equal to the product of the third resistor R3 and the third capacitor C3, the attenuation coefficients of the common-mode signal extraction unit 210 are consistent for both DC and AC signals. This ensures that the first single-ended signal can accurately reflect the common-mode interference on the conductor.

[0040] In one embodiment, such as Figure 3 As shown, the first signal processing unit 220 includes a first voltage follower, a second voltage follower, and a first subtractor. The input terminal of the first voltage follower is connected to the second terminal of the first resistor R1, the input terminal of the second voltage follower is connected to the second terminal of the fourth resistor R4, and the output terminals of the first and second voltage followers are respectively connected to the two input terminals of the first subtractor.

[0041] Specifically, the first voltage follower includes a first operational amplifier U1, the second voltage follower includes a second operational amplifier U2, and the first subtractor includes a third operational amplifier U3.

[0042] The positive input terminal of the first operational amplifier U1 is connected to the second terminal of the first resistor R1, and the negative input terminal of the first operational amplifier U1 is connected to its output terminal. The output terminal of the first operational amplifier U1 is connected to the positive input terminal of the third operational amplifier U3 through the fifteenth resistor R15. The positive input terminal of the second operational amplifier U2 is connected to the second terminal of the second resistor R2, and the negative input terminal of the second operational amplifier U2 is connected to its output terminal. The output terminal of the second operational amplifier U2 is connected to the negative input terminal of the third operational amplifier U3 through the sixteenth resistor R16. The positive input terminal of the third operational amplifier U3 is also connected to system ground through the seventeenth resistor R17, and the output terminal of the third operational amplifier U3 is connected to its negative input terminal through the eighteenth resistor R18. The resistance values ​​of the fifteenth resistor R15, the sixteenth resistor R16, the seventeenth resistor R17, and the eighteenth resistor R18 are equal.

[0043] The first voltage follower and the second voltage follower are used to generate the same voltage based on the input voltage. It is understood that the electrical signal output from the voltage follower has a higher driving capability. The first subtractor can perform a subtraction operation on the signals output from the first voltage follower and the second voltage follower to obtain a first single-ended signal to system ground, and the waveform of the first single-ended signal can be displayed in the display module 400.

[0044] In one embodiment, such as Figure 2 As shown, the differential-mode interference detection module 300 includes a differential-mode signal extraction unit 310 and a second signal processing unit 320. The differential-mode signal extraction unit 310 is connected to both the signal interface 100 and the second signal processing unit 320. The differential-mode signal extraction unit 310 is used to divide the signal transmitted through the signal interface 100 to obtain a differential-mode interference signal. The second signal processing unit 320 is connected to the display module 400. The second signal processing unit 320 is used to perform a subtraction operation on two voltage signals based on the differential-mode interference signal to obtain a second single-ended signal.

[0045] It should be noted that the differential mode signal extraction unit 310 can convert excessively high voltage differential mode interference into a differential mode interference signal that can be recognized and processed by the second signal processing unit 320 when differential mode interference exists in the transmission line under test. The second signal processing unit 320 can then obtain a second single-ended signal based on the differential mode interference signal, so as to obtain the differential mode interference situation in the transmission line under test based on the second single-ended signal.

[0046] In one embodiment, such as Figure 2 , Figure 4As shown, both signal interfaces 100 include a first pin and a second pin corresponding to one of the twisted pairs. The two first pins are connected by a first wire P, and the two second pins are connected by a second wire N. The differential signal extraction unit 310 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, and a tenth capacitor C10. The first end of the seventh resistor R7 is connected to the second wire N, the first end of the eighth resistor R8 is connected to the first wire P, the second end of the seventh resistor R7 is connected to system ground through the ninth resistor R9, and the second end of the eighth resistor R8 is connected to system ground through the tenth resistor R10. The second ends of the seventh resistor R7 and the eighth resistor R8 are respectively connected to the two input terminals of the second signal processing unit 320. The seventh capacitor C7 is connected in parallel with the seventh resistor R7, the eighth capacitor C8 is connected in parallel with the eighth resistor R8, the ninth capacitor C9 is connected in parallel with the ninth resistor R9, and the tenth capacitor C10 is connected in parallel with the tenth resistor R10.

[0047] It is understandable that the voltage division and attenuation of the electrical signal on the first conductor P can be achieved through the seventh resistor R7 and the ninth resistor R9, and the voltage division and attenuation of the electrical signal on the second conductor N can be achieved through the eighth resistor R8 and the tenth resistor R10, thereby obtaining the differential mode interference signal.

[0048] In one embodiment, the seventh resistor R7 and the eighth resistor R8 have the same resistance value, and the ninth resistor R9 and the tenth resistor R10 have the same resistance value. The seventh capacitor C7 and the eighth capacitor C8 have the same capacitance value, and the ninth capacitor C9 and the tenth capacitor C10 have the same capacitance value. The product of the seventh resistor R7 and the seventh capacitor C7 is equal to the product of the ninth resistor R9 and the ninth capacitor C9.

[0049] It should be noted that there is a second attenuation coefficient K2 between the second single-ended signal and the differential-mode interference on the conductor, K2 = R9 / (R7 + R9). Simultaneously, when the product of the seventh resistor R7 and the seventh capacitor C7 is equal to the product of the ninth resistor R9 and the ninth capacitor C9, the attenuation coefficient of the differential-mode signal extraction unit 310 is consistent for both DC and AC signals, thus enabling the second single-ended signal to correctly reflect the differential-mode interference on the conductor.

[0050] In one embodiment, the second signal processing unit 320 includes a third voltage follower, a fourth voltage follower, and a second subtractor. The input terminal of the third voltage follower is connected to the second terminal of the seventh resistor R7, the input terminal of the fourth voltage follower is connected to the second terminal of the eighth resistor R8, and the output terminals of the third and fourth voltage followers are respectively connected to the two input terminals of the second subtractor.

[0051] Specifically, such as Figure 4As shown, the third voltage follower includes a fourth operational amplifier U4, the fourth voltage follower includes a fifth operational amplifier U5, and the second subtractor includes a sixth operational amplifier U6.

[0052] The positive input of the fourth operational amplifier U4 is connected to the second terminal of the seventh resistor R7. The inverting input of the fourth operational amplifier U4 is connected to its output. The output of the fourth operational amplifier U4 is connected to the positive input of the sixth operational amplifier U6 through the nineteenth resistor R19. The positive input of the fifth operational amplifier U5 is connected to the second terminal of the eighth resistor R8. The inverting input of the fifth operational amplifier U5 is connected to its output. The output of the fifth operational amplifier U5 is connected to the inverting input of the sixth operational amplifier U6 through the twentieth resistor R20. The positive input of the sixth operational amplifier U6 is also connected to system ground through the twenty-first resistor R21. The output of the sixth operational amplifier U6 is connected to its inverting input through the twenty-second resistor R22. The resistance values ​​of the nineteenth resistor R19, the twentieth resistor R20, the twenty-first resistor R21, and the twenty-second resistor R22 are equal.

[0053] The third and fourth voltage followers are used to generate the same voltage based on the input voltage. It is understood that the electrical signal output from the voltage follower has a higher driving capability. The second subtractor can subtract the signals output from the third and fourth voltage followers to obtain a second single-ended signal, the waveform of which can be displayed in the display module 400.

[0054] In one embodiment, such as Figure 5 As shown, both signal interfaces 100 include a first pin and a second pin corresponding to one of the twisted pairs. The two first pins are connected by a first wire P, and the two second pins are connected by a second wire N.

[0055] Unlike the embodiments described above, as Figure 5As shown, the common-mode signal extraction unit 210 includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, and a fourteenth capacitor C14. The first end of the eleventh resistor R11 is connected to the first wire P, the first end of the twelfth resistor R12 is connected to the second wire N, the second end of the eleventh resistor R11 is connected to system ground through the thirteenth resistor R13, and the second end of the twelfth resistor R12 is connected to system ground through the fourteenth resistor R14, and system ground is connected to earth ground. The eleventh capacitor C11 is connected in parallel with the eleventh resistor R11, the twelfth capacitor C12 is connected in parallel with the twelfth capacitor C12, the thirteenth capacitor C13 is connected in parallel with the thirteenth resistor R13, and the fourteenth capacitor C14 is connected in parallel with the fourteenth resistor R14. The first signal processing unit 220 includes a fifth voltage follower, a sixth voltage follower, and a signal averager. The input terminal of the fifth voltage follower is connected to the second terminal of the eleventh resistor R11, the input terminal of the sixth voltage follower is connected to the second terminal of the twelfth resistor R12, the output terminal of the fifth voltage follower is connected to the output terminal of the sixth voltage follower, and is connected to the input terminal of the signal averager.

[0056] Specifically, such as Figure 5 As shown, the fifth voltage follower includes a seventh operational amplifier U7, the sixth voltage follower includes an eighth operational amplifier U8, and the signal averager includes a ninth operational amplifier U9. The non-inverting input of the seventh operational amplifier U7 is connected to the second terminal of the eleventh resistor R11, and the inverting input of the seventh operational amplifier U7 is connected to its output. The output of the seventh operational amplifier U7 is connected to the inverting input of the ninth operational amplifier U9 through the twenty-third resistor R23. The non-inverting input of the eighth operational amplifier U8 is connected to the second terminal of the twelfth resistor R12, and the inverting input of the eighth operational amplifier U8 is connected to its output. The output of the eighth operational amplifier U8 is connected to the inverting input of the ninth operational amplifier U9 through the twenty-fourth resistor R24. The non-inverting input of the ninth operational amplifier U9 is connected to system ground through the twenty-fifth resistor R25, and the output of the ninth operational amplifier U9 is connected to its inverting input through the twenty-sixth resistor R26.

[0057] The fifth and sixth voltage followers are used to enhance the driving capability of common-mode interference signals. The signal averager can calculate the average voltage of the signals output by the third and fourth voltage followers to obtain the first single-ended signal, and the waveform of the first single-ended signal can be displayed in the display module 400.

[0058] In one embodiment, for example, when the interference voltage on the first conductor P is 1.2KV relative to ground and the interference voltage on the second conductor N is 1KV relative to ground, the interference signal detection device can directly measure the common-mode interference as 1.1KV and the differential-mode interference as 0.2KV.

[0059] In some embodiments, the interference signal detection device further includes a power supply module for providing operating voltage to drive the common-mode interference detection module 200, the differential-mode interference detection module 300, and the display module 400 to operate normally.

[0060] In some embodiments, the display module 400 includes an oscilloscope that can display the waveforms of a first single-ended signal and a second single-ended signal to facilitate further identification of interference in the line.

[0061] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0062] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0063] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. An interference signal detection device, characterized in that, include: Multiple signal interfaces, at least two of the signal interfaces are interconnected and used to be connected in series in the transmission line under test, the transmission line under test includes several sets of twisted pairs, one set of twisted pairs corresponds to two pins of the signal interface; A common-mode interference detection module, connected to the signal interface, is used to acquire any set of common-mode interference signals of the twisted pair and generate a first single-ended signal corresponding to the common-mode interference signal; A differential-mode interference detection module, connected to the signal interface, is used to acquire any set of differential-mode interference signals of the twisted pair and generate a second single-ended signal corresponding to the differential-mode interference signal; The display module is connected to the common-mode interference detection module and the differential-mode interference detection module, and is used to display the first single-ended signal and the second single-ended signal.

2. The interference signal detection device as described in claim 1, characterized in that, The common-mode interference detection module includes a common-mode signal extraction unit and a first signal processing unit; The common-mode signal extraction unit is connected to the signal interface and the first signal processing unit respectively, and is connected to ground. The common-mode signal extraction unit is used to divide the signal transmitted by the signal interface to obtain the common-mode interference signal. The first signal processing unit is connected to the display module. The first signal processing unit is used to perform a subtraction operation on the two voltage signals of the common-mode interference signal to obtain the first single-ended signal relative to the system ground.

3. The interference signal detection device as described in claim 2, characterized in that, Both of the signal interfaces include a first pin and a second pin corresponding to one of the sets of twisted pairs, the two first pins are connected by a first wire, and the two second pins are connected by a second wire; The common-mode signal extraction unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, and a sixth capacitor; The first end of the first resistor is connected to the first wire, the first end of the second resistor is connected to the second wire, the second end of the first resistor is connected to the second end of the second resistor and connected to the system ground through the third resistor, the first end of the fourth resistor is connected to the system ground, the second end of the fourth resistor is connected to the ground through the fifth resistor, and the sixth resistor is connected in parallel with the fifth resistor; The second end of the first resistor and the second end of the fourth resistor are respectively connected to the two input terminals of the first signal processing unit; The first capacitor is connected in parallel with the first resistor, the second capacitor is connected in parallel with the second resistor, the third capacitor is connected in parallel with the third resistor, the fourth capacitor is connected in parallel with the fourth resistor, and the fifth capacitor and the sixth capacitor are connected in parallel with the fifth resistor.

4. The interference signal detection device as described in claim 3, characterized in that, The resistance values ​​of the first resistor, the second resistor, the fifth resistor, and the sixth resistor are equal; the resistance values ​​of the third resistor and the fourth resistor are equal. The capacitance values ​​of the first capacitor, the second capacitor, the fifth capacitor, and the sixth capacitor are equal; the capacitance values ​​of the third capacitor and the fourth capacitor are equal. The product of the first resistor and the first capacitor is equal to the product of the third resistor and the third capacitor.

5. The interference signal detection device as described in claim 3, characterized in that, The first signal processing unit includes a first voltage follower, a second voltage follower, and a first subtractor; The input terminal of the first voltage follower is connected to the second terminal of the first resistor, the input terminal of the second voltage follower is connected to the second terminal of the fourth resistor, and the output terminals of the first voltage follower and the second voltage follower are respectively connected to the two input terminals of the first subtractor.

6. The interference signal detection device as described in claim 1, characterized in that, The differential mode interference detection module includes a differential mode signal extraction unit and a second signal processing unit; The differential mode signal extraction unit is connected to the signal interface and the second signal processing unit respectively. The differential mode signal extraction unit is used to divide the signal transmitted by the signal interface to obtain the differential mode interference signal. The second signal processing unit is connected to the display module. The second signal processing unit is used to perform a subtraction operation on the two voltage signals based on the differential mode interference signal to obtain the second single-ended signal.

7. The interference signal detection device as described in claim 6, characterized in that, Both of the signal interfaces include a first pin and a second pin corresponding to one of the sets of twisted pairs, the two first pins are connected by a first wire, and the two second pins are connected by a second wire; The differential signal extraction unit includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, and a tenth capacitor; The first end of the seventh resistor is connected to the second wire, the first end of the eighth resistor is connected to the first wire, the second end of the seventh resistor is connected to the system ground through the ninth resistor, and the second end of the eighth resistor is connected to the system ground through the tenth resistor; the second ends of the seventh resistor and the second ends of the eighth resistor are respectively connected to the two input ends of the second signal processing unit. The seventh capacitor is connected in parallel with the seventh resistor, the eighth capacitor is connected in parallel with the eighth resistor, the ninth capacitor is connected in parallel with the ninth resistor, and the tenth capacitor is connected in parallel with the tenth resistor.

8. The interference signal detection device as described in claim 7, characterized in that, The seventh resistor has the same resistance value as the eighth resistor, and the ninth resistor has the same resistance value as the tenth resistor; the seventh capacitor has the same capacitance value as the eighth capacitor, and the ninth capacitor has the same capacitance value as the tenth capacitor; the product of the seventh resistor and the seventh capacitor is equal to the product of the ninth resistor and the ninth capacitor.

9. The interference signal detection device as described in claim 7, characterized in that, The second signal processing unit includes a third voltage follower, a fourth voltage follower, and a second subtractor; The input terminal of the third voltage follower is connected to the second terminal of the seventh resistor, the input terminal of the fourth voltage follower is connected to the second terminal of the eighth resistor, and the output terminals of the third voltage follower and the fourth voltage follower are respectively connected to the two input terminals of the second subtractor.

10. The interference signal detection device as described in claim 2, characterized in that, Both of the signal interfaces include a first pin and a second pin corresponding to one of the sets of twisted pairs, the two first pins are connected by a first wire, and the two second pins are connected by a second wire; The common-mode signal extraction unit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, and a fourteenth capacitor; The first end of the eleventh resistor is connected to the first wire, the first end of the twelfth resistor is connected to the second wire, the second end of the eleventh resistor is connected to the system ground through the thirteenth resistor, the second end of the twelfth resistor is connected to the system ground through the fourteenth resistor, and the system ground is connected to the earth. The eleventh capacitor is connected in parallel with the eleventh resistor, the twelfth capacitor is connected in parallel with the twelfth capacitor, the thirteenth capacitor is connected in parallel with the thirteenth resistor, and the fourteenth capacitor is connected in parallel with the fourteenth resistor; The first signal processing unit includes a fifth voltage follower, a sixth voltage follower, and a signal averager; the input terminal of the fifth voltage follower is connected to the second terminal of the eleventh resistor, the input terminal of the sixth voltage follower is connected to the second terminal of the twelfth resistor, the output terminal of the fifth voltage follower is connected to the output terminal of the sixth voltage follower, and is connected to the input terminal of the signal averager.

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