Semiconductor device with equipotential electrode structure
By setting an equipotential source and a metal ring structure in the epitaxial structure of a semiconductor device, the problems of mechanical damage and electrochemical corrosion during the cutting process are solved, and high reliability and stability of the semiconductor device are achieved.
Patent Information
- Application Number
- CN202422739578.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-11
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2034-11-11
AI Technical Summary
In the fabrication of semiconductor devices, mechanical damage and electrochemical corrosion caused by the dicing process are particularly problematic, especially in bidirectional GaN HEMT devices, where substrate potential instability poses a high risk to reliability.
In the epitaxial structure of a semiconductor device, an equipotential source and a metal ring structure are set. An isolation region is formed by the ion implantation region and the metal ring structure to ensure that the electrodes in the active region are at the same potential. The metal ring is connected to the substrate to reduce potential difference and electrochemical corrosion.
It improves the reliability of semiconductor devices, reduces the risk of mechanical damage propagation and electrochemical corrosion, and enhances the overall stability of the devices.
Smart Images
Figure CN223553679U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic devices, and in particular to a semiconductor device with an equipotential electrode structure. Background Technology
[0002] Many semiconductor devices, such as traditional unidirectional GaN high electron mobility transistors (GaN HEMTs), have three electrodes: source, gate, and drain. When the device is off, the drain is at a high potential, while the source and gate are at low potentials. However, bidirectional GaN HEMTs exhibit a common-drain structure. This means the device does not have a dedicated drain electrode but instead has two source electrodes (Source1 and Source2) and two gate electrodes. When the device is in forward and reverse voltage states, the two source electrodes alternately serve as the high-voltage and low-voltage electrodes.
[0003] During the fabrication of these semiconductor devices, they need to be placed on a substrate. For unidirectional GaN HEMT devices, the substrate is typically shorted to the source, shorted to the gate, or floating. Except for the floating case, the substrate can be considered to be at a low potential. However, the operating state of bidirectional GaN HEMT devices is more complex. The substrate cannot simply be shorted to a single electrode to obtain a stable potential. In some applications, the substrate is connected to the midpoint potential of an AC current to ensure stability. For the specific operating state of bidirectional devices, this midpoint potential of the AC current can be considered the midpoint potential between the high-voltage and low-voltage electrodes. For high-voltage GaN HEMT devices, the isolation between the high-voltage and low-voltage structures is crucial and a key factor affecting reliability risk.
[0004] When dicing devices on a substrate, the epitaxial structure of the device at the dicing point is typically etched first to expose the substrate before dicing. This reduces the stress and vibration generated during dicing, which can cause mechanical damage to the device edges. However, the etching and dicing processes inevitably produce mechanical damage, leading to increased roughness and material cracks at the device edges. This mechanical damage may propagate to the active region of the device, providing entry channels for moisture and contaminants. Furthermore, under the combined effects of voltage and other conditions, electrochemical corrosion may occur, further deteriorating the device edge structure and posing reliability risks.
[0005] In unidirectional GaN HEMT devices, the Source, Gate, and Drain are typically arranged in a repeating order within the active region, with the low-potential Source placed at the edge of the active region. This ensures that each Drain is sandwiched between two Gates, keeping the high-voltage Drain away from the scribe line and reducing reliability risks. However, in bidirectional GaN HEMT devices, because each electrode operates at a high voltage level at a certain point, it's impossible to isolate the high-voltage end from the scribe line as effectively as in unidirectional devices. A significant potential difference always exists between Source1 and Source2 and the scribe line, and this potential difference can reverse, further increasing reliability risks. Utility Model Content
[0006] This utility model provides a semiconductor device with an equipotential electrode structure, achieving high reliability of the semiconductor device.
[0007] One embodiment of this utility model provides a semiconductor device with an equipotential electrode structure, comprising: an epitaxial structure disposed on a substrate, the epitaxial structure including an active region and an isolation region surrounding the active region, wherein:
[0008] The active region includes multiple sources of the semiconductor device and gates corresponding to the sources. The uppermost source and the lowermost source of the active region are electrodes with the same potential, and adjacent source electrodes are electrodes with different potentials.
[0009] The isolation region surrounds the electrode in the active region and includes at least one ring of ion implantation region and at least one ring of metal ring structure. The metal ring structure and the ion implantation region are disposed in the isolation region at intervals, and the ring of ion implantation region is closest to the electrode in the active region.
[0010] The potential of the metal ring structure, the substrate, and the source electrode at the uppermost or lowermost end of the active region are the same or approximately equal.
[0011] As can be seen, the semiconductor device in this embodiment mainly involves setting an isolation region around the active region of the epitaxial structure. When setting the electrodes in the active region, the uppermost and lowermost source electrodes are set to have the same potential, while adjacent source electrodes have different potentials. The isolation region contains at least one metal ring structure and at least one ion implantation region. This metal ring structure and ion implantation region effectively improve the reliability of the source electrodes within the active region, thereby achieving high reliability for the semiconductor device. Furthermore, the potential of the metal ring structure, the substrate, and the uppermost or lowermost source electrode of the active region are the same or approximately equal, which reduces electrochemical corrosion and completely eliminates the potential difference between the inside and outside of the metal ring structure, achieving high reliability. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0013] Figure 1a This is a front view of a semiconductor device provided in one embodiment of the present invention;
[0014] Figure 1b This is a cross-sectional view of a semiconductor device in one embodiment of the present invention;
[0015] Figure 1c This is a schematic diagram of the metal ring structure in one embodiment of the present invention;
[0016] Figure 1d This is a front view of another semiconductor device provided in one embodiment of the present invention;
[0017] Figure 1e This is a cross-sectional view of another semiconductor device in one embodiment of the present invention;
[0018] Figure 2a This is a front view of a semiconductor device provided in another embodiment of the present invention;
[0019] Figure 2b This is a cross-sectional view of a semiconductor device in another embodiment of the present invention;
[0020] Figure 2c This is a front view of another semiconductor device provided in another embodiment of the present invention;
[0021] Figure 2d This is a cross-sectional view of another semiconductor device in another embodiment of the present invention;
[0022] Figure 3a This is a cross-sectional view of a semiconductor device in another embodiment of the present invention;
[0023] Figure 3b This is a cross-sectional view of another semiconductor device in another embodiment of the present invention;
[0024] Figure 4a This is a front view of a semiconductor device provided in another embodiment of the present invention;
[0025] Figure 4bThis is a cross-sectional view of a semiconductor device in another embodiment of the present invention;
[0026] Figure 4c This is a front view of another semiconductor device provided in yet another embodiment of the present invention;
[0027] Figure 4d This is a cross-sectional view of another semiconductor device in another embodiment of the present invention. Detailed Implementation
[0028] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0029] The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented, for example, in orders other than those illustrated or described herein.
[0030] This invention provides a semiconductor device with an equipotential electrode structure, such as a bidirectional, voltage-resistant, bidirectional GaN HEMT device, etc. Figure 1a The front view of the semiconductor device shown, and Figure 1b The semiconductor device shown follows the path as follows: Figure 1a The cross-sectional view shown by the dashed line indicates that the semiconductor device in this embodiment may include: an epitaxial structure 12 disposed on a substrate 13, the epitaxial structure 12 including an active region 10 and an isolation region 11 surrounding the active region, wherein:
[0031] (1) The active region 10 includes multiple sources of a semiconductor device and gates corresponding to the sources. The uppermost source and the lowermost source of the active region 10 are electrodes with the same potential, and adjacent sources are electrodes with different potentials.
[0032] It is understandable that the source and gate distributions in the active region 10 can be varied, and no restrictions are imposed here. In one case, such as... Figure 1a As shown, the active region 10 includes multiple sets of electrodes for a semiconductor device. Each set of electrodes includes a source electrode and a gate electrode surrounding the source electrode. Specifically, the source electrode can be a strip electrode, and the gate electrode can be a ring electrode surrounding the source electrode. The potentials of the source electrodes in adjacent sets of electrodes are not equal. Figure 1a In the diagram, bars filled with diagonal lines represent sources, and bars filled with dots represent gates. The first source (Source1) and the second source (Source2) are electrodes with different potentials; for example, if the first source (Source1) is at a high potential, then the second source (Source2) is at a low potential. In this embodiment, the uppermost electrode group and the lowermost electrode group within the active region 10 both include the second source (Source2).
[0033] In practical implementation, a fieldplate, which can be a metal sheet, is usually placed above each of the gates (Gate1 and Gate2) to make the electric field distribution between the two gates uniform.
[0034] (2) The isolation region 11 surrounds the electrode within the active region 10, including at least one ring of ion implantation region 110 and at least one ring of metal ring structure 111. The metal ring structure 111 and the ion implantation region 110 are disposed in the isolation region 11 at intervals, and the ring of ion implantation region 110 is closest to the electrode of the active region 10. That is, the ion implantation region 110 is disposed in a ring close to the active region 10, and the metal ring structure 111 is disposed in a ring outside the ion implantation region 110. The ring outside the metal ring structure 111 may also be disposed of as an ion implantation region 110.
[0035] like Figure 1a As shown, the isolation region 11 includes an ion implantation region 110 and a metal ring structure 111, with the metal ring structure 111 located outside the ion implantation region 110.
[0036] It should be noted that, as Figure 1b As shown, the electrodes in the active region 10 and any one of the metal ring structures 111 in the isolation region 11 are disposed on the epitaxial structure 12 of the semiconductor device, while any one of the ion implantation regions 110 in the isolation region 11 is disposed in the epitaxial structure 12, mainly formed by implanting ions into the epitaxial structure 12.
[0037] In its specific implementation, the metal ring structure 111 may include a metal ring formed by one or more layers of metal structures, such as an ohmic metal ring. Figure 1c As shown, the metal ring structure 111 includes an ohmic metal ring and at least one layer of metal structure disposed thereon. Figure 1c (Taking a two-layer metal structure metal1 and metal2 as an example, the metal ring structure 111 can also have other structures, as long as it forms a ring, and is not limited to such structures.) Figure 1cThe structure shown is not described in detail here. In this way, the metal ring structure 111 is connected to the two-dimensional electron gas below, and the two-dimensional electron gas in the inner ion implantation region 110 is destroyed by the ion implantation structure, forming a high-resistance region.
[0038] (3) The metal ring structure 111 is connected to the substrate 13 through a via on the epitaxial structure 12. Generally, when fabricating a semiconductor device, an epitaxial structure 12 of the semiconductor device is set on the substrate 13, and then a GaN via (Through GaN Via, TGV) is set on the epitaxial structure 12 through the TGV process, and then the metal ring structure 111 is connected to the substrate 13 through the TGV.
[0039] It is understood that in other specific embodiments, the metal ring structure 111 can be connected to the substrate 13 through internal metal interconnects and external packaging wire bonding. Specifically, when fabricating a semiconductor device, an epitaxial structure 12 is provided on the substrate 13, and the metal ring structure 111 is connected to the substrate 13 through packaging wire bonding.
[0040] This allows for the achievement of [the desired result] without using the TGV process. Figure 1a The semiconductor device shown achieves the same effect, although it does not require an additional TGV process step, but it is constrained by the area of the semiconductor device (because a wire bonding pad needs to be added to the surface of the semiconductor device, which may be difficult to achieve for semiconductor devices with smaller areas).
[0041] (4) In the semiconductor device of this embodiment, the potential induced by the metal ring structure 111, the potential of the substrate 13, and the potential of the source (i.e., the second source 2) at the uppermost or lowermost end of the active region 10 are the same or approximately equal.
[0042] In some specific embodiments, after the metal ring structure 111 and the substrate 13 are short-circuited and floated through a TGV or package connection, the potential induced by the metal ring structure 111 is close to the potential of the second source 2. Therefore, there is no potential difference between the metal ring structure 111 and the edge of the dicing channel, and the potential difference between the metal ring structure 111 and the second source 2 at the upper and lower ends of the active region 10 is also small or close to no potential difference. This can further reduce the reliability risk.
[0043] Furthermore, after the metal ring structure 111 and the substrate 13 are short-circuited via TGV or package connection, and then short-circuited to the second source 2, the metal ring structure 111, the substrate 13, and the second source 2 will always maintain the same potential, which can reduce electrochemical corrosion. This also completely eliminates the potential difference inside and outside the metal ring structure 111, achieving high reliability. Especially in some low-frequency voltage semiconductor devices (where the potential switching frequency of the first source 1 and the second source 2 is low), the reliability of the semiconductor device can be further improved.
[0044] Additionally, it should be noted that during the fabrication of the semiconductor device in this embodiment, an active region 10 and an isolation region 11 of the semiconductor device are formed on a region of the epitaxial structure of the substrate 13, and the substrate 13 and the epitaxial structure 12 in that region are cut to obtain the semiconductor device. Thus, during this fabrication process, the metal ring structure 111 of the isolation region 11 can interrupt the continuity of the dielectric, preventing mechanical damage from the cutting from spreading to the active region 10, thereby preventing leakage current channels from forming in the electrodes of the substrate 13 and the active region 10, which could lead to breakdown.
[0045] When the semiconductor device of this embodiment is applied to GaN HEMT, it is easy to implement, compatible with existing GaNHEMT processes, does not require additional photomasks and process steps, and can be applied to various GaN HEMT devices, including but not limited to P-GaN HEMT, MIS-HEMT, SBD-Gate HEMT, etc.; it can also be applied to devices made of different materials, including but not limited to silicon, silicon carbide, gallium arsenide, gallium oxide, etc.
[0046] Thus, in the process of manufacturing semiconductor devices:
[0047] The endpoints of the uppermost and lowermost second source electrodes Source2 in the active region 10 are protected by the gate and field plate between them and the isolation region 11. In this way, the field plate optimizes the electrodes between the active region 10 and the isolation region 11, making the electric field distribution uniform. This further reduces the influence of the two source electrodes on the potential of the metal ring structure 111, and improves the reliability between the source electrode at the middle end of the active region 10 and the metal ring structure 111.
[0048] The two-dimensional electron gas region below the metal ring structure 111 is at the same potential as the metal ring structure 111, and because the two-dimensional electron gas region is in a low-resistance state, no voltage difference is generated between different positions in this region. The voltage difference between the metal ring structure 111 and the dicing track of the epitaxial structure 12 on the substrate 13 is mainly borne by the edge of the dicing track, so that electrochemical corrosion only occurs at the edge of the dicing track and will not further diffuse to the active region 10.
[0049] For the left and right endpoints of electrodes Source1 / Gate1 / Source2 / Gate2 in the active region 10, due to the alternating high and low voltages, most electric field lines can terminate with each other, which can prevent a large number of electric field lines from overflowing outside the active region 10, and the reliability is higher than that above and below the active region 10.
[0050] Furthermore, during the operation of the semiconductor device, the metal ring structure 111, the substrate 13, and the second source electrode 2 always maintain the same potential, which can minimize the occurrence of electrochemical corrosion.
[0051] By combining the above functions, the reliability of both the inner and outer regions of isolation zone 11 is effectively improved, ultimately achieving high overall reliability of the semiconductor device.
[0052] In another case, such as Figure 1d The image shown is a front view of a semiconductor device. Figure 1e The semiconductor device shown follows the path as follows: Figure 1d The cross-sectional view shown by the dashed line indicates that the semiconductor device is similar to the one described above. Figure 1a The semiconductor device shown is similar, except that the distribution of electrodes within the active region 10 of this semiconductor device is the same as described above. Figure 1a The distribution of electrodes within the active region 10 of the semiconductor device shown is different. Specifically, in this semiconductor device:
[0053] Within the active region 10, two adjacent sources are a first source (Source1) and a second source (Source2) at unequal potentials. Two gates are positioned between adjacent sources. When the semiconductor device is turned on, both gates conduct, enabling bidirectional conduction. When the semiconductor device is turned off, with the first source (Source1) at a high potential and the second source (Source2) at a low potential, the second gate (Gate2) is turned off, and the active region 10 between the first source (Source1) and the second gate (Gate2) bears the high voltage during turn-off. Conversely, with the first source (Source1) at a low potential and the second source (Source2) at a high potential, the first gate (Gate1) is turned off, and the active region 10 between the second source (Source2) and the first gate (Gate1) bears the high voltage during turn-off. This process effectively turns off the semiconductor device.
[0054] As can be seen, the semiconductor device in this embodiment mainly involves setting an isolation region around the active region of the epitaxial structure. When setting the electrodes in the active region, the uppermost and lowermost source electrodes are set to have the same potential, while adjacent source electrodes have different potentials. The isolation region contains at least one metal ring structure and at least one ion implantation region. This metal ring structure and ion implantation region effectively improve the reliability of the source electrodes within the active region, thereby achieving high reliability for the semiconductor device. Furthermore, the potential of the metal ring structure, the substrate, and the uppermost or lowermost source electrode of the active region are the same or approximately equal, which reduces electrochemical corrosion and completely eliminates the potential difference between the inside and outside of the metal ring structure, achieving high reliability.
[0055] Another embodiment of this utility model provides a semiconductor device with an equipotential electrode structure, such as a bidirectional, voltage-resistant, bidirectional GaN HEMT device, etc. In one case, such as Figure 2a The front view of the semiconductor device shown, and Figure 2b The semiconductor device shown follows the path as follows: Figure 2a The cross-sectional view shown by the dashed line illustrates the semiconductor device in this embodiment, which is similar to the one described above. Figure 1a Similar to the semiconductor device shown, the difference is that, in this embodiment, an ion implantation region 110 is provided outside the metal ring structure 111 of the isolation region 11. Specifically, in this embodiment, the semiconductor device:
[0056] The isolation region 11 includes two rings of ion implantation regions 110 and a ring of metal ring structure 111, with the ring of metal ring structure 111 disposed between the two rings of ion implantation regions 110.
[0057] In this way, the two-dimensional electron gas region below the metal ring structure 111 is at the same potential as the metal ring structure 111, and because the two-dimensional electron gas region is in a low-resistivity state, no voltage difference will be generated between different positions in this region. The voltage difference between the metal ring structure 111 and the dicing path of the epitaxial structure 12 on the substrate 13 is mainly borne by the high-resistivity peripheral ion implantation region 110 and the edge of the dicing path, so that electrochemical corrosion only occurs in the peripheral ion implantation region 110 and the edge of the dicing path, and will not further diffuse to the active region 10.
[0058] Compared to the above Figure 1a The semiconductor device shown has an ion implantation region 110 between the dicing channel and the metal ring structure 111. This controls the range of electrochemical corrosion within the outer ion implantation region, preventing electrochemical corrosion from penetrating into the chip and eliminating the risk of electrochemical corrosion, thus further enhancing the reliability of the semiconductor device.
[0059] In another case, such as Figure 2c The front view of the semiconductor device shown, and Figure 2d The semiconductor device shown follows the path as follows: Figure 2c The cross-sectional view shown by the dashed line indicates that the semiconductor device is similar to the one described above. Figure 1d The semiconductor device shown is similar, except that in this embodiment, an ion implantation region 110 is provided outside the metal ring structure 111 of the isolation region 11. Compared to the above... Figure 1d The semiconductor device shown has an ion implantation region 110 between the dicing channel and the metal ring structure 111. This controls the range of electrochemical corrosion within the outer ion implantation region, preventing electrochemical corrosion from penetrating into the chip and eliminating the risk of electrochemical corrosion, thus further enhancing the reliability of the semiconductor device.
[0060] Another embodiment of this utility model provides a semiconductor device with an equipotential electrode structure, such as a bidirectional, voltage-resistant, bidirectional GaN HEMT device. In one case, the front view of the semiconductor device is as follows: Figure 2a As shown, the semiconductor device follows the path as... Figure 2a The cross-sectional view shown by the dashed lines is as follows Figure 3a As shown, the semiconductor device in this embodiment is the same as that described above. Figure 2a The semiconductor devices shown are similar, except that in this embodiment, the semiconductor device contains:
[0061] A structure in which a field plate is mounted on a metal ring structure 111. This field plate can be connected to the metal ring structure 111, or it can be a floating field plate, such as... Figure 3a The diagram shows a connected field plate. This field plate can be positioned between the metal ring structure 111 and the cutting channel, or between the metal ring structure 111 and the active region 10, or on both sides, as shown below. Figure 3a The diagram shows that field plates are set on both sides.
[0062] By adding field plates, the electric field distribution between the metal ring structure 111 and the active region 10 and the dicing channel can be optimized, the electric field peak value can be reduced, and the reliability of the semiconductor device can be increased.
[0063] In another case, the front view of the semiconductor device is as follows: Figure 2c As shown, the semiconductor device follows the path as... Figure 2c The cross-sectional view shown by the dashed lines is as follows: Figure 3b As shown, the semiconductor device in this embodiment is the same as that described above. Figure 2c Similar to the semiconductor device shown, the difference is that in this embodiment, a field plate is provided on the metal ring structure 111. This field plate can be connected to the metal ring structure 111 or it can be a floating field plate, such as... Figure 3bThe diagram shows a connected field plate. This field plate can be positioned between the metal ring structure 111 and the cutting channel, or between the metal ring structure 111 and the active region 10, or on both sides, as shown below. Figure 4b The diagram shows that field plates are set on both sides.
[0064] Another embodiment of this utility model provides a semiconductor device with an equipotential electrode structure, such as a bidirectional, voltage-resistant, bidirectional GaN HEMT device, etc. A front view of the semiconductor device is shown below. Figure 4a As shown, the semiconductor device follows the path as... Figure 4a The cross-sectional view shown by the dashed lines is as follows: Figure 4b As shown, Figure 4a In this embodiment, a single metal ring structure 111 is represented by a white circle, and two ion implantation regions 110 are represented by black circles. The semiconductor device described above is similar to the one described above. Figure 2b Similar to the semiconductor device shown, the difference is that in this embodiment, the two rings of ion implantation regions 110 are connected together. Specifically, in this embodiment, the semiconductor device:
[0065] If the isolation region 110 includes two rings of ion implantation regions 110, the two rings of ion implantation regions 110 are connected as a whole within the epitaxial structure 12, while in the other embodiments described above, the two rings of ion implantation regions 110 are completely isolated within the epitaxial structure 12.
[0066] Connecting the ion-implanted regions 110 into a single unit slightly weakens the suppression of electrochemical corrosion, but still ensures high reliability of the semiconductor device. However, combining the solution of shorting the metal ring structure 111 and the substrate 13 via TGV or wire bonding with the solution of connecting the ion-implanted regions 110 into a single unit in this embodiment can significantly reduce the likelihood of electrochemical corrosion.
[0067] It should be noted that in the above embodiments, the metal ring structure 111 of the semiconductor device is connected to the epitaxial structure 12 of the semiconductor device. In other specific embodiments, the metal ring structure 111 may not be connected to the underlying two-dimensional electron gas or epitaxial layer, that is, an insulating dielectric layer may exist between the metal ring structure 111 and the epitaxial structure 12. In this way, the suppression effect on electrochemical corrosion is slightly weaker, but the semiconductor device can still have high reliability. However, if the metal ring structure 111 and the substrate 13 are shorted by TGV or packaging wire bonding, the possibility of electrochemical corrosion can also be greatly reduced.
[0068] In another case, the front view of the semiconductor device is as follows: Figure 4c As shown, the semiconductor device follows the path as... Figure 4c The cross-sectional view shown by the dashed lines is as follows: Figure 4d As shown, Figure 4c In this embodiment, a single metal ring structure 111 is represented by a white circle, and two ion implantation regions 110 are represented by black circles. The semiconductor device described above is similar to the one described above. Figure 2c Similar to the semiconductor device shown, the difference is that in this embodiment, the two rings of ion implantation regions 110 are connected together.
[0069] The above provides a detailed description of a semiconductor device provided by the embodiments of this utility model. Specific examples have been used to illustrate the principle and implementation of this utility model. The description of the above embodiments is only for the purpose of helping to understand the core idea of this utility model. At the same time, for those skilled in the art, there will be changes in the specific implementation and application scope based on the idea of this utility model. Therefore, the content of this specification should not be construed as a limitation of this utility model.
Claims
1. A semiconductor device having an equipotential electrode structure, characterized in that, include: An epitaxial structure is disposed on a substrate, the epitaxial structure including an active region and an isolation region surrounding the active region, wherein: The active region includes multiple sources of the semiconductor device and gates corresponding to the sources. The uppermost source and the lowermost source of the active region are electrodes with the same potential, and adjacent source electrodes are electrodes with different potentials. The isolation region surrounds the electrode in the active region and includes at least one ring of ion implantation region and at least one ring of metal ring structure. The metal ring structure and the ion implantation region are disposed in the isolation region at intervals, and the ring of ion implantation region is closest to the electrode in the active region. The potential of the metal ring structure, the substrate, and the source electrode at the uppermost or lowermost end of the active region are the same or approximately equal.
2. The semiconductor device according to claim 1, characterized in that, The metal ring structure is connected to the substrate through a through-hole on the epitaxial structure, or the metal ring structure is connected to the substrate through internal metal interconnects and external encapsulation wire bonding.
3. The semiconductor device as described in claim 2, characterized in that, The active region includes multiple sets of electrodes, each set of electrodes including a source electrode and a gate electrode surrounding the source electrode, and the potentials of the source electrodes included in adjacent electrode sets are not equal.
4. The semiconductor device as described in claim 3, characterized in that, The isolation region includes an ion implantation area and a metal ring structure, wherein the metal ring structure is disposed outside the ion implantation area.
5. The semiconductor device as described in claim 3, characterized in that, The isolation region includes two ion implantation areas and a metal ring structure, with the metal ring structure disposed between the two ion implantation areas.
6. The semiconductor device as claimed in claim 1, characterized in that, An insulating dielectric layer exists between the metal ring structure and the epitaxial structure.
7. The semiconductor device as claimed in claim 2, characterized in that, Each electrode in the active region is a strip electrode. Two gates are disposed between two adjacent first source electrodes and second source electrodes in the active region. When the semiconductor device is turned on, the two gates are turned on. When the semiconductor device is turned off, the second gate is turned off when the first source electrode is at a high potential and the second source electrode is at a low potential, and the first gate is turned off when the first source electrode is at a low potential and the second source electrode is at a high potential.
8. The semiconductor device as claimed in claim 7, characterized in that, The isolation region includes an ion implantation area and a metal ring structure, wherein the metal ring structure is disposed outside the ion implantation area.
9. The semiconductor device as claimed in claim 7, characterized in that, The isolation region includes two ion implantation areas and a metal ring structure, with the metal ring structure disposed between the two ion implantation areas.