Chip structure
By using a combination of a first metal dam and an organic dam in the image sensor chip packaging structure, the substrate connection is optimized, the problem of large chip packaging structure size is solved, and the chip structure is made thinner and lighter while the electrical connection efficiency is improved.
Patent Information
- Application Number
- CN202422637523.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2034-10-30
AI Technical Summary
In existing technologies, image sensor chip packaging structures are large in size, which cannot meet the requirements of multi-chip application scenarios, and metal support dams are costly and have complex electrical connection methods.
A first metal dam structure is used to connect the first substrate and the second substrate. Combined with a conductive layer and an organic dam, a surrounding structure is formed, which reduces the trace space, increases support and sealing, and optimizes the chip structure size through multi-layer substrate stacking.
It achieves a thinner and lighter chip structure, reduces space occupation, improves electrical connection efficiency and hermeticity, and meets the needs of multi-chip applications.
Smart Images

Figure CN223553686U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor packaging and testing, and in particular to a chip structure. Background Technology
[0002] Image sensor chip packaging structures typically include a cover plate, a chip, and a support dam. The support dam is generally a hybrid support dam made of organic and metal materials. All-metal manufacturing is too expensive, so metal support dams improve airtightness, while organic support dams provide more support.
[0003] In existing technologies, metal support dams are typically placed on the outer periphery of the chip package structure to achieve a better sealing effect, and electrical coupling between the chip and the cover plate is achieved through other electrical connection methods. In multi-chip application scenarios, the chip package structure is too large to meet the requirements. Utility Model Content
[0004] One of the objectives of this invention is to provide a chip structure to solve the technical problem of large chip packaging structure size in the prior art.
[0005] To achieve one of the above-mentioned objectives of the utility model, one embodiment of the utility model provides a chip structure including a first substrate, a second substrate, and a first dam structure for connecting the first substrate and the second substrate. The first substrate has a first welding portion, the second substrate has a second functional area and a second welding portion, the first dam structure is disposed outside the second functional area, and the first dam structure includes at least a first metal dam, the first metal dam being electrically connected to the first welding portion and the second welding portion.
[0006] As a further improvement of one embodiment of the present invention, the chip structure includes a conductive layer disposed between the first metal dam and the first welding part, and / or a conductive layer disposed between the first metal dam and the second welding part.
[0007] As a further improvement of one embodiment of the present invention, the first dam structure includes a first organic dam surrounding the first metal dam.
[0008] As a further improvement of one embodiment of the present invention, the chip structure includes a second dam structure surrounding the first dam structure, and there is a gap between the first dam structure and the second dam structure.
[0009] As a further improvement of one embodiment of the present invention, the chip structure includes an insulating layer disposed between the second dam structure and the first substrate, and / or an insulating layer disposed between the second dam structure and the second substrate.
[0010] As a further improvement of one embodiment of the present invention, the second dam structure includes a second metal dam and a second organic dam arranged around the second metal dam, wherein the second metal dam is located outside the first welded part and the second welded part.
[0011] As a further improvement of one embodiment of the present invention, the second welding part is located on the surface of the second substrate close to the first substrate, and the chip structure includes a second welding post that penetrates the second substrate along its thickness direction, and the two ends of the second welding post are respectively connected to the second solder pad and the external circuit board.
[0012] As a further improvement of one embodiment of the present invention, the chip structure includes a third substrate located on the side of the first substrate away from the second substrate and a third dam structure for connecting the first substrate and the third substrate. The third substrate has a third functional area and a third welding part. The third dam structure is disposed outside the third functional area. The third dam structure includes at least a third metal dam. The third metal dam is electrically connected to the first welding part and the third welding part.
[0013] As a further improvement of one embodiment of the present invention, the third welding portion is located on the surface of the third substrate facing the first substrate, and the chip structure includes a conductive layer located between the third metal dam and the third welding portion.
[0014] As a further improvement of one embodiment of the present invention, the third welding part is located on the surface of the third substrate away from the first substrate, and the chip structure includes a third welding post that penetrates the third substrate along its thickness direction, and the two ends of the third welding post are connected to the third welding part and the third metal dam.
[0015] Compared with the prior art, the present invention provides a chip structure in which a first metal dam is used to realize the electrical connection between the first substrate and the second substrate, reduce the wiring between the first substrate and the second substrate, reduce space occupation, and reduce the size of the chip structure. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of the chip structure in one embodiment of the present invention.
[0017] Figure 2 This is a schematic diagram illustrating the process of fabricating a chip structure according to one embodiment of the present invention.
[0018] Figure 3 This is a schematic diagram of the chip structure in another embodiment of the present invention.
[0019] Figure 4 This is a schematic diagram illustrating the process of fabricating a chip structure in another embodiment of the present invention. Detailed Implementation
[0020] The present invention will now be described in detail with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional modifications made by those skilled in the art based on these embodiments are included within the protection scope of the present invention.
[0021] It should be noted that the term "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," "third," "fourth," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0022] The terms “connection,” “connected to,” or any other variations are intended to encompass various relative positions where a connection exists, including both direct and indirect connections. A direct connection can be formed through a pneumatic conduit, while an indirect connection can be formed through devices such as valves or sensors, through pneumatic components such as brake control units, or through any other medium such as air.
[0023] Please see Figure 1 This is a schematic diagram of a chip structure 1000 provided in an embodiment of the present invention.
[0024] The chip structure 1000 includes a first substrate 100, a second substrate 200, and a first dam structure 110 for connecting the first substrate 100 and the second substrate 200. The first substrate 100 has a first soldering portion 101, and the second substrate 200 has a second functional area 202 and a second soldering portion 201. The first dam structure 110 is disposed outside the second functional area 202. The first dam structure 110 includes at least a first metal dam 111, and the first metal dam 111 is electrically connected to the first soldering portion 101 and the second soldering portion 201.
[0025] Thus, the first metal dam 111 is used to realize the electrical connection between the first substrate 100 and the second substrate 200, reduce the wiring between the first substrate 100 and the second substrate 200, reduce space occupation, and reduce the size of the chip structure.
[0026] It is understood that the first metal dam 111 should be an intermittent ring structure to prevent the formation of passages between a number of first welded parts 101 and / or between a number of second welded parts 201.
[0027] The first welding part 101 can be optionally disposed on the surface of the first substrate 100 facing the second substrate 200 or away from the surface of the second substrate 200. When the first welding part 101 is disposed on the surface of the first substrate 100 facing the second substrate 200, the first metal dam 111 is directly connected to the first welding part 101. When the first welding part 101 is disposed on the surface of the first substrate 100 away from the second substrate 200, the first metal dam 111 is connected to the first welding part 101 through the first welding post 103.
[0028] The second welding part 201 can be optionally disposed on the surface of the second substrate 200 facing the first substrate 100 or away from the first substrate 100. When the second welding part 201 is disposed on the surface of the second substrate 200 facing the first substrate 100, the first metal dam 111 is directly connected to the second welding part 201. When the second welding part 201 is disposed on the surface of the second substrate 200 away from the first substrate 100, the first metal dam 111 is connected to the second welding part 201 through the second welding post 203.
[0029] In one embodiment, when the first metal dam 111 is directly connected to the first welding part 101, the chip structure 1000 includes a conductive layer disposed between the first metal dam 111 and the first welding part 101 to enhance the conductivity between the first metal dam 111 and the first welding part 101. The conductive layer may be a conductive adhesive coated on the first welding part 101.
[0030] In one embodiment, when the first metal dam 111 is directly connected to the second welding part 201, the chip structure 1000 includes a conductive layer disposed between the first metal dam 111 and the second welding part 201 to enhance the conductivity between the first metal dam 111 and the second welding part 201. The conductive layer may be a conductive adhesive coated on the second welding part 201.
[0031] In one embodiment, when both ends of the first metal dam 111 are directly connected to the second welding part 201, the chip structure 1000 includes a conductive layer disposed between the first metal dam 111 and the first welding part 101, and a conductive layer disposed between the first metal dam 111 and the second welding part 201, to enhance the conductivity between the first metal dam, the first welding part 101, and the second welding part 201. The conductive layer may be a conductive adhesive coated on the first welding part 101 and the second welding part 201.
[0032] The first dam structure 110 also includes a first organic dam 112 surrounding the first metal dam 111. The first metal dam 111 is made of a relatively soft metal, and the first organic dam 112 is provided to enhance the supporting force. The first dam structure 110 is ring-shaped, wherein the first metal dam 111 is an intermittent ring structure, and the first organic dam 112 is a continuous ring structure to enclose and form a sealed functional area.
[0033] The first dam structure 110 is used to connect the first substrate 100 and the second substrate 200. During the metal bonding process, the first metal dam 111 will be squeezed and deformed, and its height along the thickness direction will decrease and spread to both sides. Therefore, in order to leave space for bonding, in actual application scenarios, the height of the first organic dam 112 will be lower than that of the first metal dam 111, so as to leave space for the first metal dam 111 to be squeezed and deformed to both sides.
[0034] The chip structure 1000 includes a second dam structure 120 surrounding the first dam structure 110. There is a gap between the first dam structure 110 and the second dam structure 120. As described above, after the first metal dam 111 is squeezed and deformed to both sides, the end metal material of the first metal dam 111 is squeezed into the space corresponding to the first organic dam 112, and may even be squeezed to both sides beyond the first organic dam 112. Therefore, the gap between the first dam structure 110 and the second dam structure 120 can further provide space for the squeezed metal material.
[0035] The second dam structure 120 is ring-shaped, and the second dam structure 120 is a continuous ring structure. In this way, a double-ring seal is set to enhance the sealing and support.
[0036] In one embodiment, the second dam structure 120 includes a second metal dam 121, which is located outside the first welded portion 101 and the second welded portion 102. It is understood that the second metal dam 121 is not used for electrical connection, and therefore, it can be configured as a continuous annular structure.
[0037] The second dam structure 120 also includes a second organic dam 122 surrounding the second metal dam 121. On the one hand, it is used to strengthen the support force, and on the other hand, it can prevent the second metal dam 121 from contacting the metal material extruded from the first metal dam 111, thus avoiding the formation of an electrical connection between the first metal dam 111 and the second metal dam 121.
[0038] In other embodiments, it is also feasible to separately provide a second metal cofferdam 121 for the second cofferdam structure 120, as long as there is a suitable gap between the second metal cofferdam 121 and the first cofferdam structure 120. Alternatively, it is also feasible to separately provide a second organic cofferdam 122 for the second cofferdam structure 120.
[0039] In one embodiment, the chip structure 1000 includes an insulating layer disposed between the second dam structure 120 and the first substrate 100. The second dam structure 120 is first formed on the surface of the second substrate 200 and then bonded to the first substrate 100 through the insulating layer. The insulating layer may be a bonding adhesive.
[0040] In one embodiment, the chip structure 1000 includes an insulating layer disposed between the second dam structure 120 and the second substrate 200. The second dam structure 120 is first formed on the surface of the first substrate 100 and then bonded to the second substrate 200 through the insulating layer. The insulating layer may be a bonding adhesive.
[0041] In one embodiment, the chip structure 1000 includes an insulating layer disposed between the second dam structure 120 and the first substrate 100, and an insulating layer disposed between the second dam structure 120 and the second substrate 200. The second dam structure 120 is formed separately and then bonded to the first substrate 100 and the second substrate 200 respectively. The insulating layer may be a bonding adhesive.
[0042] In one embodiment, the second soldering portion 201 is located on the surface of the second substrate 200 near the first substrate 100, and the chip structure 1000 includes a second soldering post 203 that penetrates the second substrate 200 along its thickness direction, with the two ends of the second soldering post 203 respectively connected to the second solder pad portion 201 and an external circuit board.
[0043] Combination Figure 1 As shown, the second substrate 200 is the bottom substrate, the second functional area 202 is located on the surface close to the first substrate 100, and the area corresponding to the second functional area 202 is formed as a sealing area.
[0044] The first welding part 101 and the first functional area 102 are disposed on the side of the first substrate 100 away from the second substrate 200. The first welding post 103 penetrates the first substrate 100 along the thickness direction. The two ends of the first welding post 103 are respectively connected to the first welding part 101 and the first metal dam 111.
[0045] Alternatively, the first welding portion 101 and the first functional area 102 are disposed on the side of the first substrate 100 facing the second substrate 200, and the two ends of the first metal dam 111 are respectively connected to the first welding portion 101 and the second welding portion 102.
[0046] In one embodiment, the chip structure includes a third substrate 300 located on the side of the first substrate 100 opposite to the second substrate 200, and a third dam structure 130 for connecting the first substrate 100 and the third substrate 300. The third substrate 300 has a third functional area 302 and a third solder joint 301. The third dam structure 130 surrounds the third functional area 302 and includes at least a third metal dam 131, which electrically connects the first solder joint 101 and the third solder joint 301. This design is suitable for stacked structures with multiple substrates, ensuring that the resulting chip structure size is not excessive and meets practical requirements.
[0047] Combination Figure 1 As shown, the third substrate 300, the first substrate 100, and the second substrate 200 are stacked sequentially along the height direction. The specific configuration of the third dam structure 130 can be referred to the first dam structure 110, and will not be described in detail here.
[0048] In this embodiment, the third welding part 301 is located on the surface of the third substrate 300 away from the first substrate 100, and the chip structure 1000 includes a third welding post 303 that penetrates the third substrate 300 along its thickness direction. The two ends of the third welding post 303 are respectively connected to the third welding part 301 and the third metal dam.
[0049] Since both the third welding portion 301 and the third functional area 302 face away from the first substrate 100, the chip structure 1000 includes a cover plate 400 disposed on the third substrate 300 facing away from the first substrate 100 to form a sealed area corresponding to the third functional area 302. The third substrate 300 and the cover plate 400 are still bonded together by metal dams and / or organic dams.
[0050] The following combination Figure 2 Briefly describe a method for manufacturing a 1000-chip structure.
[0051] Provide a cover plate 400, on which a metal dam and / or an organic dam is constructed, as per [reference]. Figure 2 a.
[0052] A third substrate 300 is provided, and a cover plate 400 is bonded together. The third welding portion 301 and the third functional area 302 of the third substrate 300 face the cover plate 400.
[0053] A third welding post 303 is fabricated on the side of the third substrate 300 away from the cover plate 400, and the third welding post 303 is connected to the third welding part 301.
[0054] A third dam structure 130 and a fourth dam structure 140 located outside the third dam structure 130 are fabricated on the side of the third substrate 300 opposite to the cover plate 400. The third metal dam 131 is correspondingly connected to the third welded column 303, as shown in the figure. Figure 2 b.
[0055] A first substrate 100 is provided, and a third substrate 300 and the first substrate 100 are bonded together.
[0056] Repeat the above steps to fabricate a first dam structure 110 and a second dam structure 120 on the side of the first substrate 100 opposite to the third substrate 300, provide a second substrate 200, and bond the second substrate 200 and the first substrate 100 together.
[0057] Finally, solder balls are formed on the side of the second substrate 200 opposite to the first substrate 100 to connect the second solder part 201 and the external circuit board, as shown in the figure. Figure 2 c.
[0058] Understandably, although this case demonstrates a stacked structure of three substrates, in practical applications, more substrates can be stacked as needed.
[0059] Combination Figure 3 As shown, in another embodiment, the third welding portion 301 and the third functional area 302 are located on the surface of the third substrate 300 facing the first substrate 100, and the two ends of the third metal dam 131 are respectively connected to the third welding portion 301 and the first welding portion 101. The chip structure 1000 includes a conductive layer located between the third metal dam 131 and the third welding portion 301, and the conductive layer can be conductive adhesive. The formed chip structure 1000 is relatively thin.
[0060] The following combination Figure 4 This paper briefly describes another method for manufacturing a chip structure 1000. This method mainly utilizes a peeling process to reduce the thickness of a cover plate 400.
[0061] A cover plate 400 is provided, a stripping layer 410 is formed on the cover plate 400, a third cofferdam structure 130 and a fourth cofferdam structure 140 located outside the third cofferdam structure 130 are formed on the surface of the stripping layer 410, as shown in the figure. Figure 4 a.
[0062] A first substrate 100 is provided, and a cover plate 400 is bonded together. The first solder portion 101 and the first functional area 102 of the first substrate 100 are opposite to the cover plate 400. (Refer to...) Figure 4 b.
[0063] The key point is that the cover plate 400 is peeled off through the peeling layer 410. At this time, the third dam structure 130 and the fourth dam structure have been bonded to the first substrate 100.
[0064] A third substrate 300 is provided to replace the cover plate 400 and is bonded to the first substrate 100, which is equivalent to bonding the third substrate 100, the third dam structure 130, and the fourth dam structure, as shown in the figure. Figure 4 c. Thus, the cover plate 400 can be peeled off, reducing the thickness of one cover plate 400 layer, which is beneficial to the thinning of the chip structure 1000.
[0065] The following steps are the same as the first method:
[0066] A first dam structure 110 and a second dam structure 120 are formed on the side of the first substrate 100 opposite to the third substrate 300, and a second substrate 200 is provided to bond the second substrate 200 and the first substrate 100 together.
[0067] Solder balls are formed on the side of the second substrate 200 opposite to the first substrate 100 to connect the second solder part 201 and the external circuit board.
[0068] Similarly, although this embodiment demonstrates a stacked structure of three substrates, in practical applications, more substrates can be stacked as needed.
[0069] The beneficial effects of this utility model are as follows: the first metal dam 111 is used to realize the electrical connection between the first substrate 100 and the second substrate 200, reduce the wiring between the first substrate 100 and the second substrate 200, reduce space occupation, and reduce the size of the chip structure; the first organic dam 112 is used to form a sealing functional area; the second dam structure 120 further enhances the airtightness and support; in the application scenario of multiple substrate stacking, the setting of the first metal dam 111 and the third metal dam 131 reduces space occupation and is conducive to the thinning of the chip structure.
[0070] This can be formed by referring to any of the technical solutions provided above, and will not be elaborated here.
[0071] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
[0072] The detailed descriptions listed above are merely specific descriptions of feasible implementations of this utility model, and are not intended to limit the scope of protection of this utility model. All equivalent implementations or modifications made without departing from the spirit of this utility model should be included within the scope of protection of this utility model.
Claims
1. A chip structure, characterized in that, A first substrate, a second substrate, and a first dam structure for connecting the first substrate and the second substrate, the first substrate having a first welding portion, the second substrate having a second functional area and a second welding portion, the first dam structure being disposed outside the second functional area, the first dam structure including at least a first metal dam, the first metal dam being electrically connected to the first welding portion and the second welding portion.
2. The chip structure according to claim 1, characterized in that, The chip structure includes a conductive layer disposed between the first metal dam and the first welded portion, and / or a conductive layer disposed between the first metal dam and the second welded portion.
3. The chip structure according to claim 1, characterized in that, The first dam structure includes a first organic dam surrounding the first metal dam.
4. The chip structure according to claim 1, characterized in that, The chip structure includes a second dam structure surrounding the first dam structure, with a gap between the first dam structure and the second dam structure.
5. The chip structure according to claim 4, characterized in that, The chip structure includes an insulating layer disposed between the second dam structure and the first substrate, and / or an insulating layer disposed between the second dam structure and the second substrate.
6. The chip structure according to claim 4, characterized in that, The second dam structure includes a second metal dam and a second organic dam surrounding the second metal dam, the second metal dam being located outside the first welded portion and the second welded portion.
7. The chip structure according to claim 1, characterized in that, The second soldering portion is located on the surface of the second substrate near the first substrate. The chip structure includes a second soldering post that penetrates the second substrate along its thickness direction. The two ends of the second soldering post are respectively connected to a second solder pad portion and an external circuit board.
8. The chip structure according to claim 1, characterized in that, The chip structure includes a third substrate located on the side of the first substrate away from the second substrate, and a third dam structure for connecting the first substrate and the third substrate. The third substrate has a third functional area and a third welding part. The third dam structure is disposed outside the third functional area. The third dam structure includes at least a third metal dam. The third metal dam is electrically connected to the first welding part and the third welding part.
9. The chip structure according to claim 8, characterized in that, The third welding portion is located on the surface of the third substrate facing the first substrate, and the chip structure includes a conductive layer located between the third metal dam and the third welding portion.
10. The chip structure according to claim 8, characterized in that, The third welding portion is located on the surface of the third substrate opposite to the first substrate. The chip structure includes a third welding post that penetrates the third substrate along its thickness direction. The two ends of the third welding post are connected to the third welding portion and the third metal dam.