Differential amplifier and ultraviolet spectrum rapid acquisition system
By using a differential amplifier and a fast acquisition system, the problem of insufficient acquisition speed of CMOS sensors under xenon lamp light sources was solved, achieving high-precision and efficient spectral data acquisition and improving the analyzer's processing speed and data reliability.
Patent Information
- Application Number
- CN202422905986.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-27
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2034-11-27
AI Technical Summary
Existing technologies cannot meet the spectral acquisition requirements of high-sensitivity CMOS sensors per unit time when using xenon lamp light sources, resulting in insufficient acquisition speed.
A fast acquisition system composed of differential amplifiers, photoelectric conversion units, emitter followers, high-speed differential AD, FPGA and MCU is used. The FPGA generates the driving timing and data processing, and the LVDS interface is combined to realize high-speed data transmission and improve acquisition efficiency.
It achieves high-precision and high-speed spectral data acquisition, enabling the acquisition of more sample data per unit time, thereby improving the analyzer's processing speed and data reliability.
Smart Images
Figure CN223567593U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the technical field of spectrum signal detection and the technical field of flue gas component detection. BACKGROUND
[0002] At present, in the online ultraviolet analyzer, the scheme of light source mainly has deuterium lamp, pulse xenon lamp light source. Deuterium lamp is widely used in ultraviolet optical analysis instrument because of its high stability, and the spectral coverage range is mainly concentrated in the ultraviolet region, about 185~400 nm, which provides good matching for ultraviolet spectrum measurement. In comparison, although xenon lamp can also be used for ultraviolet spectrum measurement, its main advantage lies in providing wide spectral coverage (from ultraviolet to near infrared region) and high intensity light source.
[0003] At present, the existing technical scheme adopts the mode of xenon lamp+MCU+AD+RAM to realize spectrum acquisition, and the advantage lies in that the circuit structure is relatively simple, and there is sufficient data processing resource for CMOS sensor with low acquisition speed requirement. The disadvantage is that when processing high sensitivity CMOS, the required sample number in unit time cannot be met. SUMMARY
[0004] Therefore, the utility model provides a kind of differential amplifier, including: U1A unit, U1B unit, U2A unit and U2B unit;The U2A unit includes OPA2320AIDR chip, resistance R2, resistance R3, resistance R4 and resistance R6;The U2A unit is used to receive the positive phase signal of CMOS and process;The U2B unit includes OPA2320AIDR chip, resistance R8, resistance R9, resistance R11 and resistance R12;The U2B unit is used to receive the negative phase signal of CMOS and process;The U1A unit includes: OPA2320AIDR chip, resistance R1 and resistance R5;The U1A unit is used to export the positive phase signal of CMOS after being processed with lower impedance.The U1B unit includes: OPA2320AIDR chip, resistance R7 and resistance R10;The U1B unit is used to export the negative phase signal of CMOS after being processed with lower impedance.
[0005] The utility model also provides a kind of ultraviolet spectrum rapid acquisition system, including: differential amplifier, photoelectric conversion unit, emitter follower, high-speed differential AD, FPGA and MCU;
[0006] The photoelectric conversion unit is used to convert ultraviolet spectrum signal into corresponding analog voltage signal;
[0007] The emitter follower is used to output analog voltage signal of the photoelectric conversion unit to the differential amplifier without attenuation;
[0008] The differential amplifier is used for lifting the non-attenuated analog voltage signal of the emitter follower output by 1 / 2VCC to output two groups of signals, i.e.
[0009] The high-speed differential AD is used for converting the differential analog signal output by the differential amplifier into a digital signal; meanwhile, the driving timing generated by the FPGA is received; the level conversion chip is connected with the photoelectric conversion unit and the FPGA respectively; the FPGA sends a control timing driving signal to the photoelectric conversion unit; the FPGA sends a driving timing signal to the high-speed differential AD and simultaneously receives the data converted and output by the high-speed differential AD, and outputs the data processed to the MCU.
[0010] Further, the photoelectric conversion unit is a CMOS, and the model of the CMOS is S11639.
[0011] Further, the model of the FPGA is EG4X20BG256B.
[0012] Further, the communication interface between the high-speed differential AD and the FPGA adopts an LVDS interface.
[0013] The circuit provided by the utility model has the functions of surge protection, static electricity protection, overvoltage and overcurrent protection and reverse connection protection. BRIEF DESCRIPTION OF DRAWINGS
[0014] Figure 1 It is a circuit structure diagram.
[0015] Figure 2 It is a S11639 driving timing diagram.
[0016] Figure 3 It is an original spectrum diagram.
[0017] Figure 4 It is a concentration output diagram.
[0018] Figure 5 It is a differential amplifier component diagram. DETAILED DESCRIPTION
[0019] EMBODIMENT
[0020] The device provided by the utility model has good acquisition effect by adopting master-slave matching method, high precision, large data transmission, state machine type data acquisition, interruption by any event, so that the obtained spectrum data is more secure and reliable, and the operation speed of the analysis instrument product is improved.
[0021] FPGA: is a kind of integrated chip mainly with digital circuit, belongs to programmable logic device (programmable logic device, pld) one kind;As a kind of semi-custom circuit in the field of application-specific integrated circuit (asic), both solve the shortage of custom circuit, and overcome the limitation of the original programmable device gate circuit number.In the utility model, it is the hardware system of data signal acquisition and processing.
[0022] MCU: (microcontroller unit) is a kind of small computer chip integrated all necessary components to perform calculation and control task, mainly used in embedded system.In the utility model, it is the main control and calculation of system.
[0023] LVDS: (Low Voltage Differential Signaling) low voltage differential signal, adopts extremely low voltage swing high-speed differential transmission data, can realize point-to-point or one-point-to-multipoint connection, with low power consumption, low error rate, low crosstalk and low radiation etc.LVDS is the physical connection mode of FPGA and high-speed differential AD conversion chip.
[0024] DOAS: differential optical absorption spectroscopy (DOAS:Differential Optical Absorption Spectroscopy) is a kind of spectral monitoring technology, its basic principle is to use the narrow-band absorption characteristics of gas molecules in air to identify gas composition, and deduce the concentration of trace gas according to the narrow-band absorption intensity.
[0025] The utility model provides a kind of ultraviolet spectrum rapid acquisition system, using the mode of combination of FPGA+MCU, sensor CMOS spectrum signal is driven, collected and analyzed.
[0026] As Figure 1 As shown in the utility model provides a kind of ultraviolet spectrum rapid acquisition system, by MCU1, FPGA2, CMOS (photoelectric conversion unit) 3, emitter follower 4, high-speed differential AD 5, differential amplifier 6, level conversion chip 7, host computer processing unit 8 and reference voltage unit 9 etc.
[0027] Wherein, the MCU is provided with RS232 chip 11 and RS485 chip 12;
[0028] The MCU is connected with host computer RS232 interface processing unit by the TXD and RXD pins of the RS232 chip.
[0029] The MCU is connected with instrument RS485 signal processing unit by the A and B pins of the RS485 chip.
[0030] The host processing unit is a PC or an analyzer. The host processing unit sends control commands to the MCU through an RS232 interface. The MCU identifies the command type and performs corresponding actions, whether reading the spectrum or reading the concentration. The FPGA sends control timing to drive the CMOS detector S11639, so that the CMOS enters the detection output state. At the same time, the FPGA also generates high-speed differential AD driving timing, so that it can normally convert and output data. The converted data is sent to the MCU by the FPGA in the form of a 16-bit parallel bus. The FPGA outputs a falling edge trigger signal to inform the MCU to receive data. The MCU enters interrupt to receive data when detecting the falling edge trigger signal. After processing the collected data, the MCU sends the data to the host processing unit. The host processing unit sends instructions through the RS232, including basic parameter setting, integration time setting, filter number, reading spectrum, reading concentration, linear fitting, range and zero point calibration command. The MCU executes the host processing unit command in the idle state, sends the command data to the FPGA module through the parallel bus, and the FPGA detects the corresponding instructions. After receiving the corresponding instructions, the FPGA executes the internal driving CMOS detector S11639 and high-speed differential AD acquisition chip AD7961 to collect the spectrum. Finally, after software filtering processing, data truncation processing, DOAS technology processing and multi-order fitting, the voltage signal of the collected data is finally inverted to obtain useful spectral information and concentration data.
[0031] The MCU and the FPGA are connected by a 16-bit parallel bus and an 8-bit control line to realize the functions of timing control and fast data transmission between chips.
[0032] The MCU and the FPGA data communication uses 16-bit parallel bus data transmission and 8-bit control line to complete the transmission of data and commands between modules. The MCU communication is provided with an RS485 port and an S232 port. The MCU is internally provided with a RAM, and the RAM is a storage unit of 128K+64K. The MCU sends protocol frame data through RS232 or RS485, which includes frame header, command, data, checksum, frame tail and part. The MCU runs in the form of a state machine, waits to receive the host's command and data to perform corresponding functions. The model of the MCU is STM32F407.
[0033] The EEPROM is connected to the I / O port of the MCU through an I2C bus.
[0034] The driving port of the FPGA is connected with the SPI port of the high-speed differential AD and connected in the LVDS mode. The signal connection between the FPGA and the CMOS is connected with each pin through a level conversion chip, which plays a function of conversion of level mismatch between chips and interface protection. The FPGA is used to generate a driving control timing of the CMOS, including two input signals and three output signals, the input signals being a CLK clock signal, an ST integral signal, an output timing signal Trig, a scanning end signal EOS and a spectral image output Video signal, so that the CMOS enters a state of detection and output of spectrum according to the driving control timing. The FPGA is also used to generate a driving timing of the high-speed differential AD conversion chip, so that the high-speed differential AD conversion chip can normally convert and output converted data according to the driving timing. After receiving the converted data, the FPGA sends the data to the MCU in the mode of 16-bit parallel bus and outputs a falling edge trigger signal to inform the MCU to receive data. The model of the FPGA is EG4X20BG256B.
[0035] The high-speed differential AD is used to convert an analog signal output by the differential amplifier into a digital signal. The technical indexes of the high-speed differential AD are as follows: a sampling rate of 5MSPS, a signal-to-noise ratio (SNR) of 95.5 dB, an integral nonlinearity (INL) of ±0.2 LSB and a differential nonlinearity (DNL) of ±0.14 LSB. The FPGA communication interface of the high-speed differential AD adopts an LVDS interface, which can effectively reduce the bit error rate of communication between the high-speed differential AD acquisition chip and the FPGA and the difficulty of PCB wiring. The model of the high-speed differential AD acquisition chip is AD7961.
[0036] The high-speed differential AD is in communication with a reference voltage unit signal line, and the high-speed differential AD determines a detection range according to a set value of the reference voltage unit.
[0037] The differential amplifier includes a U1A unit, a U1B unit, a U2A unit and a U2B unit.
[0038] The pin 3 of the U2A unit of the chip OPA2320AIDR is connected with resistors R2 and R3 with resistances of 110K and 150K, respectively, a resistor R4 with a resistance of 150K is connected with the pin 2 of the U2A unit, and a resistor R6 with a resistance of 150K is connected with the pin 2 and the pin 1 of the U2A unit. The U2A unit processes and outputs a positive phase signal of the CMOS.
[0039] The pin 6 of the U2B unit of the chip OPA2320AIDR is connected with R9 with resistance of 150K, the pin 7 of the U2B unit is connected with R8 with resistance of 150K, and the pins 5 of the U2B unit are connected with R11 and R12 with resistance of 150K; the U2B unit processes and outputs the inverted phase signal of the CMOS.
[0040] The pin 3 of the U1A unit of the chip OPA2320AIDR is connected with OR resistor R5, and the pins 1 and 2 of the U1A unit are connected with R1 of the OR resistor respectively; the U1A unit is used for outputting the processed positive phase signal of the CMOS with lower impedance.
[0041] The pin 5 of the U1B unit of the chip OPA2320AIDR is connected with OR resistor R10, and the pins 6 and 7 of the U1B unit are connected with R7 of the OR resistor respectively; the U1B unit is used for outputting the processed inverted phase signal of the CMOS with lower impedance.
[0042] The differential amplifier is used for pre-processing the AC signal output by the CMOS, and the differential amplifier realizes the function of the adder by using the operational amplifier to raise the signal by 1 / 2 VCC, that is, to raise the negative half-axis signal to the positive half cycle above zero. At the same time, the single-ended signal output by the CMOS is converted into differential signals, that is, the in-phase signal and the inverted 180° signal. The in-phase signal and the inverted signal output by the differential amplifier are connected to IN+ and IN- of the high-speed differential AD respectively.
[0043] The emitter follower is arranged between the CMOS and the differential amplifier, the spectral signal output by the CMOS is connected to the emitter follower, the amplification factor is approximately 1, and the characteristics of high input impedance and low output impedance ensure that the signal is output to the subsequent circuit without attenuation. The output signal of the emitter follower is connected to the non-inverting input end R3 and the inverting input end R9 of the differential amplifier.
[0044] The photoelectric conversion unit is used for realizing photoelectric conversion, that is, converting the ultraviolet spectral information into corresponding analog voltage signals. The photoelectric conversion unit is a CMOS, and the model of the CMOS is S11639. The CMOS has the characteristics of high sensitivity and high impedance, and supports a maximum working frequency of 10MHZ. The working frequency of the CMOS is set to 4M. The first port of the CMOS is connected with the first port of the FPGA; an isolation buffer chip is further arranged between the CMOS and the FPGA, and the isolation buffer chip is used for increasing the level conversion chip to protect the level mismatching problem between the interfaces and solve the problem that when the S11639 is not connected, the I / O of the FPGA is damaged by improper operation static electricity.
[0045] This utility model adopts a 9~36V DC power input, surge protection, anti-static interface, and overvoltage and overcurrent circuit.
[0046] This invention uses a high-speed differential AD acquisition chip. The differential input design can effectively suppress common-mode noise, reduce the background noise of the spectral signal, and improve the sampling rate. Both the analog input port and the digital output port adopt differential mode.
[0047] This invention can not only read ultraviolet spectra, but its greatest advantage is that it can invert the concentrations of SO2, NO, and NO2, and achieve linear fitting, coefficient calibration, and zero-point calibration.
[0048] This invention uses a deuterium lamp light source, and the circuit utilizes the combined characteristics of ARM+FPGA to achieve the advantages of rapid spectrum acquisition and more precise timing control.
[0049] This utility model design realizes the functions from spectrometer signal acquisition, signal preprocessing, software filtering, algorithm processing, linear fitting, data calibration to the final concentration output. For example... Figure 5 As shown, it is based on Figure 4 The area or concentration values of each detected component obtained after processing by software filtering, band interception, and DOAS technology are displayed in a scatter plot.
[0050] This invention is primarily applied to online analyzers, where uninterrupted operation is required, potentially until the light source ages beyond repair. This places higher demands on the circuitry and software. The circuitry includes surge protection, electrostatic discharge protection, overvoltage and overcurrent protection, and reverse connection protection. The MCU software incorporates both hardware and software watchdog timers, responsible for monitoring the MCU program's execution and the FPGA's operational status, respectively. In case of an anomaly, appropriate reset and rapid recovery procedures are initiated.
[0051] The present invention uses a deuterium lamp as the light source, which has the advantages of continuous and more stable and reliable light emission, more stable and accurate spectrum acquisition, no need for external trigger light source, reduced space for software control module and hardware wiring, and greatly reduced spectral noise.
[0052] This invention's single-ended to differential circuit is composed of discrete components, and testing shows that its performance is no less than that of integrated chips, while offering greater application flexibility. The disadvantage is that it uses more components than integrated chips, but its cost is significantly lower.
Claims
1. A differential amplifier, characterized in that, include: Units U1A, U1B, U2A, and U2B; The U2A unit includes an OPA2320AIDR chip, resistors R2, R3, R4, and R6; the U2A unit is used to receive and process positive phase signals from the CMOS. The U2B unit includes an OPA2320AIDR chip, resistors R8, R9, R11, and R12; the U2B unit is used to receive and process negative phase signals from the CMOS. The U1A unit includes: an OPA2320AIDR chip, resistor R1, and resistor R5; the U1A unit is used to output the processed positive phase signal of the CMOS with a lower impedance; The U1B unit includes an OPA2320AIDR chip, resistor R7, and resistor R10; the U1B unit is used to output the inverted CMOS signal after processing with a lower impedance.
2. A rapid ultraviolet spectral acquisition system, characterized in that, include: The differential amplifier, photoelectric conversion unit, emitter follower, high-speed differential AD converter, level conversion chip, FPGA, and MCU as described in claim 1; The photoelectric conversion unit is used to convert ultraviolet spectral information into corresponding analog voltage signals; The emitter follower is used to output the analog voltage signal of the photoelectric conversion unit to the differential amplifier without attenuation; The differential amplifier is used to boost the AC signal output by the emitter follower by 1 / 2 VCC, and at the same time convert the single-ended signal output by the CMOS into a differential signal. The high-speed differential AD converter is used to convert the analog signal output by the differential amplifier into a digital signal; it also receives the driving timing generated by the FPGA. The level conversion chip is connected to the photoelectric conversion unit and the FPGA, respectively. The FPGA sends a control timing drive signal to the photoelectric conversion unit; the FPGA sends a drive timing signal to the high-speed differential AD and simultaneously receives the data output by the high-speed differential AD, converts the data and outputs it to the MCU.
3. The rapid ultraviolet spectral acquisition system according to claim 2, characterized in that, The photoelectric conversion unit is a CMOS, and the CMOS model is S11639.
4. The rapid ultraviolet spectral acquisition system according to claim 2, characterized in that, The FPGA model is EG4X20BG256B.
5. The rapid ultraviolet spectral acquisition system according to claim 2, characterized in that, The high-speed differential AD and the FPGA communicate via an LVDS interface.
6. The rapid ultraviolet spectral acquisition system according to claim 2, characterized in that, The MCU is equipped with an RS232 port or an RS485 port.
7. The rapid ultraviolet spectral acquisition system according to claim 2, characterized in that, It also includes: EEPROM; the EEPROM is connected to the MCU.