12V-24V wide voltage power supply circuit capable of eliminating dead zone voltage

Abstract

The utility model relates to a 12V-24V wide voltage power supply circuit for eliminating dead zone voltage, comprising a power supply circuit, the power supply circuit is connected with a dead zone elimination circuit, the dead zone elimination circuit is connected with a voltage stabilizing circuit, the dead zone elimination circuit comprises a power supply conduction circuit, a power supply buffer conduction circuit and a voltage stabilizing circuit power supply conduction circuit, the power supply conduction circuit is connected with the power supply circuit, the power supply conduction circuit is further connected with the power supply buffer conduction circuit, the power supply buffer conduction circuit is connected with the power supply conduction circuit of the voltage stabilizing circuit, the power supply buffer conduction circuit is further connected with the voltage stabilizing circuit, and the voltage stabilizing circuit is further connected with a high-level circuit. The voltage dead zone problem of 12V-24V wide-voltage power supply can be eliminated through the power supply circuit, the dead zone elimination circuit, the high-level circuit and the voltage stabilizing circuit, and normal use of equipment is guaranteed.

Description

TECHNICAL FIELD

[0001] The utility model relates to the field of power supply circuit, more specifically, relate to a 12V-24V wide voltage power supply circuit of eliminating dead zone voltage. BACKGROUND

[0002] To ensure that the voltage of the load is always kept at about 12V, in the traditional 12V-24V power supply circuit, when the input voltage is lower than a certain value (for example, 12.95V), the power supply passes through the MOS straight through, and supplies power to the rear-end load; when the input voltage is higher than 12.95V, start the voltage conversion chip, and supply power to the rear-end load after the input voltage is reduced to 12V. However, when the input voltage is just in the critical state of about 12.95V, the MOS and the power supply chip may not work at the same time, which will cause the device to lose power supply and appear abnormal. This voltage range that cannot ensure normal power supply of the load is called dead zone voltage, so it is necessary to eliminate the dead zone voltage. SUMMARY

[0003] In view of the above defects of the prior art, a 12V-24V wide voltage power supply circuit for eliminating dead zone voltage is provided.

[0004] The utility model discloses a technical scheme that solves the technical problems: a 12V-24V wide voltage power supply circuit for eliminating dead zone voltage, including power supply circuit, the power supply circuit is connected with dead zone elimination circuit, dead zone elimination circuit is connected with voltage stabilizing circuit, dead zone elimination circuit includes power supply conduction circuit, power supply buffer conduction circuit and voltage stabilizing circuit power supply conduction circuit, power supply conduction circuit is connected with power supply circuit, power supply conduction circuit is also connected with power supply buffer conduction circuit, power supply buffer conduction circuit is connected with voltage stabilizing circuit power supply conduction circuit, power supply buffer conduction circuit is also connected with voltage stabilizing circuit.

[0005] As a preferred, the power supply conduction circuit includes NMOS tube Q7 and comparator U7A, the drain of NMOS tube Q7 is connected with power supply circuit, the gate of NMOS tube Q7 is connected with the pin 1 of comparator U7A, the pin 8 of comparator U7A is connected with direct current input interface, the pin 4 of comparator U7A is grounded, the pin 2 of comparator U7A is connected with reference voltage reference pole, the pin 3 of comparator U7A is connected with capacitor C369, resistance R506 and resistance R204, capacitor C369 and resistance R506 are all grounded, resistance R204 is connected with direct current input interface, the source of NMOS tube Q7 is connected with power supply buffer conduction circuit.

[0006] As preferred, the high level circuit comprises a capacitor C86, a diode D12, a resistor R677 and a resistor R717; the capacitor C86, the diode D12, the resistor R677 and the resistor R717 are all connected with the voltage stabilizing circuit; the capacitor C86, the diode D12 and the resistor R677 are all grounded; the resistor R717 is connected with a direct current input interface.

[0007] As preferred, the power supply buffer on circuit comprises an NMOS tube Q8 and a comparator U7B, the drain of the NMOS tube Q8 is connected with the power supply on circuit, the source of the NMOS tube Q8 is grounded, the gate of the NMOS tube Q8 is connected with the pin 7 of the comparator U7B, the pin 4 of the comparator U7B is grounded, the pin 8 of the comparator U7B is connected with a direct current input interface, the pin 5 of the comparator U7B is connected with a reference voltage reference pole, the pin 6 of the comparator U7B is connected with a capacitor C370, a resistor R512 and a resistor R462, the capacitor C370 and the resistor R512 are both grounded, the resistor R462 is connected with a direct current input interface, the gate of the NMOS tube Q8 is further connected with a resistor R563, the resistor R563 is connected with the voltage stabilizing circuit power supply on circuit.

[0008] As preferred, the voltage stabilizing circuit power supply on circuit comprises a comparator U19A and an NPN type triode Q15, the pin 1 of the comparator U19A is connected with the power supply buffer on circuit, the pin 1 of the comparator U19A is further connected with a resistor R588; the resistor R588 is connected with the pin 1 of the NPN type triode Q15, the pin 3 of the NPN type triode Q15 is connected with the voltage stabilizing circuit, the pin 2 of the NPN type triode Q15 is grounded, the pin 3 of the comparator U19A is connected with a reference voltage reference pole, the pin 4 of the comparator U19A is grounded, the pin 8 of the comparator U19A is connected with a direct current input interface, the pin 2 of the comparator U19A is connected with a capacitor C309, a resistor R423 and a resistor R422, the capacitor C309 and the resistor R423 are both grounded, the resistor R422 is connected with a direct current input interface.

[0009] As preferred, the voltage stabilizing circuit comprises a power supply chip U49, an NMOS tube PQ19, an NMOS tube PQ20 and a power inductor L11, the power supply chip U49 contains an EN pin, a TON pin, an SS pin, a PGOOD pin, a GND pin, an FB pin, a GL pin, a SW pin, a GH pin, a BST pin, an ILIM pin, a VIN pin and a VCC pin, the EN pin is connected with the voltage stabilizing circuit power supply on circuit, the EN pin is also connected with the high level circuit, the TON pin is connected with a resistor R718, the resistor R718 is grounded, the SS pin is connected with a capacitor C712 connected with a power supply, the capacitor C712 is grounded, the PGOOD pin is connected with a resistor R681, the resistor R681 is connected with a power supply, the GND pin is grounded, the FB pin is connected with a resistor R720, a resistor R699 and a resistor R719, the resistor R719 is grounded, the resistor R720 is connected with a capacitor C713, the capacitor C713 and the resistor R699 are both connected with a pin 2 of the power inductor L11, a pin 1 of the power inductor L11 is connected with the SW pin, the GL pin is connected with a gate of the NMOS tube PQ20, a source of the NMOS tube PQ20 is grounded, a drain of the NMOS tube PQ20 is connected with the pin 1 of the power inductor L11, the GH pin is connected with a resistor R716, the resistor R716 is connected with a gate of the NMOS tube PQ19, a source of the NMOS tube PQ19 is connected with the pin 1 of the power inductor L11, a drain of the NMOS tube PQ19 is connected with the VIN pin, the VIN pin is also connected with a capacitor C710, a capacitor C165, a capacitor C367 and a capacitor CE19, the capacitor C710, the capacitor C165, the capacitor C367 and the capacitor CE19 are all grounded, the BST pin is connected with a capacitor C709, the ILIM pin is connected with a resistor R700, the capacitor C709 and the resistor R700 are both connected with the pin 1 of the power inductor L11, a pin 2 of the power inductor L11 is also connected with a power supply, the VCC pin is connected with a power supply, the VCC pin is also connected with a capacitor C711, the capacitor C711 is grounded.

[0010] As preferred, a pin 2 of the power inductor L11 and the power supply are connected with an anti-reflux circuit, the anti-reflux circuit comprises a diode D15 and a diode D16, two anodes of the diode D15 are both connected with the pin 2 of the power inductor L11, a cathode of the diode D15 is connected with the power supply, two anodes of the diode D16 are both connected with the pin 2 of the power inductor L11, a cathode of the diode D16 is connected with the power supply, the power supply is connected with a capacitor CE22, a capacitor CE23, a capacitor C714 and a capacitor C715, the capacitor CE22, the capacitor CE23, the capacitor C714 and the capacitor C715 are all grounded.

[0011] As preferred, the power supply circuit comprises a PMOS tube U3 and an NMOS tube Q4, the gate of the PMOS tube U3 is connected with a resistor R900, the resistor R900 is connected with the drain of the NMOS tube Q4, the drain of the PMOS tube U3 is connected with a power supply positive pole, a capacitor C466, a capacitor C160 and a capacitor C469, the capacitor C160 and the capacitor C469 are grounded, the capacitor C466 is connected with the resistor R900, the source of the PMOS tube U3 is connected with a capacitor C624, a resistor R185 and a resistor R682, the capacitor C624 and the resistor R185 are connected with the resistor R900, the resistor R682 is connected with a resistor R200 and a capacitor C371, the resistor R200 and the capacitor C371 are grounded, the resistor R682 is further connected with the gate of the NMOS tube Q4, the source of the NMOS tube Q4 is connected with a power supply conduction circuit, the source of the NMOS tube Q4 is further connected with a resistor R463, the resistor R463 is grounded, the source of the PMOS tube U3 is further connected with a capacitor C164, a capacitor C163 and a fuse FU11, the capacitor C164 and the capacitor C163 are grounded, the fuse FU11 is connected with a capacitor C161 and a diode D7, the capacitor C161 is grounded, the cathode of the diode D7 is connected with the fuse FU11, and the anode of the diode D7 is grounded.

[0012] The power supply circuit of the utility model has the advantages that when the customer uses 12V-12.7V power supply, the power supply conduction circuit and the power supply buffer conduction circuit are both conductive, so that the power supply circuit is conductive and the power supply is conductive.

[0013] When the customer uses 12.7V-12.95V power supply, the power supply conduction circuit and the power supply buffer conduction circuit are both conductive, so that the power supply circuit is conductive and the power supply is conductive, and at the same time, the voltage stabilizing circuit power supply conduction circuit is cut off, the high level circuit makes the voltage stabilizing circuit get high level electricity, the voltage stabilizing circuit starts to work and outputs +12VSB at the same time, and the power supply is conductive.

[0014] When the customer uses 12.95V-24V power supply, the power supply buffer conduction circuit is cut off, the power supply circuit is cut off, and the power supply circuit stops supplying power, at the same time, the voltage stabilizing circuit power supply conduction circuit is cut off, the high level circuit makes the voltage stabilizing circuit get high level electricity, the voltage stabilizing circuit starts to work and outputs +12VSB at the same time, and the power supply is conductive.

[0015] The voltage dead zone problem of 12V-24V wide voltage power supply can be eliminated through the above circuit, and the normal use of equipment is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 It is the circuit diagram of the power supply circuit of the utility model embodiment;

[0017] Figure 2 is a circuit diagram of the dead zone elimination circuit of the embodiment of the utility model;

[0018] Figure 3 is a circuit diagram of the voltage stabilizing circuit and high level circuit of the embodiment of the utility model;

[0019] Figure 4 is a circuit diagram of the anti-backfill circuit of the embodiment of the utility model. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical scheme and advantages of the embodiment of the utility model more clear, the following will combine the technical scheme in the embodiment of the utility model to make clear and complete description, obviously, the described embodiment is part of the embodiment of the utility model, rather than all the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by the person skilled in the art without creative labor belong to the protection scope of the utility model.

[0021] The embodiment of the utility model such as Figures 1 to 4As shown in the middle, a 12V-24V wide voltage power supply circuit to eliminate dead zone voltage, including power supply circuit, the power supply circuit is connected with dead zone elimination circuit, the dead zone elimination circuit is connected with voltage stabilizing circuit, the dead zone elimination circuit includes power supply on circuit, power supply buffer on circuit and voltage stabilizing circuit power supply on circuit, the power supply on circuit is connected with power supply circuit, the power supply on circuit is also connected with power supply buffer on circuit, the power supply buffer on circuit is connected with voltage stabilizing circuit power supply on circuit, the voltage stabilizing circuit power supply on circuit is connected with voltage stabilizing circuit, the voltage stabilizing circuit is also connected with high level circuit, the power supply on circuit includes NMOS tube Q7 and comparator U7A, the drain of the NMOS tube Q7 is connected with power supply circuit, the gate of the NMOS tube Q7 is connected with the pin 1 of comparator U7A, the pin 8 of comparator U7A is connected with DC input interface, the pin 4 of comparator U7A is grounded, the pin 2 of comparator U7A is connected with reference voltage reference pole, the pin 3 of comparator U7A is connected with capacitor C369, resistor R506 and resistor R204, the capacitor C369 and resistor R506 are grounded, the resistor R204 is connected with DC input interface, the source of the NMOS tube Q7 is connected with power supply buffer on circuit, the power supply buffer on circuit includes NMOS tube Q8 and comparator U7B, the drain of the NMOS tube Q8 is connected with the source of the NMOS tube Q7 of power supply on circuit, the source of the NMOS tube Q8 is grounded, the gate of the NMOS tube Q8 is connected with the pin 7 of comparator U7B, the pin 4 of comparator U7B is grounded, the pin 8 of comparator U7B is connected with DC input interface, the pin 5 of comparator U7B is connected with reference voltage reference pole, the pin 6 of comparator U7B is connected with capacitor C370, resistor R512 and resistor R462, the capacitor C370 and resistor R512 are grounded, the resistor R462 is connected with DC input interface, the gate of the NMOS tube Q8 is also connected with resistor R563, the resistor R563 is connected with voltage stabilizing circuit power supply on circuit, the voltage stabilizing circuit power supply on circuit includes comparator U19A and NPN type triode Q15, the pin 1 of comparator U19A is connected with resistor R563 of power supply buffer on circuit, the pin 1 of comparator U19A is also connected with resistor R588.The resistance R588 is connected with pin 1 of NPN triode Q15, pin 3 of the NPN triode Q15 is connected with a voltage stabilizing circuit, pin 2 of the NPN triode Q15 is grounded, pin 3 of the comparator U19A is connected with a reference voltage reference electrode, pin 4 of the comparator U19A is grounded, pin 8 of the comparator U19A is connected with a direct current input interface, pin 2 of the comparator U19A is connected with a capacitor C309, a resistance R423 and a resistance R422, the capacitor C309 and the resistance R423 are grounded, and the resistance R422 is connected with a direct current input interface.

[0022] Further improvements, such as Figure 3 and Figure 4As shown in the figure, the voltage stabilizing circuit comprises a power supply chip U49, NMOS tubes PQ19 and PQ20 and a power inductor L11, the power supply chip U49 is selected from a power supply chip with model number XR75100, the power supply chip U49 contains an EN pin, a TON pin, an SS pin, a PGOOD pin, a GND pin, an FB pin, a GL pin, a SW pin, a GH pin, a BST pin, an ILIM pin, a VIN pin and a VCC pin, the EN pin is connected with pin 3 of NPN triode Q15 connected with the voltage stabilizing circuit power supply conduction circuit, the EN pin is also connected with a high level circuit, the high level circuit comprises a capacitor C86, a diode D12, a resistor R677 and a resistor R717; the capacitor C86, the diode D12, the resistor R677 and the resistor R717 are all connected with the voltage stabilizing circuit; the capacitor C86, the diode D12 and the resistor R677 are all grounded;The resistance R717 is connected with a direct current input interface, the TON pin is connected with a resistance R718, the resistance R718 is grounded, the SS pin is connected with a capacitor C712 connected with a power supply, the capacitor C712 is grounded, the PGOOD pin is connected with a resistance R681, the resistance R681 is connected with a power supply, the GND pin is grounded, the FB pin is connected with a resistance R720, a resistance R699 and a resistance R719, the resistance R719 is grounded, the resistance R720 is connected with a capacitor C713, the capacitor C713 and the resistance R699 are both connected with a pin 2 of a power inductor L11, a pin 1 of the power inductor L11 is connected with the SW pin, the GL pin is connected with a gate of an NMOS tube PQ20, a source of the NMOS tube PQ20 is grounded, a drain of the NMOS tube PQ20 is connected with the pin 1 of the power inductor L11, the GH pin is connected with a resistance R716, the resistance R716 is connected with a gate of an NMOS tube PQ19, a source of the NMOS tube PQ19 is connected with the pin 1 of the power inductor L11, a drain of the NMOS tube PQ19 is connected with the VIN pin, the VIN pin is also connected with a capacitor C710, a capacitor C165, a capacitor C367 and a capacitor CE19, the capacitor C710, the capacitor C165, the capacitor C367 and the capacitor CE19 are all grounded, the BST pin is connected with a capacitor C709, the ILIM pin is connected with a resistance R700, the capacitor C709 and the resistance R700 are both connected with the pin 1 of the power inductor L11, a pin 2 of the power inductor L11 is also connected with a power supply, the VCC pin is connected with a power supply, the VCC pin is also connected with a capacitor C711, the capacitor C711 is grounded, a power supply between the pin 2 of the power inductor L11 and the pin 2 of the power inductor L11 is connected with an anti-reflux circuit, the anti-reflux circuit comprises a diode D15 and a diode D16, both of the anodes of the diode D15 are connected with the pin 2 of the power inductor L11, a cathode of the diode D15 is connected with the power supply, both of the anodes of the diode D16 are connected with the pin 2 of the power inductor L11, a cathode of the diode D16 is connected with the power supply, the power supply is connected with a capacitor CE22, a capacitor CE23, a capacitor C714 and a capacitor C715, the capacitor CE22, the capacitor CE23, the capacitor C714 and the capacitor C715 are all grounded.

[0023] Further improvements, such as Figure 1As shown in the power supply circuit, the PMOS tube U3 has the resistor R900 connected to the gate, the resistor R900 is connected to the drain of the NMOS tube Q4, the drain of the PMOS tube U3 is connected to the positive of the power supply, the capacitor C466, the capacitor C160 and the capacitor C469, the capacitor C160 and the capacitor C469 are grounded, the capacitor C466 is connected to the resistor R900, the source of the PMOS tube U3 is connected to the capacitor C624, the resistor R185 and the resistor R682, the capacitor C624 and the resistor R185 are connected to the resistor R900, the resistor R682 is connected to the resistor R200 and the capacitor C371, the resistor R200 and the capacitor C371 are grounded, the resistor R682 is also connected to the gate of the NMOS tube Q4, the source of the NMOS tube Q4 is connected to the power supply on circuit, the source of the NMOS tube Q4 is also connected to the resistor R463, the resistor R463 is grounded, the source of the PMOS tube U3 is also connected to the capacitor C164, the capacitor C163 and the fuse FU11, the capacitor C164 and the capacitor C163 are grounded, the fuse FU11 is connected to the capacitor C161 and the diode D7, the capacitor C161 is grounded, the cathode of the diode D7 is connected to the fuse FU11, and the anode of the diode D7 is grounded.

[0024] Working principle: when the customer uses 12V-12.7V power supply, as shown in the dead zone elimination circuit, the pin 1 of the comparator U7A outputs high level, controls the NMOS tube Q7 to be turned on, the pin 7 of the comparator U7B outputs high level, controls the NMOS tube Q8 to be turned on, so that as shown in the power supply circuit, the PMOS tube U3 is turned on, and the power supply is turned on (+12VSB is powered on). Figure 2 Figure 1 As shown in the power supply circuit, the PMOS tube U3 is turned on, and the power supply is turned on (+12VSB is powered on).

[0025] In order to eliminate the dead zone of 12V-24V wide voltage power supply voltage, a buffer zone of 12.7V-12.95V is added, when the customer uses 12.7-12.95V power supply, the pin 1 of the comparator U7A in the dead zone elimination circuit outputs high level, controls the NMOS tube Q7 to be turned on, the pin 7 of the comparator U7B outputs high level, controls the NMOS tube Q8 to be turned on, so that the PMOS tube U3 in the power supply circuit is turned on, and the power supply is turned on (+12VSB is powered on), in order to prevent the current from flowing back to the power supply chip U49 (model XR75100) in the voltage stabilizing circuit, as shown in the voltage stabilizing circuit, a buffer zone of 12.7V-12.95V is added. Figure 4 ​When the reverse flow prevention circuit is shown, the pin 1 output of the comparator U19A is low level, the NPN transistor Q15 is cut off, the high level circuit makes the EN pin of the power supply chip U49 (model XR75100) electrified to high level, the power supply chip U49 (model XR75100) starts to work, and at this time the power supply chip U49 (model XR75100) also outputs +12VSB, and the power supply is turned on.

[0026] When the customer uses 12.95V-24V power supply, the pin 7 output of the comparator U7B in the dead zone elimination circuit is low level, the NMOS tube Q8 is cut off, and the PMOS tube U3 in the power supply circuit is cut off, the PMOS tube U3 stops power supply, at this time the pin 1 output of the comparator U19A is low level, the NPN transistor Q15 is cut off, the high level circuit makes the EN pin of the power supply chip U49 (model XR75100) electrified to high level, the power supply chip U49 (model XR75100) starts to work, and at this time the power supply chip U49 (model XR75100) outputs +12VSB, and the power supply is turned on.

[0027] It should be understood that those skilled in the art can make improvements or changes according to the above description, and all these improvements and changes shall belong to the protection scope of the appended claims of the utility model.

Claims

1. A 12V-24V wide voltage supply circuit for eliminating dead zone voltage, comprising a supply circuit; characterized in that, The power supply circuit is connected with dead zone elimination circuit; the dead zone elimination circuit is connected with voltage stabilizing circuit; the dead zone elimination circuit includes power supply conduction circuit, power supply buffer conduction circuit and voltage stabilizing circuit power supply conduction circuit; the power supply conduction circuit is connected with power supply circuit; the power supply conduction circuit is also connected with power supply buffer conduction circuit; the power supply buffer conduction circuit is connected with voltage stabilizing circuit power supply conduction circuit; the voltage stabilizing circuit power supply conduction circuit is connected with voltage stabilizing circuit; the voltage stabilizing circuit is also connected with high level circuit.

2. The 12V-24V wide voltage supply circuit for eliminating dead zone voltage according to claim 1, characterized in that, The high level circuit includes capacitor C86, diode D12, resistor R677 and resistor R717; the capacitor C86, diode D12, resistor R677 and resistor R717 are all connected with voltage stabilizing circuit; the capacitor C86, diode D12 and resistor R677 are all grounded; the resistor R717 is connected with direct current input interface.

3. The 12V-24V wide voltage supply circuit for eliminating dead zone voltage according to claim 1, characterized in that, The power supply conduction circuit includes NMOS tube Q7 and comparator U7A; the drain of the NMOS tube Q7 is connected with power supply circuit; the gate of the NMOS tube Q7 is connected with pin 1 of comparator U7A; pin 8 of the comparator U7A is connected with direct current input interface; pin 4 of the comparator U7A is grounded; pin 2 of the comparator U7A is connected with reference voltage reference pole; pin 3 of the comparator U7A is connected with capacitor C369, resistor R506 and resistor R204; the capacitor C369 and resistor R506 are both grounded; the resistor R204 is connected with direct current input interface; the source of the NMOS tube Q7 is connected with power supply buffer conduction circuit.

4. The 12V-24V wide voltage supply circuit for eliminating dead zone voltage according to claim 1, characterized in that, The power supply buffer conduction circuit includes NMOS tube Q8 and comparator U7B; the drain of the NMOS tube Q8 is connected with power supply conduction circuit; the source of the NMOS tube Q8 is grounded; the gate of the NMOS tube Q8 is connected with pin 7 of comparator U7B; pin 4 of the comparator U7B is grounded; pin 8 of the comparator U7B is connected with direct current input interface; pin 5 of the comparator U7B is connected with reference voltage reference pole; pin 6 of the comparator U7B is connected with capacitor C370, resistor R512 and resistor R462; the capacitor C370 and resistor R512 are both grounded; the resistor R462 is connected with direct current input interface; the gate of the NMOS tube Q8 is also connected with resistor R563; the resistor R563 is connected with voltage stabilizing circuit power supply conduction circuit.

5. The 12V-24V wide voltage supply circuit for eliminating dead voltage according to claim 1, wherein, The voltage stabilizing circuit power supply conduction circuit includes a comparator U19A and an NPN type transistor Q15; the pin 1 of the comparator U19A is connected with the power supply buffer conduction circuit; the pin 1 of the comparator U19A is also connected with a resistor R588; the resistor R588 is connected with the pin 1 of the NPN type transistor Q15; the pin 3 of the NPN type transistor Q15 is connected with the voltage stabilizing circuit; the pin 2 of the NPN type transistor Q15 is grounded; the pin 4 of the comparator U19A is grounded; the pin 3 of the comparator U19A is connected with a reference voltage reference electrode; the pin 8 of the comparator U19A is connected with a direct current input interface; the pin 2 of the comparator U19A is connected with a capacitor C309, a resistor R423 and a resistor R422; the capacitor C309 and the resistor R423 are both grounded; the resistor R422 is connected with a direct current input interface.

6. The 12V-24V wide voltage supply circuit for eliminating dead voltage according to claim 1, wherein, The voltage stabilizing circuit comprises a power supply chip U49, an NMOS tube PQ19, an NMOS tube PQ20 and a power inductor L11; the power supply chip U49 contains an EN pin, a TON pin, an SS pin, a PGOOD pin, a GND pin, an FB pin, a GL pin, a SW pin, a GH pin, a BST pin, an ILIM pin, a VIN pin and a VCC pin; the EN pin is connected with a voltage stabilizing circuit power supply on circuit; the EN pin is also connected with a high level circuit; the TON pin is connected with a resistor R718; the resistor R718 is grounded; the SS pin is connected with a capacitor C712 which is connected with a power supply; the capacitor C712 is grounded; the PGOOD pin is connected with a resistor R681; the resistor R681 is connected with a power supply; the GND pin is grounded; the FB pin is connected with a resistor R720, a resistor R699 and a resistor R719; the resistor R719 is grounded; the resistor R720 is connected with a capacitor C713; the capacitor C713 and the resistor R699 are both connected with a pin 2 of the power inductor L11; a pin 1 of the power inductor L11 is connected with the SW pin; the GL pin is connected with a gate of the NMOS tube PQ20; a source of the NMOS tube PQ20 is grounded; a drain of the NMOS tube PQ20 is connected with the pin 1 of the power inductor L11; the GH pin is connected with a resistor R716; the resistor R716 is connected with a gate of the NMOS tube PQ19; a source of the NMOS tube PQ19 is connected with the pin 1 of the power inductor L11; a drain of the NMOS tube PQ19 is connected with the VIN pin; the VIN pin is also connected with a capacitor C710, a capacitor C165, a capacitor C367 and a capacitor CE19; the capacitor C710, the capacitor C165, the capacitor C367 and the capacitor CE19 are all grounded; the BST pin is connected with a capacitor C709; the ILIM pin is connected with a resistor R700; the capacitor C709 and the resistor R700 are both connected with the pin 1 of the power inductor L11; a pin 2 of the power inductor L11 is also connected with a power supply; the VCC pin is connected with a power supply; the VCC pin is also connected with a capacitor C711; the capacitor C711 is grounded.

7. The 12V-24V wide voltage supply circuit for eliminating dead zone voltage according to claim 6, characterized in that, A pin 2 of the power inductor L11 is connected with a power supply through an anti-reflux circuit; the anti-reflux circuit comprises a diode D15 and a diode D16; two anodes of the diode D15 are both connected with the pin 2 of the power inductor L11; a cathode of the diode D15 is connected with the power supply; two anodes of the diode D16 are both connected with the pin 2 of the power inductor L11; a cathode of the diode D16 is connected with the power supply; the power supply is connected with a capacitor CE22, a capacitor CE23, a capacitor C714 and a capacitor C715; the capacitor CE22, the capacitor CE23, the capacitor C714 and the capacitor C715 are all grounded.

8. The 12V-24V wide voltage supply circuit for eliminating dead voltage according to claim 1, wherein, The power supply circuit includes PMOS tube U3 and NMOS tube Q4; the gate of the PMOS tube U3 is connected with a resistor R900; the resistor R900 is connected with the drain of the NMOS tube Q4; the drain of the PMOS tube U3 is connected with a power supply positive pole, a capacitor C466, a capacitor C160 and a capacitor C469; the capacitor C160 and the capacitor C469 are grounded; the capacitor C466 is connected with the resistor R900; the source of the PMOS tube U3 is connected with a capacitor C624, a resistor R185 and a resistor R682; the capacitor C624 and the resistor R185 are both connected with the resistor R900; the resistor R682 is connected with a resistor R200 and a capacitor C371; the resistor R200 and the capacitor C371 are grounded; the resistor R682 is also connected with the gate of the NMOS tube Q4; the source of the NMOS tube Q4 is connected with a power supply conduction circuit; the source of the NMOS tube Q4 is also connected with a resistor R463; the resistor R463 is grounded; the source of the PMOS tube U3 is also connected with a capacitor C164, a capacitor C163 and a fuse FU11; the capacitor C164 and the capacitor C163 are grounded; the fuse FU11 is connected with a capacitor C161 and a diode D7; the capacitor C161 is grounded; the cathode of the diode D7 is connected with the fuse FU11; the anode of the diode D7 is grounded.

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