A C-band low-voltage and high-linearity broadband amplifier

Abstract

The utility model provides a kind of C-band low-voltage and high linearity's broadband amplifier, including two parallel cascode circuits, two active bias circuits, power distribution circuit and power synthesis circuit;Special matching structure is used in circuit, while completing impedance matching, non-target harmonic signal is inhibited, and linearity is improved.The core chip provided by the utility model is high in linearity, suitable in bandwidth, low in power supply voltage, and can be widely applied to radar, communication, instrument application program and passive or active imaging.

Description

TECHNICAL FIELD

[0001] The utility model belongs to integrated circuit technical field, concretely relates to a C wave band low voltage and high linearity's wideband amplifier. BACKGROUND

[0002] In prior art, there is a design of wideband amplifier based on classical Cascade circuit, but it has the following shortcomings:

[0003] (1) The linearity of classical Cascode circuit is poor when the power supply voltage is low.

[0004] (2) The current of active bias circuit of Cascade circuit differs greatly in full temperature (for example, -40°C to 105°C). SUMMARY

[0005] The utility model provides a C wave band low voltage and high linearity's wideband amplifier for the above-mentioned defects of prior art, including two parallel cascode circuits, two active bias circuits, power distribution circuit and power synthesis circuit, adopts special matching structure in the circuit, suppresses non-target harmonic signal while completing impedance matching, improves linearity. The core chip provided by the utility model has high linearity, wide applicable frequency band and low power supply voltage, and can be widely applied to radar, communication, instrument application program and passive or active imaging.

[0006] The utility model specifically realizes the following contents:

[0007] The utility model provides a C wave band low voltage and high linearity's wideband amplifier, including power distribution circuit, first cascode circuit, second cascode circuit, first active bias circuit, second active bias circuit, power synthesis circuit;

[0008] The input end of power distribution circuit is connected with the input end of first cascode circuit and the input end of second cascode circuit respectively, and the output end of power synthesis circuit is connected with the output end of first cascode circuit and the output end of second cascode circuit respectively;

[0009] The first active bias circuit is connected with the first cascode circuit, and the second active bias circuit is connected with the second cascode circuit.

[0010] The input end of power distribution circuit is the input end of wideband amplifier, and the output end of power synthesis circuit is the output end of wideband amplifier.

[0011] For better implementation of the utility model, further, the power distribution circuit includes the capacitor C1, the inductor L1, the microstrip TL1 and the microstrip TL2;

[0012] The capacitor C1 is overlapped after grounding and the input end of the inductor L1;The output end of the inductor L1 is divided into two branches in parallel and is connected with the microstrip TL1 and the microstrip TL2 respectively, and then is connected with the first cascode circuit and the second cascode circuit respectively;

[0013] The input end of the inductor L1 is the input end of the broadband amplifier.

[0014] For better implementation of the utility model, further, the first cascode circuit includes the capacitor C2, the capacitor C3, the capacitor C4, the capacitor C5, the capacitor C6, the resistance R1, the resistance R2, the resistance R3, the resistance R4, the inductor L2 field effect transistor Q1, field effect transistor Q2;

[0015] Capacitor C2, capacitor C3, capacitor C4, capacitor C6, resistance R1, resistance R2, resistance R3, inductor L2 field effect transistor Q1, field effect transistor Q2 are used to constitute cascode radio frequency circuit, resistance R4 and capacitor C5 are connected in series and then connected between the gate and drain of field effect transistor Q1 to constitute negative feedback circuit;

[0016] The input end of the capacitor C2 is the input end of the first cascode circuit connected with the power distribution circuit;The connecting intersection point of the capacitor C3, the inductor L2 and the capacitor C6 is the interface of connecting power supply VDD;The output end of the capacitor C6 is the output end of the first cascode circuit;The resistance R1 and the capacitor C3 are connected with the interface Vb of the first active bias circuit.

[0017] For better implementation of the utility model, further, the first active bias circuit is a voltage dividing circuit composed of resistance R5, resistance R6, resistance R7, resistance R8, capacitor C7, field effect transistor Q3 and field effect transistor Q4;The output end of the resistance R7 is the port connected with the Vb interface of the first cascode circuit.

[0018] For better implementation of the utility model, further, the field effect transistor Q3 is provided with multiple groups.

[0019] For better implementation of the utility model, further, the second cascode circuit includes the capacitor C2, the capacitor C3, the capacitor C4, the capacitor C5, the capacitor C6, the resistance R1, the resistance R2, the resistance R3, the resistance R4, the inductor L2 field effect transistor Q1, field effect transistor Q2;

[0020] A cascode RF circuit is constructed using capacitors C2, C3, C4, and C6, resistors R1, R2, and R3, inductor L2, and field-effect transistors Q1 and Q2. Resistor R4 and capacitor C5 are connected in series between the gate and drain of field-effect transistor Q1 to form a negative feedback circuit.

[0021] The input terminal of capacitor C2 is the input terminal connecting the second cascode circuit and the power distribution circuit; the intersection of capacitor C3, inductor L2, and capacitor C6 is the interface for connecting to power supply VDD; the output terminal of capacitor C6 is the output terminal of the second cascode circuit; the interface between resistor R1 and capacitor C3 is the interface Vb for connecting the second active bias circuit.

[0022] The second active bias circuit is a voltage divider circuit composed of resistors R5, R6, R7, R8, capacitor C7, field-effect transistor Q3, and field-effect transistor Q4; the output terminal of resistor R7 is a port connected to the Vb interface of the second cascode circuit.

[0023] To better realize this utility model, the power combining circuit further includes an inductor L3, a microstrip line TL3, and a microstrip line TL4;

[0024] The input terminals of the inductor L3 are connected to the parallel microstrip lines TL3 and TL4 respectively; the input terminals of the microstrip lines TL3 and TL4 are respectively connected to the output terminals of the first cascode circuit and the second cascode circuit.

[0025] The output terminal of the inductor L3 is the output terminal of the broadband amplifier.

[0026] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0027] (1) such as Figure 3 As shown, based on the original cascode circuit, an innovative negative feedback circuit is added between the gate and drain of the second-stage field-effect transistor Q1. This negative feedback circuit consists of capacitor C5 and resistor R4. This negative feedback circuit can not only effectively improve the linearity of the chip, but also improve the chip's output standing wave ratio.

[0028] (2) such as Figure 4 As shown, by innovatively adding one or more switching MOSFETs Q3 to the original active bias circuit, the current consistency of the cascode circuit under high and low temperature conditions (e.g., -40°C to 105°C) can be greatly improved, and the linearity of the chip can also be improved. Attached Figure Description

[0029] Figure 1This is a schematic diagram of the module connection of this utility model;

[0030] Figure 2 This is a schematic diagram of the power distribution circuit of this utility model;

[0031] Figure 3 This is a schematic diagram of the cascode circuit of this utility model;

[0032] Figure 4 This is a schematic diagram of the active bias circuit of this utility model;

[0033] Figure 5 This is a schematic diagram of the power combining circuit of this utility model. Detailed Implementation

[0034] To more clearly illustrate the technical solutions of the embodiments of this utility model, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the described embodiments are only some embodiments of this utility model, not all embodiments, and therefore should not be regarded as a limitation on the scope of protection. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0035] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "set up," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0036] Example 1:

[0037] This embodiment proposes a C-band low-voltage and high-linearity broadband amplifier, such as... Figure 1 As shown, it includes a power distribution circuit, a first cascode circuit, a second cascode circuit, a first active bias circuit, a second active bias circuit, and a power combining circuit;

[0038] The power distribution circuit has two parallel output terminals connected to the input terminals of the first cascode circuit and the second cascode circuit, respectively. The power combining circuit has two parallel input terminals connected to the output terminals of the first cascode circuit and the second cascode circuit, respectively.

[0039] The first active bias circuit is connected with the first cascode circuit, and the second active bias circuit is connected with the second cascode circuit.

[0040] The input end of the power distribution circuit is the input end of the wideband amplifier, and the output end of the power synthesis circuit is the output end of the wideband amplifier.

[0041] Embodiment 2

[0042] Based on the above-mentioned embodiment 1, as shown in the figure, Figure 2 In order to better realize the utility model, further, the power distribution circuit comprises a capacitor C1, an inductor L1, a microstrip line TL1 and a microstrip line TL2.

[0043] The capacitor C1 is connected in parallel with the input end of the inductor L1; the output end of the inductor L1 is branched into two branches connected with the microstrip line TL1 and the microstrip line TL2 respectively, and then connected with the first cascode circuit and the second cascode circuit respectively.

[0044] The input end of the inductor L1 is the input end of the wideband amplifier.

[0045] Working principle: as shown in the figure, Figure 2 When the chip works normally, the signal is sent from the input end to the power distribution circuit, the circuit divides the input power into two paths, the capacitor C1 and the inductor L1 play a matching role, and the microstrip lines TL1 and TL2 send the two paths of signals to the two parallel cascode circuits.

[0046] The other parts of the embodiment are the same as those of the above-mentioned embodiment 1, and will not be described here.

[0047] Embodiment 3

[0048] Based on any one of the above-mentioned embodiments 1-2, as shown in the figure, Figure 3 In order to better realize the utility model, further, the first cascode circuit and the second cascode circuit have the same structure, and both comprise a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an inductor L2, a field effect transistor Q1 and a field effect transistor Q2.

[0049] The capacitor C2, the capacitor C3, the capacitor C4, the capacitor C6, the resistor R1, the resistor R2, the resistor R3, the inductor L2, the field effect transistor Q1 and the field effect transistor Q2 are used to form a cascode radio frequency circuit, the resistor R4 and the capacitor C5 are connected in series and then connected between the gate and the drain of the field effect transistor Q1 to form a negative feedback circuit.

[0050] The input end of the capacitor C2 is the input end connected with the power distribution circuit of the first cascode circuit and the second cascode circuit; the connecting intersection of the capacitor C3, the inductor L2 and the capacitor C6 is the interface connected with the power supply VDD; the output end of the capacitor C6 is the output end of the first cascode circuit and the second cascode circuit; and the interface Vb connected with the first active bias circuit and the second active bias circuit is between the resistor R1 and the capacitor C3.

[0051] Working principle: as Figure 3 shown, in the cascode circuit, the capacitor C2 plays a role of isolating direct current, the capacitor C3 and the resistor R1 play a role of negative feedback, and the resistor R2 and the resistor R3 are used for adjusting the direct current bias of the first-stage field effect tube Q1 and the second-stage field effect tube Q2, and these devices constitute a classic cascode radio frequency circuit.

[0052] The other parts of the embodiment are the same as those of any one of the above-mentioned embodiments 1-3, and thus will not be described again.

[0053] Embodiment 4:

[0054] The embodiment is based on any one of the above-mentioned embodiments 1-3, as Figure 4 shown, in order to better realize the utility model, further, the first active bias circuit is a voltage dividing circuit composed of the resistor R5, the resistor R6, the resistor R7, the resistor R8, the capacitor C7, the field effect tube Q3 and the field effect tube Q4; and the output end of the resistor R7 is a port connected with the Vb interface of the first cascode circuit.

[0055] In order to better realize the utility model, further, the field effect tube Q3 is provided in multiple groups.

[0056] Working principle: as Figure 4 shown, in the direct current bias circuit, the field effect tube Q3, the field effect tube Q4, the resistor R5 and the resistor R8 constitute a voltage dividing circuit, and provide a gate bias for the field effect tube Q1 in the cascode circuit.

[0057] The other parts of the embodiment are the same as those of any one of the above-mentioned embodiments 1-3, and thus will not be described again.

[0058] Embodiment 5:

[0059] This embodiment is based on any one of the above embodiments 1-4, as shown, in order to better realize the utility model, further, the power synthesis circuit includes inductance L3, microstrip line TL3 and microstrip line TL4; Figure 5

[0060] The input end of the inductance L3 is connected with the parallel microstrip line TL3 and microstrip line TL4 respectively; the input end of the microstrip line TL3 and microstrip line TL4 is connected with the output end of the first cascode circuit and the second cascode circuit respectively;

[0061] The output end of the inductance L3 is the output end of the wideband amplifier.

[0062] Working principle: as shown in the power synthesis is composed of microstrip line TL3, microstrip line TL4 and inductance L3, can be two cascode circuit output signal together, inductance L3 can improve the output standing wave. Figure 5

[0063] The other parts of this embodiment are the same as any one of the above embodiments 1-4, so it is not described again.

[0064] The above is only the preferred embodiment of the utility model, not any form of restriction on the utility model, any simple modification, equivalent change according to the technical essence of the utility model to the above embodiment, all fall within the protection scope of the utility model.​​

Claims

1. A C-band low-voltage and high-linearity broadband amplifier, characterized by, The power distribution circuit, the first cascode circuit, the second cascode circuit, the first active bias circuit, the second active bias circuit, and the power synthesis circuit are arranged in the wideband amplifier. The input end of the power distribution circuit is the input end of the wideband amplifier, and the output end of the power synthesis circuit is the output end of the wideband amplifier. The first active bias circuit is connected with the first cascode circuit, and the second active bias circuit is connected with the second cascode circuit. The input end of the power distribution circuit is the input end of the wideband amplifier, and the output end of the power synthesis circuit is the output end of the wideband amplifier.

2. The C-band low-voltage and high-linearity broadband amplifier of claim 1, wherein, The power distribution circuit comprises a capacitor C1, an inductor L1, a microstrip line TL1, and a microstrip line TL2. The capacitor C1 is connected with the input end of the inductor L1, and the output end of the inductor L1 is connected with the microstrip line TL1 and the microstrip line TL2 in parallel. The input end of the power distribution circuit is the input end of the wideband amplifier.

3. The C-band low-voltage and high-linearity broadband amplifier of claim 1 or 2, wherein, The first cascode circuit comprises a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an inductor L2, a field effect transistor Q1, and a field effect transistor Q2. The capacitor C2, the capacitor C3, the capacitor C4, the capacitor C6, the resistor R1, the resistor R2, the resistor R3, the inductor L2, the field effect transistor Q1, and the field effect transistor Q2 are used to form a cascode radio frequency circuit, and the resistor R4 and the capacitor C5 are connected in series between the gate and the drain of the field effect transistor Q1 to form a negative feedback circuit. The input end of the capacitor C2 is the input end of the first cascode circuit connected with the power distribution circuit, the connection point of the capacitor C3, the inductor L2, and the capacitor C6 is an interface connected with a power supply VDD, the output end of the capacitor C6 is the output end of the first cascode circuit, and the resistor R1 and the capacitor C3 are connected with an interface Vb connected with the first active bias circuit.

4. The C-band low-voltage and high-linearity broadband amplifier of claim 3, wherein, The first active bias circuit is a voltage dividing circuit comprising a resistor R5, a resistor R6, a resistor R7, a resistor R8, a capacitor C7, a field effect transistor Q3, and a field effect transistor Q4, and the output end of the resistor R7 is a port connected with the Vb interface of the first cascode circuit.

5. The C-band low-voltage and high-linearity broadband amplifier of claim 4, wherein, The field effect transistor Q3 is provided in multiple groups.

6. The C-band low-voltage and high-linearity broadband amplifier of claim 1 or 2, wherein, The second cascode circuit comprises a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an inductor L2, a field effect transistor Q1, and a field effect transistor Q2. Capacitor C2, capacitor C3, capacitor C4, capacitor C6, resistor R1, resistor R2, resistor R3, inductor L2 field effect transistor Q1, field effect transistor Q2 constitute cascode radio frequency circuit, resistor R4 and capacitor C5 in series after connecting between the gate and drain of field effect transistor Q1 constitute negative feedback circuit; The input end of capacitor C2 is the input end connected with the power distribution circuit of the second cascode circuit; the connection intersection point of capacitor C3, inductor L2 and capacitor C6 is the interface connected with power supply VDD; the output end of capacitor C6 is the output end of the second cascode circuit; the interface Vb connected with the second active bias circuit is between resistor R1 and capacitor C3; The second active bias circuit is a voltage dividing circuit composed of resistor R5, resistor R6, resistor R7, resistor R8, capacitor C7, field effect transistor Q3 and field effect transistor Q4; the output end of resistor R7 is the port connected with the Vb interface of the second cascode circuit.

7. The C-band low-voltage and high-linearity broadband amplifier of claim 1, wherein, The power synthesis circuit comprises inductor L3, microstrip line TL3 and microstrip line TL4; The input end of inductor L3 is connected with parallel microstrip line TL3 and microstrip line TL4 respectively; The input end of microstrip line TL3 and microstrip line TL4 is respectively connected with the output end of the first cascode circuit and the second cascode circuit; The output end of inductor L3 is the output end of the wideband amplifier.

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