Four-channel micro-ring wavelength division multiplexing 56G chip

Abstract

The utility model relates to the technical field of silicon optical modulation chips, and particularly discloses a four-channel micro-ring wavelength division multiplexing 56G chip. Comprising an optical input port I1, an optical input port I2, an optical input port I3, an optical input port I4, an optical output port O, an optical splitter BSI1, an optical splitter BSI2, an optical splitter BSI3, an optical splitter BSI4, a first micro-ring modulator, a second micro-ring modulator, a third micro-ring modulator, a fourth micro-ring modulator, a wavelength division multiplexer MUX, an optical splitter BSO1, a photodiode MPDI1, a photodiode MPDI2, a photodiode MPDI3 and a photodiode MPDI4. The utility model relates to a 400G FR4 optical module and a photodiode MPD1O, and aims to solve the problems that in the prior art, a 400G FR4 optical module needs four single-path lasers and is realized by being matched with a four-channel wavelength division multiplexer (MUX), and the scheme is high in cost and low in integration level.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of silicon optical modulation chips, in particular to a four-channel micro-ring wavelength division multiplexing 56G chip. BACKGROUND

[0002] The existing 400G FR4 optical module needs four single-channel lasers, and is implemented in cooperation with a four-channel wavelength division multiplexer (MUX), and this scheme has problems of high cost and low integration. SUMMARY

[0003] The application aims to provide a four-channel micro-ring wavelength division multiplexing 56G chip to solve the problem that the existing 400G FR4 optical module needs four single-channel lasers and is implemented in cooperation with a four-channel wavelength division multiplexer (MUX), and this scheme has problems of high cost and low integration.

[0004] To achieve the above-mentioned purpose, the embodiment of the application provides a four-channel micro-ring wavelength division multiplexing 56G chip, which comprises an optical input port I1, an optical input port I2, an optical input port I3, an optical input port I4, an optical output port O, a beam splitter BSI1, a beam splitter BSI2, a beam splitter BSI3, a beam splitter BSI4, a first micro-ring modulator, a second micro-ring modulator, a third micro-ring modulator, a fourth micro-ring modulator, a wavelength division multiplexing combiner MUX, a beam splitter BSO1, a photodiode MPDI1, a photodiode MPDI2, a photodiode MPDI3, a photodiode MPDI4, and a photodiode MPD1O, wherein,

[0005] The optical input port I1 is connected with an optical input end of the beam splitter BSI1, a first optical output end of the beam splitter BSI1 is connected with an optical input end of the photodiode MPDI1, and a second optical output end of the beam splitter BSI1 is connected with an optical input end of the first micro-ring modulator;

[0006] The optical input port I2 is connected with an optical input end of the beam splitter BSI2, a first optical output end of the beam splitter BSI2 is connected with an optical input end of the photodiode MPDI2, and a second optical output end of the beam splitter BSI2 is connected with an optical input end of the second micro-ring modulator;

[0007] The optical input port I3 is connected with an optical input end of the beam splitter BSI3, a first optical output end of the beam splitter BSI3 is connected with an optical input end of the photodiode MPDI3, and a second optical output end of the beam splitter BSI3 is connected with an optical input end of the third micro-ring modulator;

[0008] The light input port I4 is connected with the light input end of the optical splitter BSI4, the first light output end of the optical splitter BSI4 is connected with the light input end of the photodiode MPDI4, and the second light output end of the optical splitter BSI4 is connected with the light input end of the fourth micro-ring modulator;

[0009] The light output ends of the first micro-ring modulator, the second micro-ring modulator, the third micro-ring modulator and the fourth micro-ring modulator are respectively connected with four light input ends of the wavelength division multiplexing combiner MUX, the light output end of the wavelength division multiplexing combiner MUX is connected with the light input end of the optical splitter BSO1, the first light output end of the optical splitter BSO1 is connected with the light input end of the photodiode MPD10, and the second light output end of the optical splitter BSO1 is connected with the light output port O.

[0010] Optionally, the optical splitter BSI1, the optical splitter BSI2, the optical splitter BSI3 and the optical splitter BSI4 are 5%-95% one-to-two optical power splitting devices, wherein the first light output end of the optical splitter BSI1, the optical splitter BSI2, the optical splitter BSI3 and the optical splitter BSI4 outputs 5% of the input light wave energy and inputs into the light input end of the photodiode MPDI1, the photodiode MPDI2, the photodiode MPDI3 and the photodiode MPDI4 respectively, and the second light output end of the optical splitter BSI1, the optical splitter BSI2, the optical splitter BSI3 and the optical splitter BSI4 outputs 95% of the input light wave energy and inputs into the light input end of the first micro-ring modulator, the second micro-ring modulator, the third micro-ring modulator and the fourth micro-ring modulator respectively.

[0011] Optionally, the light input port I1, the light input port I2, the light input port I3, the light input port I4 and the light output port O are all edge couplers arranged on a chip.

[0012] Optionally, the bias voltage ends of the first micro-ring modulator are respectively connected with the BIAS1+ end and the BIAS1- end arranged on the chip, the bias voltage ends of the second micro-ring modulator are respectively connected with the BIAS2+ end and the BIAS2- end arranged on the chip, the bias voltage ends of the third micro-ring modulator are respectively connected with the BIAS3+ end and the BIAS3- end arranged on the chip, and the bias voltage ends of the fourth micro-ring modulator are respectively connected with the BIAS4+ end and the BIAS4- end arranged on the chip.

[0013] Optionally, the two electrical modulation signal input ends of the first micro-ring modulator are connected to the RF1P and RF1N ports provided on the chip, the two electrical modulation signal input ends of the second micro-ring modulator are connected to the RF2P and RF2N ports provided on the chip, the two electrical modulation signal input ends of the third micro-ring modulator are connected to the RF3P and RF3N ports provided on the chip, and the two electrical modulation signal input ends of the fourth micro-ring modulator are connected to the RF4P and RF4N ports provided on the chip.

[0014] Optionally, the two voltage ends of the first micro-ring modulator are connected to the VPN1 and VDD1 ports provided on the chip, the two voltage ends of the second micro-ring modulator are connected to the VPN2 and VDD2 ports provided on the chip, the two voltage ends of the third micro-ring modulator are connected to the VPN3 and VDD3 ports provided on the chip, and the two voltage ends of the fourth micro-ring modulator are connected to the VPN4 and VDD4 ports provided on the chip.

[0015] Optionally, the optical power splitter BSO1 is a 5% to 95% splitting optical power splitter, wherein the first optical output end of the optical power splitter BSO1 outputs 5% of the input optical wave energy and inputs the optical wave energy to the light input end of the photodiode MPD10, and the second optical output end of the optical power splitter BSO1 outputs 95% of the input optical wave energy and inputs the optical wave energy to the optical output port O.

[0016] Optionally, the two electrical output ends of the photodiode MPDI1 are connected to the IPD1+ and IPD1- ports provided on the chip, the two electrical output ends of the photodiode MPDI2 are connected to the IPD2+ and IPD2- ports provided on the chip, the two electrical output ends of the photodiode MPDI3 are connected to the IPD3+ and IPD3- ports provided on the chip, and the two electrical output ends of the photodiode MPDI4 are connected to the IPD4+ and IPD4- ports provided on the chip.

[0017] The two electrical output ends of the photodiode MPD10 are connected to the OPD1+ and OPD1- ports provided on the chip.

[0018] The embodiments of the present application have the following advantages:

[0019] Compared with the prior art, the above technical solution provides a 4x56G baud rate silicon optical modulation chip based on micro-ring modulation technology, which includes four-channel high-bandwidth micro-ring optical modulators and a 4-channel wavelength division multiplexer (MUX) integrated on the chip, and can be used for a four-channel 56G baud / channel rate application of wavelength division multiplexing, thereby realizing a higher integration and lower cost solution and reducing the application cost of an optical module. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the accompanying drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced. Obviously, the accompanying drawings in the following description are only exemplary, and for those skilled in the art, other drawings can be derived from the provided drawings without creative labor.

[0021] Figure 1 A circuit structure block diagram of a four-channel micro-ring wavelength division multiplexing 56G chip is provided for at least one embodiment of the present application. DETAILED DESCRIPTION

[0022] The embodiments of the present application will be described in detail by the specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in the description. Obviously, the described embodiments are part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0023] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second", "third" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance. Unless otherwise specified and limited, the terms "set", "mount", "connected", "connected" should be interpreted broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the communication between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0024] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as there is no conflict.

[0025] The embodiments of the present application provide a four-channel micro-ring wavelength division multiplexing 56G chip, which is described with reference to Figure 1 , comprising:

[0026] the optical input port I1 is connected with the optical input end of the optical splitter BSI1, the first optical output end of the optical splitter BSI1 is connected with the optical input end of the photodiode MPDI1, and the second optical output end of the optical splitter BSI1 is connected with the optical input end of the first micro-ring modulator;

[0027] the optical input port I1 is connected with the optical input end of the optical splitter BSI1, the first optical output end of the optical splitter BSI1 is connected with the optical input end of the photodiode MPDI1, and the second optical output end of the optical splitter BSI1 is connected with the optical input end of the first micro-ring modulator;

[0028] the optical input port I2 is connected with the optical input end of the optical splitter BSI2, the first optical output end of the optical splitter BSI2 is connected with the optical input end of the photodiode MPDI2, and the second optical output end of the optical splitter BSI2 is connected with the optical input end of the second micro-ring modulator;

[0029] the optical input port I2 is connected with the optical input end of the optical splitter BSI2, the first optical output end of the optical splitter BSI2 is connected with the optical input end of the photodiode MPDI2, and the second optical output end of the optical splitter BSI2 is connected with the optical input end of the second micro-ring modulator;

[0030] the optical input port I3 is connected with the optical input end of the optical splitter BSI3, the first optical output end of the optical splitter BSI3 is connected with the optical input end of the photodiode MPDI3, and the second optical output end of the optical splitter BSI3 is connected with the optical input end of the third micro-ring modulator;

[0031] the optical input port I3 is connected with the optical input end of the optical splitter BSI3, the first optical output end of the optical splitter BSI3 is connected with the optical input end of the photodiode MPDI3, and the second optical output end of the optical splitter BSI3 is connected with the optical input end of the third micro-ring modulator;

[0032] In particular, Figure 1 the MUX in the above formula refers to an optical wavelength division multiplexing combiner, which functions to combine four optical signals of different wavelengths into one.

[0033] In some embodiments, the beam splitters BSI1, BSI2, BSI3, BSI4 are 5% to 95% beam splitting devices, wherein the first light output end of the beam splitters BSI1, BSI2, BSI3, BSI4 outputs 5% of the input light wave energy and inputs into the light input end of the photodiodes MPDI1, MPDI2, MPDI3, MPDI4 respectively, and the second light output end of the beam splitters BSI1, BSI2, BSI3, BSI4 outputs 95% of the input light wave energy and inputs into the light input end of the first, second, third, and fourth micro-ring modulators respectively.

[0034] In some embodiments, the light input ports I1, I2, I3, I4 and the light output port O are all edge couplers arranged on the chip.

[0035] Specifically, the light input ports I1, I2, I3, I4 provide four edge couplers for the input of the local oscillator, which are input into the beam splitters BSI1, BSI2, BSI3, BSI4 respectively. The light output port O provides an edge coupler for the four-channel output.

[0036] Specifically, the photodiodes MPDI1, MPDI2, MPDI3, MPDI4 are used for light power monitoring of the four input channels, and the photodiode MPD1O is used for light power monitoring of the output channel.

[0037] In some embodiments, the bias voltage end of the first micro-ring modulator is connected to the BIAS1+ end and the BIAS1- end arranged on the chip respectively, the bias voltage end of the second micro-ring modulator is connected to the BIAS2+ end and the BIAS2- end arranged on the chip respectively, the bias voltage end of the third micro-ring modulator is connected to the BIAS3+ end and the BIAS3- end arranged on the chip respectively, and the bias voltage end of the fourth micro-ring modulator is connected to the BIAS4+ end and the BIAS4- end arranged on the chip respectively.

[0038] In some embodiments, the two electrical modulation signal input terminals of the first micro-ring modulator are respectively connected to the RF1P and RF1N RF ports provided on the chip, the two electrical modulation signal input terminals of the second micro-ring modulator are respectively connected to the RF2P and RF2N RF ports provided on the chip, the two electrical modulation signal input terminals of the third micro-ring modulator are respectively connected to the RF3P and RF3N RF ports provided on the chip, and the two electrical modulation signal input terminals of the fourth micro-ring modulator are respectively connected to the RF4P and RF4N RF ports provided on the chip.

[0039] Specifically, the first micro-ring modulator, the second micro-ring modulator, the third micro-ring modulator, and the fourth micro-ring modulator are respectively RING Modulator1-4 (RING Modulator: micro-ring modulator) in Figure 1

[0040] In some embodiments, the two voltage terminals of the first micro-ring modulator are respectively connected to the VPN1 and VDD1 terminals provided on the chip, the two voltage terminals of the second micro-ring modulator are respectively connected to the VPN2 and VDD2 terminals provided on the chip, the two voltage terminals of the third micro-ring modulator are respectively connected to the VPN3 and VDD3 terminals provided on the chip, and the two voltage terminals of the fourth micro-ring modulator are respectively connected to the VPN4 and VDD4 terminals provided on the chip.

[0041] Specifically, VDD is an external input DC voltage input to the DC bias terminal of the micro-ring modulator, and VPN is an external input DC voltage input to the PN junction of the high-frequency part of the micro-ring modulator.

[0042] In some embodiments, the optical power splitter BSO1 is a 5% to 95% 1-to-2 optical power splitter, wherein the first optical output terminal of the optical power splitter BSO1 outputs 5% of the input optical wave energy and inputs the optical input terminal of the photodiode MPD1O, and the second optical output terminal of the optical power splitter BSO1 outputs 95% of the input optical wave energy and inputs the optical output port O.

[0043] ​In some embodiments, the two electrical output terminals of the photodiode MPDI1 are connected to IPD1+ and IPD1- terminals provided on the chip respectively, the two electrical output terminals of the photodiode MPDI2 are connected to IPD2+ and IPD2- terminals provided on the chip respectively, the two electrical output terminals of the photodiode MPDI3 are connected to IPD3+ and IPD3- terminals provided on the chip respectively, and the two electrical output terminals of the photodiode MPDI4 are connected to IPD4+ and IPD4- terminals provided on the chip respectively.

[0044] The two electrical output terminals of the photodiode MPD10 are connected to OPD1+ and OPD1- terminals provided on the chip respectively.

[0045] In summary, compared with the prior art, the 4x56G baud rate silicon optical modulation chip based on micro-ring modulation technology provided in the application includes four-channel high-bandwidth micro-ring optical modulators and a 4-channel wavelength division multiplexer (MUX) integrated on the chip, and can be used for a four-channel 56G baud / channel rate application of wavelength division multiplexing, thereby realizing a higher integration and lower cost solution and reducing the application cost of an optical module.

[0046] Note that all features disclosed in the specification, including any accompanying claims, abstract, and drawings, can be replaced by alternative features serving the same, equivalent or similar purpose, unless otherwise expressly stated. Therefore, each disclosed feature is only one example of a group of equivalent or similar features, unless expressly stated otherwise. Further, more preferably, even more preferably, and most preferably are simple beginnings of another embodiment described on the basis of the preceding embodiment, the content of the further, more preferably, even more preferably, or most preferably trailing the preceding embodiment is combined with the preceding embodiment as a complete configuration of another embodiment. The combination of several further, more preferably, even more preferably, or most preferably settings trailing the same embodiment can form another embodiment.

[0047] In the implementation of functions and steps, the corresponding functions and steps in each embodiment can also occur in a different order from that shown. For example, two consecutive functions and steps can actually be executed or implemented substantially in parallel, and they can sometimes be executed or implemented in reverse order, depending on the functions involved.

[0048] Although the application has been described in detail with general description and specific embodiments above, some modifications or improvements can be made on the basis of the application, which is obvious to those skilled in the art. Therefore, these modifications or improvements made on the basis of not deviating from the spirit of the application are within the scope of the application claimed.

Claims

1. A four-channel microring wavelength division multiplexing 56G chip, characterized in that, Comprise: optical input port I1, optical input port I2, optical input port I3, optical input port I4, optical output port O, optical splitter BSI1, optical splitter BSI2, optical splitter BSI3, optical splitter BSI4, first micro-ring modulator, second micro-ring modulator, third micro-ring modulator, fourth micro-ring modulator, wavelength division multiplexing combiner MUX, optical splitter BSO1, photodiode MPDI1, photodiode MPDI2, photodiode MPDI3, photodiode MPDI4, photodiode MPD1O, wherein, the optical input port I1 is connected with the optical input end of the optical splitter BSI1, the first optical output end of the optical splitter BSI1 is connected with the optical input end of the photodiode MPDI1, and the second optical output end of the optical splitter BSI1 is connected with the optical input end of the first micro-ring modulator; the optical input port I2 is connected with the optical input end of the optical splitter BSI2, the first optical output end of the optical splitter BSI2 is connected with the optical input end of the photodiode MPDI2, and the second optical output end of the optical splitter BSI2 is connected with the optical input end of the second micro-ring modulator; the optical input port I3 is connected with the optical input end of the optical splitter BSI3, the first optical output end of the optical splitter BSI3 is connected with the optical input end of the photodiode MPDI3, and the second optical output end of the optical splitter BSI3 is connected with the optical input end of the third micro-ring modulator; the optical input port I4 is connected with the optical input end of the optical splitter BSI4, the first optical output end of the optical splitter BSI4 is connected with the optical input end of the photodiode MPDI4, and the second optical output end of the optical splitter BSI4 is connected with the optical input end of the fourth micro-ring modulator; the optical output ends of the first micro-ring modulator, the second micro-ring modulator, the third micro-ring modulator, and the fourth micro-ring modulator are respectively connected with four optical input ends of the wavelength division multiplexing combiner MUX, the optical output end of the wavelength division multiplexing combiner MUX is connected with the optical input end of the optical splitter BSO1, the first optical output end of the optical splitter BSO1 is connected with the optical input end of the photodiode MPD1O, and the second optical output end of the optical splitter BSO1 is connected with the optical output port O.

2. The four-channel micro-ring wavelength division multiplexing 56G chip according to claim 1, characterized in that, The beam splitter BSI1, the beam splitter BSI2, the beam splitter BSI3 and the beam splitter BSI4 are 5% to 95% beam splitting devices, wherein the first light output end of the beam splitter BSI1, the beam splitter BSI2, the beam splitter BSI3 and the beam splitter BSI4 outputs 5% of the input light wave energy and inputs into the light input end of the photodiode MPDI1, the photodiode MPDI2, the photodiode MPDI3 and the photodiode MPDI4 respectively, and the second light output end of the beam splitter BSI1, the beam splitter BSI2, the beam splitter BSI3 and the beam splitter BSI4 outputs 95% of the input light wave energy and inputs into the light input end of the first micro-ring modulator, the second micro-ring modulator, the third micro-ring modulator and the fourth micro-ring modulator respectively.

3. The four-channel micro-ring wavelength division multiplexing 56G chip according to claim 1, wherein, The light input port I1, the light input port I2, the light input port I3, the light input port I4 and the light output port O are all edge couplers arranged on the chip.

4. The four-channel micro-ring wavelength division multiplexing 56G chip according to claim 1, wherein, The bias voltage end of the first micro-ring modulator is connected to the BIAS1+ end and the BIAS1- end arranged on the chip respectively, the bias voltage end of the second micro-ring modulator is connected to the BIAS2+ end and the BIAS2- end arranged on the chip respectively, the bias voltage end of the third micro-ring modulator is connected to the BIAS3+ end and the BIAS3- end arranged on the chip respectively, and the bias voltage end of the fourth micro-ring modulator is connected to the BIAS4+ end and the BIAS4- end arranged on the chip respectively.

5. The four-channel micro-ring wavelength division multiplexing 56G chip according to claim 1, wherein, The two electric modulation signal input ends of the first micro-ring modulator are connected to the radio frequency port RF1P and the radio frequency port RF1N arranged on the chip respectively, the two electric modulation signal input ends of the second micro-ring modulator are connected to the radio frequency port RF2P and the radio frequency port RF2N arranged on the chip respectively, the two electric modulation signal input ends of the third micro-ring modulator are connected to the radio frequency port RF3P and the radio frequency port RF3N arranged on the chip respectively, and the two electric modulation signal input ends of the fourth micro-ring modulator are connected to the radio frequency port RF4P and the radio frequency port RF4N arranged on the chip respectively.

6. The four-channel micro-ring wavelength division multiplexing 56G chip according to claim 1, wherein, The two voltage ends of the first micro-ring modulator are connected to the VPN1 end and the VDD1 end arranged on the chip respectively, the two voltage ends of the second micro-ring modulator are connected to the VPN2 end and the VDD2 end arranged on the chip respectively, the two voltage ends of the third micro-ring modulator are connected to the VPN3 end and the VDD3 end arranged on the chip respectively, and the two voltage ends of the fourth micro-ring modulator are connected to the VPN4 end and the VDD4 end arranged on the chip respectively.

7. The four-channel micro-ring wavelength division multiplexing 56G chip according to claim 1, wherein, The beamsplitter BSO1 is a 5% vs. 95% beamsplitter, wherein the first optical output of the beamsplitter BSO1 outputs 5% of the input optical power and inputs into the optical input of the photodiode MPD1O, and the second optical output of the beamsplitter BSO1 outputs 95% of the input optical power and inputs into the optical output port O.

8. The four-channel micro-ring WDM 56G chip of claim 1, wherein, The two electrical outputs of the photodiode MPDI1 are connected to IPD1+ and IPD1- on the chip, respectively, the two electrical outputs of the photodiode MPDI2 are connected to IPD2+ and IPD2- on the chip, respectively, the two electrical outputs of the photodiode MPDI3 are connected to IPD3+ and IPD3- on the chip, respectively, and the two electrical outputs of the photodiode MPDI4 are connected to IPD4+ and IPD4- on the chip, respectively. The two electrical outputs of the photodiode MPD1O are connected to OPD1+ and OPD1- on the chip, respectively.

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