Simple anti-ESD (Electro-Static Discharge) control circuit
By setting components such as resistors, capacitors, and diodes at key pins of the power control chip, a simple ESD protection control circuit is constructed, which solves the problem of power system damage due to electrostatic discharge, improves ESD resistance, and is suitable for consumer switching power supplies, PD fast charging power supplies, and LED lighting power supplies.
Patent Information
- Application Number
- CN202422700571.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-06
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2034-11-06
AI Technical Summary
Power systems are susceptible to damage from electrostatic discharge (ESD), and existing technologies lack effective protective measures.
Design a simple ESD protection control circuit. This involves reducing the ESD impact on the FB pin by placing a resistor and capacitor between the FB pin of the power control chip and the optocoupler; reducing oscillation at the COMP pin by connecting a capacitor and resistor in parallel; protecting the electrolytic capacitor with a current-limiting resistor and a diode voltage regulator circuit to provide a stable voltage; reducing the risk of damage to the VCC pin by placing a bypass capacitor next to it; and protecting the chip between the GATE and VCC pins by a parallel Zener diode.
It effectively reduces damage to power systems caused by electrostatic discharge, improves ESD resistance, and protects power systems from external damage. It is suitable for consumer switching power supplies, PD fast charging power supplies, and LED lighting power supplies.
Smart Images

Figure CN223613039U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the technical field of protection circuit, especially relates to a simple ESD control circuit. BACKGROUND
[0002] Electrostatic discharge is ESD (Electro-Static discharge), and it is the charge transfer caused by the mutual approach or direct contact of objects with different electrostatic potentials, ESD can form high voltage, strong electric field, instantaneous large current and strong electromagnetic radiation, and it is a common near-field hazard source, in the production of manufacturers and the use process of consumers, power system is easy to be damaged due to static electricity, therefore, it is necessary to design a kind of ESD control circuit, reduce the damage of power system due to static electricity, improve the ESD resistance. SUMMARY
[0003] Therefore, the utility model aims at providing a simple ESD control circuit to solve the problem that power system is easy to be damaged due to static electricity.
[0004] Based on the above purpose, the utility model provides a simple ESD control circuit, which comprises a power control chip, and further comprises:
[0005] Optocoupler, diode, voltage stabilizing diode, fifth resistor, sixth resistor, seventh resistor, eighth resistor, ninth resistor, tenth resistor, electrolytic capacitor, first capacitor, second capacitor and third capacitor;
[0006] The electrolytic capacitor is connected to the power input through the sixth resistor and the fifth resistor, and the electrolytic capacitor is used to provide VCC power supply for the power control chip;
[0007] The ninth resistor is connected in series between the FB pin of the power control chip and the middle of the optocoupler, and the FB pin of the power control chip is further connected with the second capacitor connected to the ground;
[0008] The first capacitor and the tenth resistor are connected in parallel at the feedback COMP pin of the power control chip and are grounded;
[0009] The seventh resistor is used as a current-limiting resistor, and after voltage stabilization through the diode, the electrolytic capacitor is provided with stable voltage;
[0010] The third capacitor is arranged at the VCC pin of the power control chip and is grounded;
[0011] The voltage stabilizing diode is connected in parallel between the GATE pin and the VCC pin of the power control chip.
[0012] Preferably, the power input is AC input.
[0013] Preferably, the AC input passes through a fuse, a thermistor, and then is filtered by a non-polar capacitor, and then is started by an AC resistance bridge composed of a first resistor, a second resistor, a third resistor and a fourth resistor, and then the fifth resistor and the sixth resistor are used to charge the electrolytic capacitor.
[0014] Preferably, the power control chip is a surface-mounted chip, and the diode, the zener diode, the resistor and the capacitor are all surface-mounted devices.
[0015] The utility model discloses the beneficial effect: the utility model discloses a resistance is set in series in power control chip FB foot and opto-coupler middle, and FB foot ground capacitor, jointly play to reduce the FB pin is influenced by ESD impact, set capacitor and resistance shunt under the feedback COMP foot, can effectively reduce COMP foot concussion, reduce the COMP pin is influenced by ESD impact, set the current -limiting resistance, through diode voltage stabilizing, provides stable voltage for electrolytic capacitor, and bypass capacitor is placed in the chip VCC pin side, can effectively reduce the risk of VCC pin because of ESD damage, still through setting the stabilivolt shunt between chip GATE foot and VCC foot, the reverse breakdown characteristic of stabilivolt can effectively protect the chip from ESD and other external factors damage, and this circuit can be applied to consumer switching power supply, PD fast charging power, LED lighting power supply and the field, can effectively reduce the damage of power supply system because of static electricity, and improve ESD resistance. BRIEF DESCRIPTION OF DRAWINGS
[0016] In order to more clearly illustrate the technical scheme in the utility model or the prior art, the following will briefly introduce the drawings needed to be used in the embodiment or the prior art description, and obviously, the drawings in the following description are only the utility model, and for those skilled in the art, other drawings can be obtained according to these drawings without creative labor.
[0017] Figure 1 It is the anti-ESD control circuit diagram of the utility model embodiment; DETAILED DESCRIPTION
[0018] In order to make the purpose, technical scheme and advantages of the utility model more clearly, the following will be further described in detail by combining with specific embodiments.
[0019] It should be noted that, unless otherwise defined, technical or scientific terms used in the present application should be understood as their common meanings to those skilled in the art to which the present application belongs. In the present application, "first", "second" and similar words do not represent any order, quantity or importance, but are only used to distinguish different components. "Include" or "contain" and similar words mean that the elements or objects before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connected" or "connected" and similar words are not limited to physical or mechanical connection, but can include electrical connection, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to represent relative positional relationship, which may change accordingly when the absolute position of the described object changes.
[0020] As shown in Figure 1 The embodiment of the present application provides a simple ESD control circuit, which comprises a power control chip U1, an optical coupler U2, a diode D2, a voltage stabilizing diode ZD1, a fifth resistor R5, a sixth resistor R6, a seventh resistor R26, an eighth resistor R28, a ninth resistor R29, a tenth resistor R30, an electrolytic capacitor EC3, a first capacitor C5, a second capacitor C7 and a third capacitor C8.
[0021] The electrolytic capacitor EC3 is connected to the AC input through the sixth resistor R6 and the fifth resistor R5, and the electrolytic capacitor EC3 is used to provide VCC power supply for the power control chip U1.
[0022] The ninth resistor R29 is connected in series between the FB pin of the power control chip U1 and the middle of the optical coupler U2B, and the FB pin of the power control chip is also connected with the second capacitor C7 connected to the ground. The optical coupler also includes a U2A part, which is used to transmit the emission of light to the receiving end of light and signal amplification end, to complete the electro-optical-electric conversion, realize input, output and isolation.
[0023] The first capacitor C5 and the tenth resistor R30 are connected in parallel at the feedback COMP pin of the power control chip U1 and grounded.
[0024] The seventh resistor R26 is a current limiting resistor, which provides a stable voltage for the electrolytic capacitor EC3 after voltage stabilization through the diode D2.
[0025] The third capacitor C8 is arranged at the VCC pin of the power control chip U1 and grounded.
[0026] The voltage stabilizing diode ZD1 is connected in parallel between the GATE pin and the VCC pin of the power control chip.
[0027] As an embodiment, the AC input is filtered by the fuse F1, the thermistor NTC1, the non-polar capacitor CX1, the resistance bridge AC starting composed of the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4, and the electrolytic capacitor EC3 is charged by the fifth resistor R5 and the sixth resistor R6.
[0028] When the AC input is turned on, the F1, the NTC1, the CX1 filter, the R1, the R2, the R3, the R4 AC starting, the R5, the R6 charging the EC3, and the chip U1 providing the VCC power supply.
[0029] When the EC3 capacitor is full, the chip U1 starts to work; the R29 is connected in series between the chip FB pin and the optocoupler U2, and the FB pin is connected to the ground capacitor C7, which can reduce the influence of the FB pin on the ESD impact; the C5 and the R30 are connected in parallel under the feedback COMP pin, which can effectively reduce the COMP pin oscillation and reduce the influence of the COMP pin on the ESD impact; the R26 is a current-limiting resistor, which provides a stable voltage to the EC3 after being stabilized by the D2, and the C8 bypass capacitor is placed beside the chip VCC pin, which can effectively reduce the risk of VCC pin damage due to ESD;
[0030] The ZD1 zener diode is connected in parallel between the GATE pin and the VCC pin, and when the power supply is working, the reverse breakdown characteristic of the ZD1 zener diode can effectively protect the U1 from damage caused by ESD and other external factors.
[0031] As an embodiment, the power control chip is a surface-mounted chip, i.e., an SMD power control chip, and the diode, the zener diode, the resistor and the capacitor are all surface-mounted devices, i.e., SMD devices.
[0032] The circuit can be applied to consumer switching power supplies, PD fast charging power supplies, LED lighting power supplies and other fields; it can effectively reduce the damage of the power supply system caused by static electricity and improve the ESD resistance, such as Figure 1The use scene of the circuit in common consumer circuit system is shown, wherein the accessory circuit is each protection and control circuit of common consumer power supply system, specifically comprising: a protection and lightning protection circuit composed of F1, ZVR1 and NTC1; an electromagnetic filter circuit composed of CX1 and LF2; a rectification filter circuit composed of BD1, EC1, EC2 and C1; a primary RCD absorption circuit composed of C2, R7, R8, R9, R10, R11, R12, R13 and D1; a driving Q1 circuit composed of D4, R15 and R16; a current detection circuit composed of C6, R18, R19, R20, R21 and R22; a secondary rectification, filter circuit, secondary absorption circuit composed of D6, EC4, EC5 and LF3; a light coupling power supply and feedback circuit composed of R39 and R34; a voltage adjustment loop composed of C12, C11 and R35; and a secondary voltage division circuit composed of R36, R37, R38 and U3.
[0033] It should be understood by those of ordinary skill in the art that the above discussion of any embodiment is merely exemplary and is not intended to suggest the scope of the present application (including claims) is limited to these examples; under the idea of the present application, the above embodiments or technical features in different embodiments can also be combined, steps can be implemented in any order, and there are many other changes of different aspects of the present application as described above, which are not provided in details for the sake of brevity.
[0034] The present application is intended to cover all such alternatives, modifications and variations as fall within the broad scope of the appended claims. Accordingly, any and all such modifications, variations, alternatives and equivalents should be considered as falling within the scope of the present application.
Claims
1. A simple ESD protection control circuit comprising a power supply control chip, characterized in that, Also include: optical coupling, diode, voltage regulator diode, the fifth resistance, the sixth resistance, the seventh resistance, the eighth resistance, the ninth resistance, the tenth resistance, electrolytic capacitor, the first capacitor, the second capacitor and the third capacitor; Wherein the electrolytic capacitor is connected to the power input through the sixth resistance and the fifth resistance, the electrolytic capacitor is used to provide VCC power supply for the power control chip; The ninth resistance is connected in series between the FB pin of the power control chip and the optical coupling, and the FB pin of the power control chip is also connected with the second capacitor connected to ground; The first capacitor and the tenth resistance are connected in parallel at the feedback COMP pin of the power control chip and grounded; The seventh resistance is a current limiting resistance, which provides a stable voltage for the electrolytic capacitor after voltage regulation by the diode; The third capacitor is connected to the VCC pin of the power control chip and grounded; The voltage regulator diode is connected in parallel between the GATE pin and the VCC pin of the power control chip.
2. The simple ESD control circuit according to claim 1, wherein The power input is an AC input.
3. The simple ESD control circuit according to claim 2, wherein The AC input passes through a fuse, a thermistor, and then a non-polar capacitor filter, and then an AC start-up through a resistance bridge composed of the first resistance, the second resistance, the third resistance and the fourth resistance, and then charges the electrolytic capacitor through the fifth resistance and the sixth resistance.
4. The simple ESD control circuit according to claim 1, wherein The power control chip is a surface-mounted chip, and the diode, voltage regulator diode, resistor and capacitor are all surface-mounted devices.