Cryptographic card device based on quantum random number

Abstract

The utility model discloses a password card device based on quantum random numbers, which comprises a laser, a light source detection acquisition circuit, an integrated circuit module and a processor, and is characterized in that the laser is used for generating disordered laser signals and inputting the disordered laser signals into the light source detection acquisition circuit; the light source detection acquisition circuit is used for carrying out photoelectric conversion processing on the disordered laser signal, converting the laser signal into a disordered electric signal and inputting the disordered electric signal into the integrated circuit module; the integrated circuit module performs post-processing on the disordered electric signals to obtain a random number sequence and inputs the random number sequence into the processor; and the processor is used for processing the random number sequence to obtain the quantum key pair. According to the utility model, random numbers are prepared by using unordered light sources, and key pairs are prepared by matching the integrated circuit module and the processor, so that the key source of the device is safer and more reliable; meanwhile, the device is simplified, the length is increased, and the cost is reduced; and an independent internal device access interface improves the security and reliability of the system.

Description

TECHNICAL FIELD

[0001] The utility model relates to quantum random number password card field, concretely relates to a password card device based on quantum random number. BACKGROUND

[0002] Quantum random number password card is a kind of password card integrated quantum random number generation technology, it utilizes the principle of quantum physics to generate real random number, provides higher security and unpredictability for password system.

[0003] Quantum random number password card as a kind of new information security technology product, has extensive application prospect and development potential.With the continuous development and application popularization of quantum information technology, quantum random number password card will play a more important role in guaranteeing information security.

[0004] The existing quantum random number password card device mainly includes quantum random number generator, laser light source, probe sampling circuit and FPGA, and its defects are high cost, but the integration is not high, the key source needs to be imported by USB interface, there is security risk, and the key is easy to be stolen or modified;Data encryption and decryption are carried out in FPGA, occupy the resources of FPGA, make the running efficiency of device low.

[0005] Therefore, the existing technology needs to be improved to propose a quantum random number password card device with high integration, cost-effective, good security and high processing efficiency. UTILITY MODEL CONTENT

[0006] In order to solve the above technical problems, a quantum random number password card device with high integration, cost-effective, good security and high processing efficiency is proposed.

[0007] To achieve the above purpose, the technical scheme adopted by the utility model is as follows: a password card device based on quantum random number, including laser, light source probe collection circuit, integrated circuit module and processor,

[0008] The laser is used to generate disordered laser signal and input into light source probe collection circuit;

[0009] The light source probe collection circuit is used for photoelectric conversion processing of the disordered laser signal, converts laser signal into disordered electrical signal and inputs into integrated circuit module;

[0010] The integrated circuit module carries out post-processing to the disordered electrical signal and obtains random number sequence and inputs into processor;

[0011] The processor is used for processing random number sequence and obtaining quantum key pair.

[0012] Preferably, the integrated circuit module comprises an FPGA chip and a peripheral circuit,

[0013] The peripheral circuit comprises a crystal oscillator circuit, a DDR circuit, a configuration circuit, a PCIE interface and a debugging interface.

[0014] The crystal oscillator circuit is used for providing a system working clock for the FPGA chip.

[0015] The DDR circuit is used for expanding the memory of the FPGA and storing data in the working process of the FPGA.

[0016] The configuration circuit is used for storing the mirror start file of the FPGA.

[0017] The PCIE interface is an external output password data interface and is used for receiving or outputting external password data.

[0018] The debugging interface is mainly used for debugging the configuration setting of the FPGA.

[0019] Preferably, the main control chip of the integrated circuit module adopts an FPGA chip of EP4CGX150DF27I7 type.

[0020] Preferably, the processor adopts an HSM2 algorithm chip.

[0021] Preferably, a storage unit, a memory unit and a key storage unit are further comprised, and the storage unit, the memory unit and the key storage unit are connected with the processor respectively.

[0022] Preferably, the storage unit stores the configuration information of the processor.

[0023] The memory unit is used for storing the data in the working process of the processor unit.

[0024] The key storage unit is used for storing the generated key.

[0025] The utility model has the beneficial technical effects that:

[0026] The utility model discloses a random number is prepared by using disordered light source, and then the preparation of key pair is carried out through the cooperation of the integrated circuit module and the processor, so that the key source of the device is more safe and reliable. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 It is a whole structure block diagram of the password card device based on quantum random number. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical scheme and advantages of the utility model more clearly, the utility model is further described in detail below in combination with examples, but the scope of protection of the utility model is not limited to the following specific examples.

[0029] As shown in Figure 1 A quantum random number-based password card device, comprising a laser, a light source detection and collection circuit, an integrated circuit module and a processor,

[0030] Specifically, the connection relationship between each device is as follows:

[0031] The laser is connected with the light source detection and collection circuit through an optical signal, the light source detection and collection circuit is connected with the integrated circuit module through an electrical signal, and the integrated circuit module and the processor are connected with each other through an electrical signal;

[0032] The main functions of each device are as follows:

[0033] The laser is used to generate a disordered laser signal and input into the light source detection and collection circuit;

[0034] The light source detection and collection circuit is used to perform photoelectric conversion processing on the disordered laser signal, convert the laser signal into a disordered electrical signal and input into the integrated circuit module;

[0035] The light source detection and collection circuit adopts an existing detection and collection circuit, which mainly adopts a GD3546Y type detector as a main device and a peripheral circuit.

[0036] The integrated circuit module performs post-processing on the disordered electrical signal to obtain a random number sequence and input into the processor, and the post-processing method adopts an existing conventional post-processing method.

[0037] Specifically, the integrated circuit module comprises an FPGA chip and a peripheral circuit, wherein the master control chip adopts an EP4CGX150DF27I7 type FPGA chip, and the existing post-processing algorithm function is configured in the EP4CGX150DF27I7 type, and the random number sequence is obtained through sample collection, discrete transformation and XOR processing of the disordered electrical signal by the built-in post-processing algorithm.

[0038] The peripheral circuit comprises a crystal oscillator circuit, a DDR circuit, a configuration circuit, a PCIE interface and a debugging interface; the crystal oscillator circuit is used to provide a system working clock for the FPGA chip, and the FPGA works according to the clock frequency;

[0039] The DDR circuit is used for expanding the memory of the FPGA, storing a large amount of data in the working process of the FPGA, and enabling the FPGA to perform a large amount of data processing.

[0040] The configuration circuit is used for storing the mirror start file of the FPGA, and mainly comprises a configuration chip of the FPGA. When the FPGA is powered on, the content of the start file is read to initialize and define the internal circuit of the FPGA, and after the FPGA is initialized, the FPGA works according to the defined working mode.

[0041] The PCIE interface is an external output password data interface, used for receiving or outputting external password data, and the PCIE interface is mainly completed by a high-speed transceiver in the FPGA.

[0042] The debugging interface is mainly used for debugging the configuration setting of the FPGA.

[0043] The processor is used for processing the random number sequence to obtain a quantum key pair. The processor adopts an HSM2 algorithm chip of Macrovision Electronics.

[0044] The processor further comprises a processor peripheral circuit, which is mainly a crystal oscillator circuit. The crystal oscillator circuit mainly provides a necessary clock for the system work of the algorithm chip. The algorithm chip works regularly according to the frequency of the crystal oscillator.

[0045] The HSM2 algorithm chip internally has a fixed key algorithm and an encryption and decryption algorithm. The key algorithm and the encryption algorithm are both prior art algorithms. According to the key algorithm, the random number sequence generates a corresponding key pair. The key pair is stored in a key storage unit and waits for use.

[0046] The encryption and decryption algorithm can perform encryption and decryption processing on the data transmitted from the FPGA. After the encryption and decryption are completed, the data is transmitted to the data cache space of the FPGA and output through the PCIE interface.

[0047] Specifically, the device further comprises a storage unit, a memory unit and a key storage unit, which are connected with the processor respectively. The storage unit stores the configuration information of the processor. The memory unit is used for storing the data in the working process of the processor unit. The key storage unit is used for storing the generated key.

[0048] The working principle of the chip device is as follows:

[0049] The laser generates a disordered light source into a light source detection and collection circuit, the light source detection and collection circuit carries out photoelectric conversion processing on the disordered light source, and converts the disordered light signal into a disordered electric signal; the disordered electric signal enters an integrated circuit module, the integrated circuit module carries out post-processing on the disordered electric signal to obtain a random number sequence, and simultaneously transmits the random number sequence to a processor; the processor receives the random number, generates a key pair according to a key algorithm built-in the processor, and stores the key pair into a key storage unit for use when the processor carries out data encryption and decryption processing;

[0050] When communication, the data to be encrypted enters the FPGA chip of the integrated circuit module through the PCIE interface, and the FPGA chip buffers the data to the storage space.

[0051] When the FPGA chip receives the encryption and decryption command, the data to be encrypted is transmitted to the processor, at this time the processor calls the key pair in the key storage unit, and carries out encryption and decryption processing on the data to be encrypted according to the built-in password algorithm; the encryption and decryption data after the encryption and decryption processing is transmitted back to the FPGA chip, the FPGA chip receives the encryption and decryption data, and simultaneously outputs the encryption and decryption data to the outside through the PCIE interface.

[0052] The utility model discloses a through using disordered light source to prepare random number, then through integrated circuit module and processor cooperation carry out the preparation of key pair, make the key source of device more safe and reliable, simultaneously, need not external key import device, simplify the device, improve and length, reduce the cost, independent internal device access interface can distinguish the access of external user, effectively distinguish the user of illegal access, greatly improve the security and reliability of system.

[0053] According to the disclosure and teaching of the above description, the skilled in the art of the utility model can also change and modify the above embodiment. Therefore, the utility model is not limited to the specific embodiments disclosed and described above, and some modifications and changes of the utility model should also fall within the protection scope of the claims of the utility model. In addition, although some specific terms are used in the specification, these terms are only for convenience and do not constitute any limitation on the utility model.

Claims

1. A quantum random number based cryptographic card device, characterized by, The application relates to a quantum key generation device, which comprises a laser, a light source detection and collection circuit, an integrated circuit module and a processor. The laser is used for generating a disordered laser signal and inputting the disordered laser signal into the light source detection and collection circuit. The light source detection and collection circuit is used for photoelectric conversion processing of the disordered laser signal, converting the laser signal into a disordered electric signal and inputting the disordered electric signal into the integrated circuit module. The integrated circuit module is used for post-processing of the disordered electric signal to obtain a random number sequence and inputting the random number sequence into the processor. The processor is used for processing the random number sequence to obtain a quantum key pair.

2. A quantum random number based cryptographic card apparatus as claimed in claim 1, wherein, The integrated circuit module comprises an FPGA chip and a peripheral circuit. The peripheral circuit comprises a crystal oscillator circuit, a DDR circuit, a configuration circuit, a PCIE interface and a debugging interface. The crystal oscillator circuit is used for providing a system working clock for the FPGA chip. The DDR circuit is used for expanding the memory of the FPGA and storing data in the working process of the FPGA. The configuration circuit is used for storing a mirror image start file of the FPGA. The PCIE interface is an external output password data interface and is used for receiving or outputting external password data. The debugging interface is mainly used for debugging the configuration setting of the FPGA.

3. A quantum random number based cryptographic card apparatus as defined in claim 1, wherein, The main control chip of the integrated circuit module adopts an EP4CGX150DF27I7 type FPGA chip.

4. A quantum random number based cryptographic card apparatus as defined in claim 1, wherein, The processor adopts an HSM2 algorithm chip.

5. A quantum random number based cryptographic card apparatus as defined in claim 1, wherein, The device further comprises a storage unit, a memory unit and a key storage unit, which are connected with the processor.

6. A quantum random number based cryptographic card apparatus as claimed in claim 5, wherein, The storage unit stores the configuration information of the processor. The memory unit is used for storing the data in the working process of the processor unit. The key storage unit is used for storing the generated key.

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