Semiconductor structure

Abstract

The utility model provides a semiconductor structure. The semiconductor structure comprises a substrate; the first conductive layer is located on one side of the substrate, the maximum thickness of the first conductive layer in the vertical direction is a preset thickness, the distance between the highest point and the lowest point, away from the surface of the substrate, of the first conductive layer is a preset distance, the preset distance is larger than the preset thickness, the highest point is the point farthest from the substrate in the vertical direction, and the lowest point is the point farthest from the substrate in the vertical direction. The lowest point is the point closest to the substrate in the vertical direction; the metal structure is located on the surface, away from the substrate, of the first conductive layer, and a first gap is formed in the metal structure.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a semiconductor structure. BACKGROUND

[0002] At present, a large number of metal structures are usually arranged in a large-scale integrated circuit, which can be used for realizing electrical transmission or only as a redundant component (i.e. not realizing electrical function). How to improve the performance of the metal structure is a technical problem to be solved at present. CONTENT

[0003] The main purpose of the present application is to provide a semiconductor structure to at least solve the problem of poor performance of the metal structure in the prior art.

[0004] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a semiconductor structure is provided, comprising: a substrate; a first conductive layer located on one side of the substrate, the maximum thickness of the first conductive layer in the vertical direction is a predetermined thickness, the distance between the highest point and the lowest point of the surface of the first conductive layer away from the substrate is a predetermined distance, the predetermined distance is greater than the predetermined thickness, the highest point is the point farthest from the substrate in the vertical direction, and the lowest point is the point closest to the substrate in the vertical direction; a metal structure located on the surface of the first conductive layer away from the substrate, the metal structure has a first void.

[0005] Optionally, the first conductive layer has a first groove, the lowest point is located on the bottom surface of the first groove, the highest point is located on the surface on both sides of the first groove, and the projection of the first void on the first conductive layer is located in the first groove.

[0006] Optionally, the semiconductor structure further comprises: a second conductive layer located between the substrate and the first conductive layer, the distance between the middle surface of the second conductive layer and the substrate surface is less than the distance between the two side surfaces of the second conductive layer and the substrate surface, the projection of the highest point on the second conductive layer is located on the two side surfaces of the second conductive layer, the projection of the lowest point on the second conductive layer is located on the middle surface of the second conductive layer, the same surface of the second conductive layer includes the two side surfaces of the second conductive layer and the middle surface of the second conductive layer, and the two side surfaces of the second conductive layer are located on both sides of the middle surface of the second conductive layer.

[0007] Optionally, the material of the second conductive layer is selected from at least one of amorphous silicon layer, polycrystalline silicon and amorphous silicon; and the materials of the first conductive layer and the second conductive layer are the same.

[0008] Optionally, the semiconductor structure further comprises: an oxide layer on a surface of the second conductive layer close to the first conductive layer, a thickness of the oxide layer in the vertical direction is less than a thickness of the second conductive layer in the vertical direction.

[0009] Optionally, the substrate comprises: an active region; a trench isolation structure disposed adjacent to the active region, the trench isolation structure comprises a first insulating layer, a second insulating layer and a third insulating layer stacked in sequence, wherein a top surface of the second insulating layer is higher than a top surface of the third insulating layer, the second conductive layer covers the top surface of the third insulating layer and partially covers the top surface of the second insulating layer, the top surface is a surface away from the substrate.

[0010] Optionally, the semiconductor structure further comprises: a side wall structure comprising a first part and a second part, the first part is located on a side surface of the first conductive layer, the metal structure and the second conductive layer, and the second part is sandwiched between the second insulating layer and the active region and located on a surface of the first insulating layer away from the substrate.

[0011] Optionally, in a horizontal direction, a maximum width of the second conductive layer is greater than a maximum width of the third insulating layer and less than a maximum width of the trench isolation structure, the horizontal direction is perpendicular to the vertical direction.

[0012] Optionally, the metal structure comprises: a first metal layer on a surface of the first conductive layer away from the substrate; a second metal layer on a surface of the first metal layer away from the first conductive layer, a thickness of the second metal layer in the vertical direction is greater than a thickness of the first metal layer, and the first void is located in the second metal layer.

[0013] Optionally, at least one of the first conductive layer and the second conductive layer has a second void.

[0014] According to another aspect of the present application, a semiconductor structure is provided, comprising: a substrate comprising an active region and a trench isolation structure; an active region located in the substrate; a trench isolation structure located in the substrate and disposed adjacent to the active region, comprising a plurality of insulating layers stacked in sequence, a top surface of an innermost insulating layer of the plurality of insulating layers is lower than a top surface of the active region; a conductive structure located on the trench isolation structure, the conductive structure has a first recess; a metal structure located on the conductive structure and partially located in the first recess; a first void located in the metal structure, a projection of the first void on the conductive structure is located in the first recess.

[0015] Optionally, the conductive structure comprises: a second conductive layer on the trench isolation structure, the second conductive layer having a second recess; and a first conductive layer on the second conductive layer and partially in the second recess, the first conductive layer having the first recess.

[0016] Optionally, the semiconductor structure further comprises an oxide layer between the first conductive layer and the second conductive layer.

[0017] According to still another aspect of the present application, there is provided a semiconductor structure comprising: a substrate having an isolation trench; a trench isolation structure in the isolation trench, and at least a portion of a top surface of the trench isolation structure being more sunken than a top surface of the substrate; a conductive structure on the trench isolation structure, the conductive structure having a first recess; a first metal layer on the conductive structure, the first metal layer having a first depression corresponding to a top surface of the first recess, a lowest point of the first depression being lower than a highest point of two side surfaces of the first recess in a vertical direction; a second metal layer on the first metal layer and partially in the first depression; and a first void in the second metal layer, a projection of the first void on the conductive structure being in the first recess.

[0018] By applying the technical solution of the present application, the metal layer on the first conductive layer will sink along the large height difference, thereby forming a void. The existence of the void makes the metal structure have better heat dissipation and better ductility, and is beneficial to the lightweight design of the semiconductor structure, and realizes the optimization of the performance of the metal structure, thereby improving the overall performance of the semiconductor structure. BRIEF DESCRIPTION OF DRAWINGS

[0019] The accompanying drawings, which form a part of the present application, are included to provide a further understanding of the application, and are incorporated herein for purposes of illustrating the illustrative embodiments of the present application and the explanations provided herein are made with respect to the accompanying drawings. In the drawings:

[0020] Figure 1 FIG. 1 shows a cross-sectional structure schematic diagram of a semiconductor structure according to an embodiment of the present application;

[0021] Figure 2 FIG. 2 shows a cross-sectional structure schematic diagram of another semiconductor structure according to an embodiment of the present application, in which a top surface of a third insulating layer is sunken;

[0022] Figure 3 FIG. 3 shows a cross-sectional structure schematic diagram of still another semiconductor structure according to an embodiment of the present application;

[0023] Figure 4Fig. 6 shows a schematic diagram of a cross-sectional structure of still another semiconductor structure according to embodiments of the present application;

[0024] Figure 5 Fig. 6 shows a schematic diagram of a cross-sectional structure of still another semiconductor structure according to embodiments of the present application.

[0025] In the drawings, the following reference signs are used:

[0026] 10, substrate; 11, conductive structure; 12, metal structure; 13, first void; 15, oxide layer; 16, trench isolation structure; 17, insulating layer; 18, side wall structure; 19, second void; 111, first conductive layer; 112, second conductive layer; 113, first recess; 114, second recess; 121, first metal layer; 122, second metal layer; 171, first insulating layer; 172, second insulating layer; 173, third insulating layer; 181, first part; 182, second part. DETAILED DESCRIPTION

[0027] It should be noted that the embodiments and features of the embodiments in the present application can be combined with each other without conflict. The technical solutions in the embodiments of the present application will be described in detail below with reference to the drawings and in combination with the embodiments.

[0028] In order to make the personnel in the technical field better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the person of ordinary skill in the art without making creative labor should belong to the scope of protection of the present application.

[0029] It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units does not necessarily limit to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0030] As introduced in the background, there is a technical problem of poor performance of metal structure in the prior art. To solve the technical problem, the embodiments of the present application provide a semiconductor structure.

[0031] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application.

[0032] A semiconductor structure is provided in the embodiment, Figure 1 A cross-sectional structure schematic diagram of a semiconductor structure of the present application is exemplarily shown, as Figure 1 The semiconductor structure comprises:

[0033] a substrate 10;

[0034] a first conductive layer 111 located on one side of the substrate 10, the maximum thickness of the first conductive layer 111 in a vertical direction being a predetermined thickness D1, the distance between the highest point and the lowest point of the surface of the first conductive layer 111 away from the substrate 10 being a predetermined distance D2, the predetermined distance D2 being greater than the predetermined thickness D1, the highest point being the point farthest from the substrate 10 in the vertical direction, and the lowest point being the point closest to the substrate 10 in the vertical direction;

[0035] a metal structure 12 located on the surface of the first conductive layer 111 away from the substrate 10, the metal structure 12 having a first gap 13 therein.

[0036] In the embodiment, because of the large height difference of the first conductive layer, the metal layer on the first conductive layer will sink along the height difference, thereby forming a gap, the existence of the gap makes the heat dissipation of the metal structure better, the ductility is better, and it is beneficial to the lightweight design of the semiconductor structure, and the performance of the metal structure is optimized, thereby improving the overall performance of the semiconductor structure.

[0037] Specifically, the material of the substrate 10 can be a semiconductor material such as silicon, silicon germanium, silicon carbide, etc. The material of the first conductive layer 111 can be a metal material such as tungsten, copper, aluminum, gold, silver, etc. The material of the first conductive layer 111 can also be other conductive materials such as semiconductor conductive materials, etc. The metal structure 12 can include metal oxides, metal nitrides, single metal materials, alloys, etc.

[0038] In an optional solution, as Figure 1 shown, the first conductive layer 111 has a first groove 113, the lowest point is located on the bottom surface of the first groove 113, the highest point is located on the surface on both sides of the first groove 113, and the projection of the first gap 13 on the first conductive layer 111 is located in the first groove 113.

[0039] In the embodiment, the first conductive layer has a first groove. During the metal deposition process, due to the presence of the groove, the metal material will be sealed on both sides of the groove in advance, forming a first gap projected in the first groove, which is beneficial to the heat dissipation, extension and lightweight design of the metal structure.

[0040] In another alternative, such as Figure 1 As shown, the semiconductor structure further includes: a second conductive layer 112 located between the substrate 10 and the first conductive layer 111; the distance D3 between the middle surface of the second conductive layer 112 and the surface of the substrate 10 is less than the distance D4 between the two side surfaces of the second conductive layer 112 and the surface of the substrate 10; the projection of the highest point on the second conductive layer 112 is located on the two side surfaces of the second conductive layer 112; the projection of the lowest point on the second conductive layer 112 is located on the middle surface of the second conductive layer 112; the same surface of the second conductive layer 112 includes the two side surfaces of the second conductive layer 112 and the middle surface of the second conductive layer 112; the two side surfaces of the second conductive layer 112 are located on both sides of the middle surface of the second conductive layer 112.

[0041] In the embodiment described above, the distance between the middle surface of the second conductive layer and the substrate surface is less than the distance between its two side surfaces and the substrate surface. This design is beneficial for forming a first conductive layer with a first groove on the second conductive layer. Furthermore, the structure with a low middle and high ends makes the second conductive layer also have a groove structure, which further facilitates the formation of the first void in the metal structure.

[0042] Specifically, the material of the second conductive layer 112 includes doped polycrystalline silicon.

[0043] In other exemplary embodiments, the second conductive layer is made of at least one of amorphous silicon, polycrystalline silicon, and amorphous silicon; the first conductive layer and the second conductive layer are made of the same material. In these embodiments, the first conductive layer and the second conductive layer use the same material, thereby maintaining consistent conductivity, which is beneficial for uniform current distribution and transmission, further improving the semiconductor current transmission efficiency. Simultaneously, the same material has the same coefficient of thermal expansion, which helps reduce thermal stress caused by temperature changes, improves the thermal stability of the semiconductor structure, and further improves the semiconductor's heat dissipation performance. Furthermore, using the same material can reduce reliability issues caused by material differences, such as corrosion and peeling between different materials, thus improving device yield.

[0044] In another alternative, such as Figure 1As shown, the semiconductor structure further comprises: an oxide layer 15 located on a surface of the second conductive layer 112 close to the first conductive layer 111, and a thickness of the oxide layer 15 in the vertical direction is less than a thickness of the second conductive layer 112 in the vertical direction.

[0045] In the embodiment, the oxide layer with a thin thickness is formed on the second conductive layer, so as to protect the surface of the second conductive layer from further oxidation, and improve the stability and corrosion resistance of the second conductive layer.

[0046] In some other exemplary schemes of the present application, as shown in Figure 1 As shown, the substrate 10 comprises:

[0047] an active region;

[0048] a trench isolation structure 16 located adjacent to the active region, the trench isolation structure 16 comprises a first insulating layer 171, a second insulating layer 172 and a third insulating layer 173 stacked in sequence, wherein a top surface of the second insulating layer 172 is higher than a top surface of the third insulating layer 173, the second conductive layer 112 covers the top surface of the third insulating layer 173, and partially covers the top surface of the second insulating layer 172, and the top surface is a surface away from the substrate 10.

[0049] In the embodiment, the active region is a key structure for the semiconductor structure to realize device functions; the trench isolation structure plays an electrical isolation role, and the top surface of the second insulating layer in the shallow trench structure is higher than the top surface of the third insulating layer, so that the top surface of the shallow trench isolation structure has a groove with two high sides and a low middle, which facilitates the subsequent formation of the first conductive layer and the second conductive layer with a shape of a middle part sinking relative to two sides on the shallow trench isolation structure.

[0050] Specifically, the first insulating layer 171 and the second insulating layer 172 conformingly cover the inner wall of the isolation trench in sequence, and the third insulating layer 173 is located at the innermost layer of the multilayer insulating layer to fill the isolation trench. That is, the second insulating layer 172 is located between the first insulating layer 171 and the third insulating layer 173, and the third insulating layer 173 constitutes the innermost layer of the trench isolation structure 16.

[0051] Specifically, the first insulating layer 171 and the third insulating layer 173 can comprise the same material, and the second insulating layer 172 can have a material different from that of the third insulating layer 173, so that when the trench isolation structure 16 is formed by using a back etching process, the top surfaces of the first insulating layer 171 and the third insulating layer 173 can be made to sink relative to the top surface of the substrate 10, as shown in Figure 2As shown, the first insulating layer 171 and the third insulating layer 173 can be lower than the top surface of the second insulating layer 172 by a back-etching process, and the second insulating layer 172 can have a material different from that of the third insulating layer 173.

[0052] Specifically, the first insulating layer 171 and the third insulating layer 173 each include, for example, silicon oxide (SiO), and the material of the second insulating layer 172 includes, for example, silicon nitride (SiN), so that the trench isolation structure 16 has an ONO structure to improve the isolation performance of the trench isolation structure 16.

[0053] Specifically, the multi-layer insulating layer can be etched by an etching process.

[0054] Some other optional solutions of the present application are as follows: Figure 1 As shown, the semiconductor structure further includes a side wall structure 18 including a first portion 181 and a second portion 182, the first portion 181 being located on the side of the first conductive layer 111, the metal structure 12, and the second conductive layer 112, and the second portion 182 being sandwiched between the second insulating layer 172 and the active region and located on the surface of the first insulating layer 171 away from the substrate 10. In the embodiment, the side wall structure can play a protective role.

[0055] Specifically, the side wall structure 18 can be a single-layer structure or a multi-layer structure, for example, including two layers of insulating layers or three layers of insulating layers. The materials of the two layers of insulating layers in the side wall structure 18 are, for example, silicon oxide and silicon nitride, respectively; and the materials of the three layers of insulating layers are, for example, silicon oxide, silicon nitride, and silicon oxide, respectively, so as to form an ONO structure.

[0056] Some other optional solutions of the present application are as follows: Figure 1 As shown, in the horizontal direction, the maximum width of the second conductive layer 112 is greater than the maximum width of the third insulating layer 173 and less than the maximum width of the trench isolation structure 16, and the horizontal direction is perpendicular to the vertical direction.

[0057] That is, the projection of the second conductive layer in the substrate is located in the trench isolation structure, and the height relationship between the top surface of the third insulating layer and the top surface of the second insulating layer in the trench isolation structure is such that the second conductive layer formed on the surface of the trench isolation structure has a shape of high on both sides and low in the middle, which facilitates the formation of the first conductive layer with a height difference on the second conductive layer, and the height difference further ensures that the metal layer on the first conductive layer can sink along the height difference, successfully forming a gap.

[0058] According to some other optional solutions of the present application, as shown in the accompanying drawings: Figure 1 As shown, the metal structure 12 includes:

[0059] The first metal layer 121 is located on the surface of the first conductive layer 111 away from the substrate 10;

[0060] The second metal layer 122 is located on the surface of the first metal layer 121 away from the first conductive layer 111. In the vertical direction, the thickness of the second metal layer 122 is greater than the thickness of the first metal layer 121, and the first gap 13 is located in the second metal layer 122.

[0061] Specifically, the first metal layer 121 includes a single metal, as well as metal oxides and metal nitrides; the second metal layer 122 includes a single metal, as well as metal oxides and metal nitrides.

[0062] In the embodiment described, the first gap is located within the second metal layer. This first gap acts as a stress buffer, enhancing the plastic deformation capacity of the second metal layer under stress and further improving its ductility. Simultaneously, the presence of the first gap reduces the density and weight of the second metal layer, further enabling lightweight design of the semiconductor structure. Furthermore, the presence of the first gap further ensures good heat dissipation performance of the second metal layer.

[0063] In another alternative, such as Figure 3 As shown, at least one of the first conductive layer 111 and the second conductive layer 112 has a second gap 19. In this embodiment, the design of at least one of the first and second conductive layers including the second gap allows the second gap to serve as a stress release channel, enabling it to better adapt to external stress and deformation, thus improving the ductility of the conductive layer. It also facilitates the lightweight design of the semiconductor structure, reducing the overall density and weight, further realizing the lightweight design of the semiconductor structure; and it can also improve the heat dissipation effect of at least one of the first and second conductive layers.

[0064] Embodiments of this application also provide a semiconductor structure, such as Figure 4 As shown, it includes:

[0065] Substrate 10 includes an active region and a trench isolation structure 16;

[0066] The active region is located in the substrate 10;

[0067] The trench isolation structure 16 is located in the substrate 10 and adjacent to the active region, and includes multiple layers of insulating layers 17 stacked sequentially, wherein the top surface of the innermost insulating layer 17 is lower than the top surface of the active region.

[0068] A conductive structure 11 is located on the trench isolation structure 16, and the conductive structure 11 has a first groove 113;

[0069] The metal structure 12 is located on the conductive structure 11 and partially in the first groove 113.

[0070] The first gap 13 is located in the metal structure 12, and a projection of the first gap 13 on the conductive structure 11 is located in the first groove 113.

[0071] In the embodiment, the reasonable gap in the metal structure in the semiconductor structure is designed as a stress release channel, so that the semiconductor structure can better adapt to external stress and deformation, the ductility of the semiconductor structure is improved, the overall density and weight are reduced, the lightweight design of the semiconductor structure is facilitated, the gap in the metal structure is also beneficial to heat dissipation, the performance of the metal structure is optimized, and the overall performance of the semiconductor structure is improved.

[0072] Specifically, the trench isolation structure 16 can be prepared by using a planarization process, so that the top surface of the formed trench isolation structure 16 is flush with the top surface of the substrate, or even the trench isolation structure 16 protrudes from the top surface of the substrate 10 (i.e., the top surface of the trench isolation structure 16 is higher than the top surface of the substrate 10).

[0073] In another alternative, as shown in Figure 3 and Figure 4 The conductive structure 11 includes:

[0074] The second conductive layer 112 is located on the trench isolation structure 16, and the second conductive layer 112 has a second groove 114.

[0075] The first conductive layer 111 is located on the second conductive layer 112 and partially in the second groove 114, and the first conductive layer 111 has the first groove 113.

[0076] In the embodiment, since the second conductive layer has the second groove, during the metal deposition process, the metal material will be sealed on both sides of the groove in advance due to the existence of the groove. The first conductive layer is located on the second conductive layer and partially in the second groove, which is beneficial to form a structure with low middle and high both ends on the first conductive layer, and further facilitates the formation of the first gap in the metal structure.

[0077] Specifically, as shown in Figure 3 The second conductive layer 112 fills the second groove 114 surrounded by the second insulating layer 172 to cover the third insulating layer 173 and the sidewall of the second insulating layer 172 close to the third insulating layer 173, and further extends out of the second groove 114, so that the sidewall boundary of the second conductive layer 112 is lapped on the top of the second insulating layer 172, and correspondingly, the second conductive layer 112 has a sidewall extending out of the second groove 114.

[0078] Specifically, the second groove 114 on the second conductive layer 112 and the first groove 113 on the first conductive layer 111 are in position correspondence, more specifically, the bottom of the second groove 114 on the second conductive layer 112 and the bottom of the first groove 113 on the first conductive layer 111 are aligned on the same vertical line.

[0079] In some other exemplary embodiments, as shown in Figure 4 The semiconductor structure further comprises an oxidation layer 15 between the first conductive layer 111 and the second conductive layer 112.

[0080] In the embodiments, the oxidation layer in the semiconductor structure can protect the surface of the second conductive layer from further oxidation, and can improve the stability and corrosion resistance of the second conductive layer, thereby improving the stability and corrosion resistance of the semiconductor structure.

[0081] Specifically, as shown in Figure 4 The trench isolation structure 16 comprises an insulating layer 17, and the material of the insulating layer 17, for example, comprises silicon oxide, silicon nitride, etc.

[0082] Embodiments of the present application also provide a semiconductor structure, as shown in Figure 5 comprises:

[0083] a substrate 10 having an isolation trench;

[0084] a trench isolation structure 16 in the isolation trench, and at least part of the top surface of the trench isolation structure 16 is more sunken relative to the top surface of the substrate 10;

[0085] a conductive structure 11 on the trench isolation structure 16, the conductive structure 11 having a first groove 113;

[0086] a first metal layer 121 on the conductive structure 11, the first metal layer 121 corresponding to the top surface of the first groove 113 forms a first recess, and the lowest point of the first recess is lower than the highest point of the two side surfaces of the first groove 113 in the vertical direction;

[0087] a second metal layer 122 on the first metal layer 121 and partially in the first recess;

[0088] a first void 13 in the second metal layer 122, and the projection of the first void 13 on the conductive structure 11 is in the first groove 113.

[0089] In the embodiment, the metal layer in the semiconductor structure is designed with reasonable voids as stress release channels, so that the semiconductor structure can better adapt to external stress and deformation, the ductility of the semiconductor structure is improved, the overall density and weight are reduced, the lightweight design of the semiconductor structure is realized, the voids in the metal structure are also beneficial to heat dissipation, the performance of the metal structure is optimized, and the overall performance of the semiconductor structure is improved.

[0090] Specifically, the first metal layer 121 can include a single metal material, or a metal oxide, a metal nitride, etc.; and the second metal layer 122 can include a single metal material, or a metal oxide, a metal nitride, etc.

[0091] Specifically, the opening size of the isolation trench can gradually decrease from the top of the trench to the bottom of the trench, so that the isolation trench has an inclined sidewall. By forming the isolation trench with an inclined sidewall, the filling performance of the insulating material can be effectively improved when filling the insulating material in the isolation trench subsequently, and the problem of voids in the insulating material layer filled in the isolation trench can be avoided.

[0092] As shown in Figure 5 , the trench isolation structure can include silicon dioxide, silicon nitride, silicon oxynitride, silicon carbon nitride, aluminum oxide, etc.

[0093] As shown in Figure 5 , the conductive structure can include tungsten, copper, aluminum, gold, silver, titanium, and titanium nitride, etc.

[0094] From the above description, it can be seen that the embodiments of the present application achieve the following technical effects:

[0095] In the semiconductor structure of the present application, due to the large height difference of the first conductive layer, the metal layer on the first conductive layer will sink along the height difference, thereby forming a void. The existence of the void makes the metal structure have good heat dissipation and good ductility, and is beneficial to the lightweight design of the semiconductor structure, optimizes the performance of the metal structure, and improves the overall performance of the semiconductor structure.

[0096] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A semiconductor structure, characterized by, The semiconductor structure comprises: a substrate; a first conductive layer located on one side of the substrate, the maximum thickness of the first conductive layer in a vertical direction being a predetermined thickness, the distance between the highest point of the surface of the first conductive layer away from the substrate and the lowest point of the surface of the first conductive layer away from the substrate being a predetermined distance, the predetermined distance being greater than the predetermined thickness, the highest point being the point farthest from the substrate in the vertical direction, and the lowest point being the point closest to the substrate in the vertical direction; a metal structure located on the surface of the first conductive layer away from the substrate, the metal structure having a first void therein.

2. The semiconductor structure of claim 1, wherein, The first conductive layer has a first groove, the lowest point being located on the bottom surface of the first groove, and the highest point being located on the surface on both sides of the first groove, and the projection of the first void on the first conductive layer being located in the first groove.

3. The semiconductor structure of claim 1, wherein, The semiconductor structure further comprises: a second conductive layer located between the substrate and the first conductive layer, the distance between the middle surface of the second conductive layer and the surface of the substrate being less than the distance between the two side surfaces of the second conductive layer and the surface of the substrate, the projection of the highest point on the second conductive layer being located on the two side surfaces of the second conductive layer, and the projection of the lowest point on the second conductive layer being located on the middle surface of the second conductive layer, the same surface of the second conductive layer including the two side surfaces of the second conductive layer and the middle surface of the second conductive layer, and the two side surfaces of the second conductive layer being located on both sides of the middle surface of the second conductive layer.

4. The semiconductor structure of claim 3, wherein, The material of the second conductive layer is selected from one of an amorphous silicon layer, a polycrystalline silicon, and amorphous silicon, and the material of the first conductive layer and the material of the second conductive layer are the same.

5. The semiconductor structure of claim 3, wherein, The semiconductor structure further comprises: an oxide layer located on the surface of the second conductive layer close to the first conductive layer, the thickness of the oxide layer in the vertical direction being less than the thickness of the second conductive layer in the vertical direction.

6. The semiconductor structure of claim 3, wherein, The substrate comprises: an active region; a trench isolation structure located adjacent to the active region, the trench isolation structure comprising a first insulating layer, a second insulating layer, and a third insulating layer stacked in sequence, wherein the top surface of the second insulating layer is higher than the top surface of the third insulating layer, the second conductive layer covers the top surface of the third insulating layer, and partially covers the top surface of the second insulating layer, and the top surface is a surface away from the substrate.

7. The semiconductor structure of claim 6, wherein, The semiconductor structure further comprises: a side wall structure comprising a first part and a second part, the first part being located on the side of the first conductive layer, the metal structure, and the second conductive layer, and the second part being located between the second insulating layer and the active region and on the surface of the first insulating layer away from the substrate.

8. The semiconductor structure of claim 6, wherein, In a horizontal direction, the maximum width of the second conductive layer is greater than the maximum width of the third insulating layer and less than the maximum width of the trench isolation structure, and the horizontal direction is perpendicular to the vertical direction.

9. The semiconductor structure of any one of claims 1 to 8, wherein, The metal structure comprises: a first metal layer located on the surface of the first conductive layer away from the substrate; A second metal layer is on a surface of the first metal layer away from the first conductive layer, and a thickness of the second metal layer is greater than a thickness of the first metal layer in the vertical direction, and the first void is in the second metal layer.

10. The semiconductor structure of any one of claims 3 to 8, wherein, At least one of the first conductive layer and the second conductive layer has a second void.

11. A semiconductor structure, characterized by Comprise: A substrate comprising an active region and a trench isolation structure; An active region in the substrate; A trench isolation structure in the substrate and disposed adjacent to the active region, comprising a plurality of insulating layers stacked in sequence, and a top surface of an innermost insulating layer of the plurality of insulating layers is lower than a top surface of the active region; A conductive structure on the trench isolation structure, the conductive structure having a first recess; A metal structure on the conductive structure and partially in the first recess; A first void in the metal structure, a projection of the first void on the conductive structure being in the first recess.

12. The semiconductor structure of claim 11, wherein, The conductive structure comprises: A second conductive layer on the trench isolation structure, the second conductive layer having a second recess; A first conductive layer on the second conductive layer and partially in the second recess, the first conductive layer having the first recess.

13. The semiconductor structure of claim 12, wherein, The semiconductor structure further comprises an oxide layer between the first conductive layer and the second conductive layer.

14. A semiconductor structure, characterized by Comprise: A substrate having an isolation trench; A trench isolation structure in the isolation trench, and at least a portion of a top surface of the trench isolation structure is more sunken relative to a top surface of the substrate; A conductive structure on the trench isolation structure, the conductive structure having a first recess; A first metal layer on the conductive structure, a top surface of the first metal layer corresponding to the first recess forms a first recess, and a lowest point of the first recess is lower than a highest point of two side surfaces of the first recess in the vertical direction; A second metal layer on the first metal layer and partially in the first recess; A first void in the second metal layer, a projection of the first void on the conductive structure being in the first recess.

Images