Miniaturized three-in-one LTCC delay line
By integrating multi-layer stripline delay lines using LTCC process technology, the problem of chip delay lines being unable to output multiple delay values is solved, realizing miniaturized and multifunctional delay lines, reducing losses and production costs, and improving reliability.
Patent Information
- Application Number
- CN202423311912.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2034-12-31
AI Technical Summary
In existing technologies, chip delay lines cannot achieve multiple different delay values output by a single device, and traditional structures suffer from problems such as large size, high loss, and poor reliability.
Using LTCC process technology, multiple stripline metal delay line layers are integrated in a stacked manner. Combined with a serpentine stripline stacked three-dimensional structure and pad design, a single device can output three different delay values. Furthermore, bottom electrode packaging reduces losses and improves reliability.
It achieves miniaturization and multi-functionality of delay lines, reduces production costs, improves production efficiency and reliability of delay lines, adapts to various working environments, and is easy to mount.
Smart Images
Figure CN223638591U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to electronic components technical field especially relates to a miniaturized three-in-one LTCC delay line. BACKGROUND
[0002] At present, low temperature co-fired ceramic (LTCC) as a high-density packaging technology with very wide application range has become the preferred way of future electronic component integration and modularization with its excellent electronic, mechanical and thermal characteristics. It is widely used in multi-layer chip circuit modular design. The LTCC technology is used for the design and production of radio frequency microwave components and modules including balun filter, filter, multiplexer, diplexer, antenna, coupler, bridge, balun, antenna, etc. In addition to the advantages of cost and integrated packaging, it also has many advantages in wiring width and spacing, low impedance metallization, design diversity and high frequency performance. With the continuous development of modern electronic equipment towards miniaturization and high frequency, they have been widely used in small-sized electronic equipment.
[0003] The structure of the serpentine delay line generally has microstrip line, coplanar waveguide and strip line. In the coplanar structure, the lines are isolated from each other, thereby reducing the crosstalk between them, which is a big advantage of coplanar waveguide; another advantage is the flexibility of line width selection. Of course, the coplanar line also has disadvantages, because the current is concentrated on the edge, thereby causing high insertion loss. In addition, there is a problem of mode, because the bending of the line, the bending or the asymmetry of the center line may produce odd mode effect. The microstrip line structure is a semi-open structure, which causes part of the transmission energy to be lost in the form of radiation, and its loss is greater than that of the strip line. In addition, the signal transmission speed of the microstrip line is faster than that of the strip line in the same material, which leads to the need for a larger space for the microstrip line than the strip line to achieve the same delay amount. The strip line is the only planar transmission line without mode dispersion, and its advantages are as follows: first, because the strip line has two sides with dielectric characteristics determined by the medium, the electromagnetic field is well controlled; second, the effective dielectric constant is larger than that of other structures, and the delay amount per unit length is larger, which is suitable for miniaturization demand.
[0004] The traditional chip delay line is mostly a single device outputting a single delay amount, and cannot realize a single product outputting multiple different delay amounts. Utility model content
[0005] The utility model provides a miniaturized three-in-one LTCC delay line, utilizes LTCC process technology to integrate multiple metal delay line layers designed by using a strip line in an integrated way through a laminated mode, effectively reduces the volume and weight of the delay line, realizes different mounting direction outputs of different delay amounts of the device by setting a serpentine strip laminated three-dimensional internal structure and a pad design, realizes single device output of three different delay amounts, sets a metal delay line layer between two adjacent metal ground electrodes, reduces the loss of the delay line layer, improves the reliability of the delay line, makes the delay line adaptable to various different working environments, simultaneously has the advantages of miniaturization, high reliability, long delay, and adopts a bottom electrode packaging mode, is convenient to mount, improves the compatibility of the component technology by the preparation mode of the LTCC technology.
[0006] In order to achieve the above object, the utility model provides a miniaturized three-in-one LTCC delay line, which comprises a metal wire delay unit laminated body, a metal ground electrode laminated body, a port external electrode and a grounding external electrode.
[0007] The metal wire delay unit laminated body is composed of a metal delay line unit printed on a ceramic base layer, and the metal ground electrode laminated body is composed of a metal ground electrode printed on the ceramic base layer.
[0008] The metal delay line units of the metal wire delay unit laminated body are respectively connected to the port external electrode, and the metal ground electrodes of the metal ground electrode laminated body are respectively connected to the grounding external electrode.
[0009] In the above technical solution, preferably, the port external electrode and the grounding external electrode are printed on the ceramic base layer and arranged at the bottom of the metal wire delay unit laminated body and the metal ground electrode laminated body.
[0010] In the above technical solution, preferably, the ceramic base layer at the bottom is provided with rectangular or square port external electrodes at four corners, any two adjacent port external electrodes are input and output ports, and the other two are suspended ports, and a cross-shaped metal ground electrode is independently arranged in the middle.
[0011] In the above technical solution, preferably, a preset number of groups of metal delay line units are connected to the port external electrode through metalized through holes, and a preset number of groups of metal ground electrodes are connected to the grounding external electrode through metalized through holes.
[0012] In the technical scheme, preferably, the metal line delay unit stack is composed of the meandering metal line strips arranged on the ceramic substrate layer and the mutually insulated metal plane conductors connected with the side electrodes, and the metal ground electrode stack is composed of the metal plane conductors printed on the ceramic substrate layer with a preset number of holes.
[0013] In the technical scheme, preferably, the relative dielectric constant of the ceramic substrate layer ranges from 5 to 5000.
[0014] In the technical scheme, preferably, the metal delay line unit and the metal ground electrode adopt a gold, silver or copper sheet structure.
[0015] In the technical scheme, preferably, the miniaturized three-in-one LTCC delay line further comprises a MARK identification layer printed on the upper surface of the top ceramic substrate layer, and the MARK identification layer can identify the mounting direction of the delay line.
[0016] In the technical scheme, preferably, according to the required output delay, the metal delay line units of the preset layers are respectively connected with the port outer electrodes.
[0017] In the technical scheme, preferably, according to the required output delay, the LTCC delay line is mounted according to the preset direction of the relative pad according to the direction indicated by the MARK identification layer.
[0018] Compared with the prior art, the utility model has the advantages that:
[0019] (1) The present application utilizes the LTCC process technology to integrate multiple metal delay line layers in a stack, effectively reducing the volume and weight of the delay line; and the length and number of layers of the folded metal conductor in the metal line delay unit can be made according to actual needs to realize adjustable delay time within a certain range.
[0020] (2) The present application realizes different delay amounts output by the device in different mounting directions through the internal structure and pad design, realizing three different delay amounts output by a single device.
[0021] (3) The present application designs multiple metal delay line layers and metal ground layers as the same pattern, reducing the production cost, improving the production efficiency and yield.
[0022] (4) The present application adopts a strip line design, and a metal delay line layer is arranged between two adjacent metal ground electrodes, reducing the loss of the delay line layer, improving the reliability of the delay line, and making the delay line adaptable to various working environments. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 A decomposition perspective structure schematic view of a miniaturized three-in-one LTCC delay line is disclosed for an embodiment of the utility model;
[0024] Figure 2 A three-dimensional shape schematic view of a miniaturized three-in-one LTCC delay line is disclosed for an embodiment of the utility model;
[0025] Figure 3 A metal ground electrode schematic view of a miniaturized three-in-one LTCC delay line is disclosed for an embodiment of the utility model;
[0026] Figure 4 A metal delay line unit schematic view of a miniaturized three-in-one LTCC delay line is disclosed for an embodiment of the utility model;
[0027] Figure 5 A pad shape schematic view of a miniaturized three-in-one LTCC delay line is disclosed for an embodiment of the utility model;
[0028] Figure 6 An installation mode schematic view of a miniaturized three-in-one LTCC delay line output delay amount 1 (0.5ns) is disclosed for an embodiment of the utility model;
[0029] Figure 7 An installation mode schematic view of a miniaturized three-in-one LTCC delay line output delay amount 2 (1.0ns) is disclosed for an embodiment of the utility model;
[0030] Figure 8 An installation mode schematic view of a miniaturized three-in-one LTCC delay line output delay amount 3 (1.5ns) is disclosed for an embodiment of the utility model;
[0031] Figure 9 A delay amount schematic view of a miniaturized three-in-one LTCC delay line when installed in different directions is disclosed for an embodiment of the utility model;
[0032] Figure 10 An insertion loss schematic view of a miniaturized three-in-one LTCC delay line when installed in different directions is disclosed for an embodiment of the utility model;
[0033] Figure 11 A return loss schematic view of a miniaturized three-in-one LTCC delay line when installed in different directions is disclosed for an embodiment of the utility model. DETAILED DESCRIPTION
[0034] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be described clearly and completely in combination with the drawings in the embodiments of the utility model below. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by the ordinary skilled in the art without making creative labor belong to the protection scope of the utility model.
[0035] The utility model will be described in further detail in combination with the drawings below:
[0036] As Figure 1 And Figure 2 The utility model provides a miniaturized three-in-one LTCC delay line, which comprises a metal wire delay unit laminated body, a metal ground electrode laminated body, a port outer electrode and a ground outer electrode.
[0037] The metal wire delay unit laminated body is composed of a metal delay line unit printed on a ceramic base layer, and the metal ground electrode laminated body is composed of a metal ground electrode printed on a ceramic base layer.
[0038] The metal delay line units of the metal wire delay unit laminated body are respectively connected to the port outer electrode, and the metal ground electrodes of the metal ground electrode laminated body are respectively connected to the ground outer electrode.
[0039] In this embodiment, a plurality of metal delay line layers designed in a strip line are integrated by a laminated manner by using the LTCC process technology, which effectively reduces the volume and weight of the delay line. By setting the internal structure of the three-dimensional serpentine strip layer and the pad design, different delay amounts are output in different mounting directions of the device, a single device outputs three different delay amounts, a metal delay line layer is arranged between the adjacent two metal ground electrodes, the loss of the delay line layer is reduced, the reliability of the delay line is improved, the delay line can adapt to various working environments, and the delay line has the advantages of miniaturization, high reliability and long delay time. In addition, the bottom electrode packaging method is adopted, which is convenient to mount, the LTCC technology is used for preparation, and the compatibility of the component process is improved.
[0040] In the implementation process, the chip device is formed by the LTCC lamination technology, and a plurality of output electrodes are printed on the surface of the ceramic medium base, the device layers are connected by the multi-layer interconnection technology, and finally connected to the bottom input / output / ground electrode, so as to realize the function. Through the internal structure and the pad structure design, a single device can output a plurality of delay amounts through different mounting directions. This design not only greatly saves the space compared with the traditional planar transmission line, but also increases the delay time of the electromagnetic delay line. Moreover, compared with the general chip delay line which can only output a single delay amount, this design can output three different delay amounts without increasing the volume, thereby reducing the production cost, improving the production efficiency, and meeting the direction of device miniaturization and integration.
[0041] Specifically, a plurality of metal delay line units are integrated by the lamination method through the LTCC process technology, and through the port and pad design, a single device can output 0.5 ns, 1.0 ns and 1.5 ns delay amounts, thereby effectively reducing the volume and weight of the delay line, and the delay line has the characteristics of low insertion loss, stable delay amount and wide working bandwidth. Meanwhile, the metal line delay unit is embedded in the medium ceramic base layer, which can improve the reliability of the delay line and make the delay line adaptable to various working environments.
[0042] The metal line delay unit lamination body and the metal ground electrode lamination body are cross-laminated, that is, one layer of metal ground electrode lamination body is interposed between two adjacent layers of metal line delay unit lamination body, or one layer of metal line delay unit lamination body is interposed between two adjacent layers of metal ground electrode lamination body.
[0043] In the implementation process, the number of delay line layers is N, and the layers are sequentially numbered as the 1st, 2nd, …, N-1th and Nth layers from top to bottom. The odd layers are metal ground electrode lamination bodies, and the even layers are metal line delay unit lamination bodies. The electrode length and the number of layers can be adjusted according to the delay amount requirement.
[0044] Specifically, the plurality of metal delay line layers and the metal ground layers are designed as the same pattern, thereby reducing the production cost, improving the production efficiency and yield.
[0045] In the application, the medium ceramic has the characteristics of good insulation performance, large quality factor and high self-resonant frequency, which effectively widens the working frequency band of the delay line. The metal conductor wiring is embedded in the medium ceramic body, thereby effectively protecting the performance of the metal material used by the folded serpentine conductor, improving the reliability of the delay line, and making the delay line adaptable to various working environments.
[0046] In the above embodiment, preferably, the port outer electrode and the ground outer electrode are printed on the ceramic base layer and arranged at the bottom of the metal line delay unit lamination body and the metal ground electrode lamination body.
[0047] In the implementation process, the three-in-one LTCC delay line comprises 11 ceramic substrate layers 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, and 111; the metal wire delay unit stack is printed on the ceramic medium substrate layers 102, 104, 106, and 108 by using conductive metal paste, the metal ground electrode stack is printed on the ceramic substrate layers 101, 103, 105, and 107 by using conductive metal paste, and the outer electrodes P1, P2, P3, P4, and P5 are printed on the ceramic medium substrate layer 111 by using conductive metal paste.
[0048] In the above embodiment, preferably, the four corners of the bottom ceramic substrate layer are respectively provided with rectangular or square port outer electrodes, any two adjacent port outer electrodes are input and output ports, and the other two are suspended ports, and the middle part is independently provided with a cross-shaped metal ground electrode.
[0049] In the above embodiment, preferably, a preset number of groups of metal delay line units are connected to the port outer electrodes through metalized vias, and a preset number of groups of metal ground electrodes are connected to the ground outer electrodes through metalized vias.
[0050] Specifically, the layers of the metal wire delay unit stack are connected through metalized vias similar to H1, and according to the delay requirement, a certain layer can be connected to the ports P1, P2, P3, and P4 through metalized vias similar to H2. The layers of the metal ground electrode stack are connected through a plurality of metalized vias HG, and are connected to the ground outer electrode P5 through a plurality of metalized vias HG. The connection between the layers is realized through metalized vias.
[0051] In the above embodiment, preferably, the metal wire delay unit stack is composed of serpentine metal wires arranged in a zigzag manner on the ceramic substrate layer and mutually insulated metal plane conductors, the metal plane conductors are connected to the side electrodes, and the metal ground electrode stack is composed of metal plane conductors printed on a preset number of holes in the ceramic substrate layer.
[0052] In the above embodiment, preferably, the relative dielectric constant of the ceramic substrate layer ranges from 5 to 5000.
[0053] In the above embodiment, preferably, the metal delay line unit and the metal ground electrode adopt a gold, silver, or copper sheet structure.
[0054] In the above embodiment, preferably, the miniaturized three-in-one LTCC delay line further comprises a MARK identification layer, the MARK identification layer is printed on the upper surface of the top ceramic substrate layer by using ink, and the MARK identification layer can identify the installation direction of the delay line.
[0055] In the above embodiment, preferably, the metal delay line units of the preset layer are respectively connected with the port outer electrodes according to the delay amount of the required output.
[0056] In the implementation process, the 102 layer is connected with P2 through the metallized via, the 106 layer is connected with P1, the 108 layer is connected with P4, and the 110 layer is connected with P3.
[0057] In the above embodiment, preferably, the LTCC delay line is installed according to the preset direction of the relative pad according to the direction indicated by the MARK mark layer according to the delay amount of the required output.
[0058] In the implementation process, the length and the number of layers of the folded metal wire in the metal wire delay unit can be made according to actual needs, so as to realize the adjustable delay time within a certain range and the distribution of the port output delay amount. In addition, different installation directions of the LTCC delay line relative to the pad can also output different delay amounts.
[0059] As shown in the above embodiment, the LTCC delay line is installed in three directions as shown in the above embodiment, and different delay amounts can be output. Figure 5 Figures 6 to 8 As shown in the above embodiment, the LTCC delay line is installed in three directions as shown in the above embodiment, and different delay amounts can be output.
[0060] Specifically, the mark direction is as shown in the above embodiment, and the output delay amount, the insertion loss, and the voltage standing wave ratio are as shown in the 0.5 ns curve in FIG. 11 when installed. Figure 6 Figure 9 10
[0061] The mark direction is as shown in the above embodiment, and the output delay amount, the insertion loss, and the voltage standing wave ratio are as shown in the 1.0 ns curve in FIG. 11 when installed. Figure 7 Figure 9 10
[0062] The mark direction is as shown in the above embodiment, and the output delay amount, the insertion loss, and the voltage standing wave ratio are as shown in the 1.5 ns curve in FIG. 11 when installed. Figure 8 Figure 9 10
[0063] In addition to the above three installation modes that can output 0.5 ns, 1.0 ns, and 1.5 ns delay amounts, the present application is not limited thereto, and other delay line products with other delay amount combinations can be obtained by adjusting the structure and the number of layers of the above embodiment. Figure 3 Figure 4
[0064] In the implementation process, the skilled in the art can adjust the structure and the number of layers of the metal delay line unit stack and the metal ground electrode stack according to the teaching of the above-mentioned embodiments of the present application, adjust the specific layer to which the metal delay line unit stack and the port outer electrode are connected, and also adjust the mounting direction of the LTCC delay line relative to the pad. Through the combination of the above adjustment modes, different delay amounts can be achieved, and the delay amounts achieved by the above combination modes are not enumerated here.
[0065] The preferred embodiments of the present application have been described above by way of example only, and are not intended to limit the present application, and for those skilled in the art, the present application can have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.
Claims
1. A miniaturized three-in-one LTCC delay line, characterized in that, It comprises: a metal line delay unit stack, a metal ground electrode stack, a port outer electrode and a ground outer electrode; the metal line delay unit stack is composed of a ceramic substrate layer on which metal delay line units are printed, and the metal ground electrode stack is composed of a ceramic substrate layer on which metal ground electrodes are printed, and a preset number of the metal line delay unit stacks and the same number of the metal ground electrode stacks are interleaved and stacked; the metal delay line units of the metal line delay unit stack are respectively connected with the port outer electrodes, and the metal ground electrodes of the metal ground electrode stack are respectively connected with the ground outer electrodes.
2. The miniaturized three-in-one LTCC delay line according to claim 1, characterized in that The port outer electrodes and the ground outer electrodes are printed on the ceramic substrate layer and arranged at the bottom of the metal line delay unit stack and the metal ground electrode stack.
3. The miniaturized three-in-one LTCC delay line according to claim 2, characterized in that The ceramic substrate layer at the bottom is respectively provided with rectangular or square port outer electrodes at four corners, any two adjacent ones of which are input and output ports, and the other two are suspended ports, and a cross-shaped metal ground electrode is independently arranged in the middle.
4. The miniaturized three-in-one LTCC delay line according to claim 3, characterized in that A preset number of groups of the metal delay line units are respectively connected with the port outer electrodes through metallized through holes, and a preset number of groups of the metal ground electrodes are respectively connected with the ground outer electrodes through metallized through holes.
5. The miniaturized three-in-one LTCC delay line according to claim 4, characterized in that The metal line delay unit stack is composed of serpentine metal lines arranged in a zigzag manner on the ceramic substrate layer and mutually insulated metal plane conductors, the metal plane conductors are connected with side electrodes, and the metal ground electrode stack is composed of metal plane conductors printed on a preset number of holes in the ceramic substrate layer.
6. The miniaturized three-in-one LTCC delay line according to claim 5, characterized in that The relative dielectric constant of the ceramic substrate layer ranges from 5 to 5000.
7. The miniaturized three-in-one LTCC delay line according to claim 6, characterized in that The metal delay line units and the metal ground electrodes adopt gold, silver or copper sheet structures.
8. The miniaturized three-in-one LTCC delay line according to any one of claims 1 to 7, characterized in that It further comprises a MARK identification layer printed on the upper surface of the top ceramic substrate layer, and the MARK identification layer can identify the installation direction of the delay line.
9. The miniaturized three-in-one LTCC delay line according to claim 8, characterized in that According to the required output delay, the metal delay line units of a preset layer are respectively connected with the port outer electrodes.
10. The miniaturized three-in-one LTCC delay line according to claim 9, characterized in that According to the required output delay, the LTCC delay line is installed in a preset direction relative to the pad according to the direction indicated by the MARK identification layer.