Impact-resistant semiconductor packaging structure

Abstract

The utility model relates to the technical field of semiconductor packaging, in particular to an impact-resistant semiconductor packaging structure, which comprises a semiconductor chip body, buffer structures are respectively arranged on the front side and the rear side of the semiconductor chip body, and a silica gel protective pad is arranged on one side, far away from the semiconductor chip body, of each buffer structure. A silica gel protection pad is arranged in the semiconductor chip body, a plurality of buffer cavities are uniformly formed in the silica gel protection pad, two fixed joints are arranged at the bottom of the semiconductor chip body in a bilateral symmetry manner, the bottom of each fixed joint is fixedly connected with a pin, and a plurality of breaking grooves are uniformly formed in the pins. The connection strength between the pins and the semiconductor chip body is enhanced, the phenomenon that the pins are broken at the same root is avoided, the pins are uniformly provided with a plurality of breaking grooves, the pins can be broken without a professional tool, and the impact resistance and the vibration resistance of the semiconductor chip body are improved by utilizing the buffering and vibration reduction of the buffering structure and the rubber damping layer.

Description

Technical Field

[0001] This utility model belongs to the field of semiconductor packaging technology, specifically relating to an impact-resistant semiconductor packaging structure. Background Technology

[0002] Semiconductors are materials that lie between conductors and insulators, possessing unique electrical properties. Semiconductor packaging is the process of protecting manufactured integrated circuit chips and providing an interface for connection with external circuits. The main purpose of packaging is to protect fragile silicon chips from physical damage, chemical corrosion, and environmental factors, while ensuring good electrical performance and thermal management.

[0003] The current method generally involves covering the exposed chip and leads with epoxy resin or other materials to form a protective layer, thus creating the packaged chip body. However, stress concentration can easily occur between the pins and the chip protective layer after packaging. When subjected to collisions and impacts, the pins are prone to break at the root, shortening the service life. In addition, after the chip is soldered, the excess length of the pins needs to be cut off, which requires special tools and is difficult to do without them. Furthermore, the protective layer formed by epoxy resin alone can only provide waterproof and dustproof effects, and its impact resistance is poor, making it easy to be damaged by impacts. Utility Model Content

[0004] The purpose of this invention is to provide a simple and reasonably designed impact-resistant semiconductor packaging structure to solve the above problems.

[0005] This utility model achieves the above objectives through the following technical solutions:

[0006] An impact-resistant semiconductor packaging structure includes a semiconductor chip body, with buffer structures disposed on the front and rear sides of the semiconductor chip body, and a silicone protective pad disposed on the side of the buffer structure away from the semiconductor chip body, wherein a plurality of buffer cavities are uniformly formed inside the silicone protective pad.

[0007] The semiconductor chip body has two fixed connectors symmetrically arranged on the bottom left and right, and each fixed connector has a pin fixedly connected to its bottom, with several break grooves evenly opened on the pin.

[0008] Preferably, the breakage groove is triangular, and the breakage grooves are equally spaced on the front and rear outer walls of the pin, and the breakage grooves on the front and rear outer walls of the pin are staggered.

[0009] Preferably, the buffer structure includes a rubber damping layer fixedly connected to the semiconductor chip body, and the rubber damping layer has a plurality of mounting grooves evenly formed inside, with two sliding grooves symmetrically formed above and below each mounting groove, and two sliders symmetrically connected inside each sliding groove.

[0010] Preferably, a connecting rod is fixedly connected between two corresponding sliders located in the same column, and a spring is fixedly connected between the two connecting rods.

[0011] Preferably, each of the two connecting rods is fixedly connected to a baffle, and the sides of the two baffles that are close to each other are respectively attached to the bottom of the two sides of the spring piece.

[0012] Preferably, the spring sheet has a semi-arc structure, and the top of the arc surface of the spring sheet is flush with the top of the mounting groove.

[0013] The beneficial effects of this utility model are as follows: By setting a fixed connector between the pin and the semiconductor chip body, the connection strength between the pin and the semiconductor chip body is enhanced, avoiding the phenomenon of pin breaking at the root. Furthermore, several breakage grooves are evenly opened on the pin, so the pin can be broken without professional tools. The buffer structure and rubber shock-absorbing layer are used to buffer and reduce vibration, thereby improving the impact resistance and vibration resistance of the semiconductor chip body and reducing the probability of damage to the semiconductor chip body. Attached Figure Description

[0014] Figure 1 This is a three-dimensional view of the overall structure of this utility model;

[0015] Figure 2 This is a partial sectional perspective view of the overall structure of this utility model;

[0016] Figure 3 This is the utility model Figure 2 Enlarged schematic diagram of region A in the middle.

[0017] In the diagram: 1. Semiconductor chip body; 2. Buffer structure; 21. Rubber damping layer; 22. Mounting groove; 23. Spring; 24. Baffle; 25. Slider; 26. Connecting rod; 27. Slide groove; 3. Silicone protective pad; 4. Fixed joint; 5. Pin; 6. Break-off groove; 7. Buffer cavity. Detailed Implementation

[0018] The present application will now be described in further detail with reference to the accompanying drawings. It should be noted that the following specific embodiments are only used to further illustrate the present application and should not be construed as limiting the scope of protection of the present application. Those skilled in the art can make some non-essential improvements and adjustments to the present application based on the above application content.

[0019] Example

[0020] Please see Figure 1 and Figure 2An impact-resistant semiconductor packaging structure includes a semiconductor chip body 1, buffer structures 2 are respectively provided on the front and rear sides of the semiconductor chip body 1, and a silicone protective pad 3 is provided on the side of the buffer structure 2 away from the semiconductor chip body 1. A plurality of buffer cavities 7 are evenly opened inside the silicone protective pad 3. Two fixed connectors 4 are symmetrically arranged on the bottom of the semiconductor chip body 1, and a pin 5 is fixedly connected to the bottom of each fixed connector 4. A plurality of break grooves 6 are evenly opened on the pin 5. The break grooves 6 are triangular and are evenly spaced on the front and rear outer walls of the pin 5, and the break grooves 6 on the front and rear outer walls of the pin 5 are staggered.

[0021] The buffer structure 2 is used for vibration damping and buffering. The fixed connector 4 enhances the connection strength between the pin 5 and the semiconductor chip body 1, avoiding the situation where the pin 5 breaks off at the root when subjected to impact. The breakage groove 6 is used to break the pin 5, which can be achieved without the use of special tools.

[0022] Please see Figure 2 and Figure 3 The buffer structure 2 includes a rubber damping layer 21 fixedly connected to the semiconductor chip body 1. The rubber damping layer 21 has several mounting grooves 22 evenly opened inside. The mounting grooves 22 have two sliding grooves 27 symmetrically opened vertically. Each sliding groove 27 has two sliders 25 symmetrically connected horizontally inside. The two corresponding sliders 25 in the same column are fixedly connected to a connecting rod 26. The two connecting rods 26 are fixedly connected to a spring piece 23. The two connecting rods 26 are fixedly connected to a baffle 24. The side of the two baffles 24 that is close to each other is respectively attached to the bottom of the two sides of the spring piece 23. The spring piece 23 has a semi-arc structure, and the top of the arc surface of the spring piece 23 is flush with the top of the mounting groove 22.

[0023] When the device is impacted, the impact is transmitted to the silicone protective pad 3, which provides primary buffering and absorbs the impact by collapsing the buffer cavity 7. The impact is then transmitted to the buffer structure 2, where the rubber damping layer 21 provides secondary buffering. Simultaneously, as the rubber damping layer 21 is compressed, the impact is transmitted to the spring sheet 23. After the spring sheet 23 is compressed, it drives the connecting rod 26 and the slider 25 on it to slide along the slide groove 27, converting the impact into the kinetic energy of the spring sheet 23, connecting rod 26 and slider 25, further buffering the impact and effectively reducing the impact on the semiconductor chip body 1, thus extending its service life.

[0024] It should be noted that, in the use of this impact-resistant semiconductor packaging structure, the buffer structure 2 is first installed on the front and rear sides of the semiconductor chip body 1, and then the silicone protective pad 3 is installed on the buffer structure 2. The buffer structure 2 and the silicone protective pad 3 are used to buffer and protect the semiconductor chip body 1, improve its impact resistance, extend its service life, and enhance the connection strength between the pin 5 and the semiconductor chip body 1 through the fixed connector 4, avoiding the occurrence of pin 5 breaking at the root due to stress concentration. At the same time, the opening of the break groove 6 makes it easy to break the pin 5 without special tools, and the break groove 6 is symmetrically and staggered, saving materials without affecting the overall structural strength of the pin 5.

[0025] The embodiments described above are merely examples of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these modifications and improvements all fall within the protection scope of this utility model.

Claims

1. An impact-resistant semiconductor packaging structure, comprising a semiconductor chip body (1), characterized in that: The semiconductor chip body (1) is provided with buffer structures (2) on the front and back sides respectively, and a silicone protective pad (3) is provided on the side of the buffer structure (2) away from the semiconductor chip body (1). A plurality of buffer cavities (7) are evenly opened inside the silicone protective pad (3). The semiconductor chip body (1) has two fixed connectors (4) symmetrically arranged on the bottom left and right, and each fixed connector (4) has a pin (5) fixedly connected to its bottom, and a number of break grooves (6) are evenly opened on the pin (5).

2. The impact-resistant semiconductor packaging structure according to claim 1, characterized in that: The breakage groove (6) is triangular and is equally spaced on the front and rear outer walls of the pin (5), and the breakage grooves (6) on the front and rear outer walls of the pin (5) are staggered.

3. The impact-resistant semiconductor packaging structure according to claim 1, characterized in that: The buffer structure (2) includes a rubber damping layer (21) fixedly connected to the semiconductor chip body (1), and a number of mounting grooves (22) are evenly provided inside the rubber damping layer (21). The mounting grooves (22) are symmetrically provided with two sliding grooves (27) on the top and bottom, and two sliders (25) are symmetrically connected inside each sliding groove (27).

4. The impact-resistant semiconductor packaging structure according to claim 3, characterized in that: A connecting rod (26) is fixedly connected between two corresponding sliders (25) located in the same column, and a spring piece (23) is fixedly connected between the two connecting rods (26).

5. The impact-resistant semiconductor packaging structure according to claim 4, characterized in that: Each of the two connecting rods (26) is fixedly connected with a baffle (24), and the sides of the two baffles (24) that are close to each other are respectively attached to the bottom of the two sides of the spring piece (23).

6. The impact-resistant semiconductor packaging structure according to claim 5, characterized in that: The spring piece (23) has a semi-arc structure, and the top of the arc surface of the spring piece (23) is flush with the top of the mounting groove (22).

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