Digital conversion circuit of capacitive sensor

Abstract

The utility model provides a digital conversion circuit of a capacitive sensor, comprising a first oscillation unit which comprises a first oscillation resistor, a first analog switch and a Schmitt trigger; the first oscillation capacitor, the first oscillation resistor and the first analog switch are connected in series; the first analog switch is used for controlling the first oscillation resistor and the first oscillation capacitor to be in a charging state or a discharging state; a connection node between the first oscillation capacitor and the first oscillation resistor is connected with the Schmitt trigger; the Schmitt trigger and the first analog switch are connected in series, and the Schmitt trigger is used for switching the connection state of the first analog switch according to the charging voltage of the first oscillation capacitor. The charging voltage of the first oscillation capacitor serves as an input signal of the Schmitt trigger, and an output signal of the Schmitt trigger controls the connection state of the first analog switch, so that a high-frequency oscillation signal can be generated.

Description

TECHNICAL FIELD

[0001] The utility model relates to sensor technical field, especially a kind of digital conversion circuit of capacitive sensor. BACKGROUND

[0002] Capacitive sensor is based on RC (R represents resistance, C represents capacitance) charge-discharge principle, resistance and capacitance are connected in series after charging-discharging time has certain time characteristic, i. e. periodic characteristic, using the time characteristic constantly charging-discharging can obtain its charging-discharge frequency, and the frequency is determined by the value of resistance and capacitance. Based on this principle, constantly charging-discharging can form oscillation signal. The digital conversion circuit of a commonly used capacitive sensor is realized based on 555 timer, resistance and capacitance are directly connected with 555 timer, and the analog signal formed by RC charging-discharging can form rectangular oscillation signal after being converted by 555 timer.

[0003] However, due to the structural design problem of the digital conversion circuit of capacitive sensor and the working frequency problem (usually only a few MHz, i. e. a few megahertz) of 555 timer, the frequency of oscillation signal formed by capacitive sensor is low. INVENTION CONTENTS

[0004] The utility model provides a kind of digital conversion circuit of capacitive sensor, to solve the technical problem that the frequency of oscillation signal formed by capacitive sensor is low.

[0005] To solve the above technical problem, the utility model provides a kind of digital conversion circuit of capacitive sensor, and the capacitive sensor includes first oscillation capacitor, and the digital conversion circuit includes first oscillation unit, and the first oscillation unit includes first oscillation resistance, first analog switch and Schmidt trigger;

[0006] The first oscillation capacitor, the first oscillation resistance and the first analog switch are connected in series, and the first analog switch is used to control the first oscillation resistance and the first oscillation capacitor in charging state or discharging state;

[0007] The connection node between the first oscillation capacitor and the first oscillation resistance is connected with the Schmidt trigger, and the Schmidt trigger and the first analog switch are connected in series, and the Schmidt trigger is used to switch the communication state of the first analog switch according to the charging voltage of the first oscillation capacitor, so that the first analog switch controls the first oscillation resistance and the first oscillation capacitor in charging state or discharging state.

[0008] Preferably, the first analog switch comprises a first pin, a ground pin, a second pin, a selection pin, a power pin and an enable pin; the first pin and the ground pin of the first analog switch are connected with the ground terminal respectively, the second pin is connected with the voltage source, the selection pin is connected with one end of the first oscillation resistor, and the power pin is connected with the voltage source;

[0009] The Schmitt trigger comprises a first input pin, a ground pin, a power pin and a first output pin; the first input pin of the Schmitt trigger is connected with the connection node between the first oscillation capacitor and the first oscillation resistor, the ground pin is connected with the ground terminal, the power pin is connected with the voltage source, and the first output pin is connected with the enable pin of the first analog switch.

[0010] Preferably, the digital conversion circuit further comprises a first filter capacitor and a third filter resistor; the connection node between the first oscillation capacitor and the first oscillation resistor is connected with the first input pin of the Schmitt trigger through the first filter capacitor; the first filter capacitor, the third filter resistor and the ground terminal are connected in sequence.

[0011] Preferably, the digital conversion circuit further comprises a third filter capacitor; the first pin and the second pin of the first analog switch are connected through the third filter capacitor.

[0012] Preferably, the digital conversion circuit further comprises a first counter unit and a data acquisition unit; the first counter unit comprises a second analog switch, a first counter and a second counter; the data acquisition unit comprises a first I / O expansion chip and a second I / O expansion chip;

[0013] The second analog switch comprises a first pin, a ground pin, a selection pin, a power pin and an enable pin; the first pin of the second analog switch is used for outputting a first clock signal, the ground pin is connected with the ground terminal, the selection pin is connected with the first output pin of the Schmitt trigger, the power pin is connected with the voltage source, and the enable pin is used for inputting a preset switch signal;

[0014] The first counter comprises a first output pin to a twelfth output pin, a first clock input pin, a first clear pin, a ground pin and a power pin; the first clock input pin of the first counter is used for inputting the first clock signal, the first clear pin is used for inputting a preset clear signal, the ground pin is connected with the ground terminal, and the power pin is connected with the voltage source;

[0015] The second counter comprises thirteenth output pin to twenty-fourth output pin, pulse input pin, first clear pin, ground pin and power pin; the pulse input pin of the second counter is connected with the twelfth output pin of the first counter, the first clear pin is used for inputting preset clear signal, the ground pin is connected with ground terminal, and the power pin is connected with voltage source;

[0016] The first I / O expansion chip and the second I / O expansion chip are identical in structure and are connected with the first counter and the second counter respectively.

[0017] Preferably, the digital conversion circuit further comprises a sixth filter capacitor; the power pin and the ground pin of the second analog switch are connected through the sixth filter capacitor.

[0018] Preferably, the digital conversion circuit further comprises an eighth filter capacitor and a seventh filter resistor; the first pin of the second analog switch, the eighth filter capacitor, the seventh filter resistor and the ground terminal are connected in sequence; and a connection node between the eighth filter capacitor and the seventh filter resistor is used for outputting the first clock signal.

[0019] Preferably, the digital conversion circuit further comprises a tenth filter capacitor; the ground pin and the power pin of the first counter are connected through the tenth filter capacitor.

[0020] Preferably, the digital conversion circuit further comprises a twelfth filter capacitor; the ground pin and the power pin of the second counter are connected through the twelfth filter capacitor.

[0021] Preferably, the capacitive sensor further comprises a second oscillation capacitor, and the digital conversion circuit further comprises a second oscillation unit, the second oscillation unit comprising a second oscillation resistor, a third analog switch and the Schmitt trigger.

[0022] The second oscillation capacitor, the second oscillation resistor and the third analog switch are connected in series, and the third analog switch is used for controlling the second oscillation resistor and the second oscillation capacitor to be in a charging state or a discharging state.

[0023] A connection node between the second oscillation capacitor and the second oscillation resistor is connected with the Schmitt trigger; the Schmitt trigger and the third analog switch are connected in series, and the Schmitt trigger is used for switching the communication state of the third analog switch according to the charging voltage of the second oscillation capacitor, so that the third analog switch controls the second oscillation resistor and the second oscillation capacitor to be in a charging state or a discharging state.

[0024] The utility model provides a kind of digital conversion circuit of capacitive sensor, including first oscillation resistance, first analog switch and schmitt trigger, the charging voltage of first oscillation capacitor is as the input signal of schmitt trigger, the output signal of schmitt trigger controls the intercommunication state of first analog switch, to make first analog switch control first oscillation resistance and first oscillation capacitor be in charging state or discharge state, and then generate high frequency oscillation signal. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 It is a kind of digital conversion circuit of capacitive sensor and the structure schematic diagram after single-chip microcomputer connection provided by the utility model one embodiment.

[0026] Figure 2 It is the circuit schematic diagram of first oscillation unit, first counter unit, second oscillation unit and second counter unit provided by the utility model one embodiment.

[0027] Figure 3 It is the circuit schematic diagram of first counter unit and second counter unit provided by the utility model one embodiment.

[0028] Figure 4 It is the circuit schematic diagram of data acquisition unit provided by the utility model one embodiment.

[0029] Figure 5 It is the working flow schematic diagram of digital conversion circuit of capacitive sensor provided by the utility model one embodiment.

[0030] [The following is explained as follows]:

[0031] First oscillation unit-Z1, first counter unit-Z11, data acquisition unit-Z12;

[0032] First oscillation capacitor-C_1, first oscillation resistance-R1, first analog switch-U1, schmitt trigger-U3 second analog switch-U4, first counter-U6, second counter-U8, first I / O expansion chip-U10, second I / O expansion chip-U11;

[0033] First pin-A1, ground pin-GND, second pin-A2, selection pin-B, power supply pin-VCC, enable pin-ENB;

[0034] First input pin-1A, first output pin-1Y, second input pin-2A, second output pin-2Y;

[0035] The first filter capacitor C1, the third filter resistor R3, the third filter capacitor C3, the sixth filter capacitor C6, the eighth filter capacitor C8, the seventh filter resistor R7, the tenth filter capacitor C10, the twelfth filter capacitor C12, the fourteenth filter capacitor C14, and the fifteenth filter capacitor C15.

[0036] The second oscillation capacitor C_2, the second oscillation resistor R2, the third analog switch U2, the fourth analog switch U5, the third counter U7, the fourth counter U9, and the third I / O expansion chip U12.

[0037] The second filter capacitor C2, the fourth filter resistor R4, the fourth filter capacitor C4, the seventh filter capacitor C7, the ninth filter capacitor C9, the eighth filter resistor R8, the eleventh filter capacitor C11, the thirteenth filter capacitor C13, and the sixteenth filter capacitor C16. DETAILED DESCRIPTION

[0038] To make the purposes, advantages and features of the present application more clear, the following will make further detailed description of the digital conversion circuit of the capacitive sensor according to the present application with reference to the accompanying drawings. It should be noted that the drawings are all in a very simplified form and all use non-precise proportions, and are only used to conveniently and clearly assist in the purpose of explaining the embodiments of the present application.

[0039] In the description of the present application, the terms "first", "second", and the like qualifiers are added for the convenience of description and reference, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features with "first", "second", and the like qualifiers can explicitly or implicitly include one or more of the features.

[0040] As Figure 1 and Figure 2As shown, the embodiment provides a digital conversion circuit of a capacitive sensor, the capacitive sensor comprising a first oscillation capacitor C_1, the digital conversion circuit comprising a first oscillation unit Z1, the first oscillation unit Z1 comprising a first oscillation resistor R1, a first analog switch U1 and a Schmitt trigger U3; the first oscillation capacitor C_1, the first oscillation resistor R1 and the first analog switch U1 are connected in series, the first analog switch U1 is used to control the first oscillation resistor R1 and the first oscillation capacitor C_1 to be in a charging state or a discharging state; a connection node between the first oscillation capacitor C_1 and the first oscillation resistor R1 is connected with the Schmitt trigger U3; the Schmitt trigger U3 and the first analog switch U1 are connected in series, the Schmitt trigger U3 is used to switch the communication state of the first analog switch U1 according to the charging voltage of the first oscillation capacitor C_1, so that the first analog switch U1 controls the first oscillation resistor R1 and the first oscillation capacitor C_1 to be in a charging state or a discharging state.

[0041] The working principle of the digital conversion circuit of the capacitive sensor provided by the embodiment is as follows: initially, the first oscillation capacitor C_1 is not electrified, at this time, the signal input into the Schmitt trigger U3 is a low voltage signal, the Schmitt trigger U3 converts the low voltage signal into a digital signal of low level and outputs the digital signal to the first analog switch U1, the first analog switch U1 connects the first RC circuit composed of the first oscillation resistor R1 and the first oscillation capacitor C_1 to the positive pole of the power supply, i.e. the voltage source, charges the first oscillation capacitor C_1, and the voltage on the first oscillation capacitor C_1 gradually rises; when the voltage of the first oscillation capacitor C_1 rises to about 0.7 times the voltage of the power supply, the Schmitt trigger U3 is triggered, the output digital signal is a high level signal, the high level signal controls the first analog switch U1 to connect the first RC circuit to the negative pole of the power supply, i.e. the ground terminal, and the first oscillation capacitor C_1 starts to discharge; when the first oscillation capacitor C_1 discharges to about less than 0.3 times the voltage of the power supply, the Schmitt trigger U3 detects the input low voltage signal, so that the output digital signal is of low level, and the first analog switch U1 connects the first RC circuit to the positive pole of the power supply again after receiving the low level signal, charges the first oscillation capacitor C_1, and the first oscillation unit Z1 repeatedly charges and discharges the first oscillation capacitor C_1 at a certain frequency, i.e. an oscillation signal is generated; since the working frequency of the Schmitt trigger U3 can reach tens of megahertz, the oscillation signal generated by the first RC circuit can also reach tens of megahertz. In addition, the frequency of the oscillation signal and the values of the first oscillation resistor R1 and the first oscillation capacitor C_1 can be expressed by a relationship, and the frequency of the oscillation signal can be measured, when the resistance value of the first oscillation resistor R1 is a known quantity, according to the frequency of the oscillation signal, the resistance value of the first oscillation resistor R1 and the preset relationship, the value of the first oscillation capacitor C_1 can be solved.

[0042] The embodiment provides a digital conversion circuit of a capacitive sensor, which comprises a first oscillation resistor R1, a first analog switch U1 and a Schmitt trigger U3, a charging voltage of a first oscillation capacitor C_1 serving as an input signal of the Schmitt trigger U3, and an output signal of the Schmitt trigger U3 controlling a connection state of the first analog switch U1, so that the first analog switch U1 controls the first oscillation resistor R1 and the first oscillation capacitor C_1 to be in a charging state or a discharging state, thereby generating a high-frequency oscillation signal.

[0043] Preferably, as shown in the figure, the first analog switch U1 comprises a first pin A1, a ground pin GND, a second pin A2, a selection pin B, a power supply pin VCC and an enable pin ENB; the first pin A1 and the ground pin GND of the first analog switch U1 are connected with a ground terminal (four horizontal lines in the figure) respectively, the second pin A2 is connected with a voltage source (VCC outside the first analog switch U1 in the figure, and the voltage source can also be represented as VDD), the selection pin B is connected with one end of the first oscillation resistor R1, and the power supply pin VCC is connected with a voltage source; the Schmitt trigger U3 comprises a first input pin 1A, a ground pin GND, a power supply pin VCC and a first output pin 1Y; the first input pin 1A of the Schmitt trigger U3 is connected with a connection node between the first oscillation capacitor C_1 and the first oscillation resistor R1, the ground pin GND is connected with a ground terminal, the power supply pin VCC is connected with a voltage source, and the first output pin 1Y is connected with the enable pin ENB of the first analog switch U1. Figure 2 Figure 2 Preferably, as shown in the figure, the first analog switch U1 comprises a first pin A1, a ground pin GND, a second pin A2, a selection pin B, a power supply pin VCC and an enable pin ENB; the first pin A1 and the ground pin GND of the first analog switch U1 are connected with a ground terminal (four horizontal lines in the figure) respectively, the second pin A2 is connected with a voltage source (VCC outside the first analog switch U1 in the figure, and the voltage source can also be represented as VDD), the selection pin B is connected with one end of the first oscillation resistor R1, and the power supply pin VCC is connected with a voltage source; the Schmitt trigger U3 comprises a first input pin 1A, a ground pin GND, a power supply pin VCC and a first output pin 1Y; the first input pin 1A of the Schmitt trigger U3 is connected with a connection node between the first oscillation capacitor C_1 and the first oscillation resistor R1, the ground pin GND is connected with a ground terminal, the power supply pin VCC is connected with a voltage source, and the first output pin 1Y is connected with the enable pin ENB of the first analog switch U1. Figure 2 In the scheme provided by the embodiment, the model of the first analog switch U1 can be BL1551B, and the first analog switch U1 can be understood as a single-pole double-throw electronic switch, and through the control of the No. 6 (the numbers 1-6 outside the pins of the first analog switch U1 represent the numbers of the pins, and the numbers outside the pins of other devices also represent the numbers of the pins) enable pin ENB, the No. 4 selection pin B can be selectively connected to the No. 1 first pin A1 or the No. 3 second pin A2.

[0044]

[0045] ​​The model of the Schmitt trigger U3 can be SN74LVC2G17. The Schmitt trigger U3 is a voltage detection chip, and has two channels which can be used independently. The first input pin 1A and the first output pin 1Y form one channel, and the second input pin 2A and the second output pin 2Y form another channel. When the voltage input by the first input pin 1A is higher than 0.7 times of the power supply voltage, the first output pin 1Y outputs the power supply voltage; when the voltage input by the first input pin 1A is lower than 0.3 times of the power supply voltage, the first output pin 1Y changes to output a low voltage of 0V, and the other channel has the same principle. Through the cooperation of the first analog switch U1 and the Schmitt trigger U3, the first RC circuit can generate a high-frequency oscillation signal. In other embodiments, a switch with a two-way switching function can be used to replace the first analog switch U1.

[0046] Preferably, as shown in Figure 2 The digital conversion circuit further comprises a first filter capacitor C1 and a third filter resistor R3. A connection node between the first oscillation capacitor C_1 and the first oscillation resistor R1 is connected with the first input pin 1A of the Schmitt trigger U3 through the first filter capacitor C1. The first filter capacitor C1, the third filter resistor R3 and the ground are sequentially connected. The first filter capacitor C1 and the third filter resistor R3 can constitute a high-pass filter, thereby filtering out low-frequency interference signals. The value of the first filter capacitor C1 can be 47pF, and the value of the third filter resistor R3 can be 1kΩ. When there is no first filter capacitor C1, the position of the first filter capacitor C1 can be replaced by a wire; when there is no third filter resistor R3, the position of the third filter resistor R3 is in an open state; and the principle of the high-pass filter at other positions is the same as that of the high-pass filter at this position.

[0047] Preferably, as shown in Figure 2 The digital conversion circuit further comprises a third filter capacitor C3. The first pin A1 and the second pin A2 of the first analog switch U1 are connected through the third filter capacitor C3. The third filter capacitor C3 can filter out interference signals in the power supply. The value of the third filter capacitor C3 can be 100nF. When there is no third filter capacitor C3, the position of the third filter capacitor C3 is in an open state.

[0048] Preferably, as shown in Figures 1 to 4As shown, the digital conversion circuit further comprises a first counter unit Z11 and a data acquisition unit Z12; the first counter unit Z11 comprises a second analog switch U4, a first counter U6 and a second counter U8; the data acquisition unit Z12 comprises a first I / O expansion chip U10 and a second I / O expansion chip U11; the second analog switch U4 comprises a first pin A1, a ground pin GND, a selection pin B, a power supply pin VCC and an enable pin ENB; the first pin A1 of the second analog switch U4 is used for outputting a first clock signal C1 CLK, the ground pin GND is connected with a ground terminal, the selection pin B is connected with a first output pin 1Y of the Schmitt trigger U3, the power supply pin VCC is connected with a voltage source, and the enable pin ENB is used for inputting a preset switch signal C SWITCH; the first counter U6 comprises a first output pin Q1 to a twelfth output pin Q12, a first clock input pin CK#, a first clear pin CLR, a ground pin GND and a power supply pin VCC; the first clock input pin CK# of the first counter U6 is used for inputting the first clock signal C1 CLK, the first clear pin CLR is used for inputting a preset clear signal RD C, the ground pin GND is connected with a ground terminal, and the power supply pin VCC is connected with a voltage source; the second counter U8 comprises a thirteenth output pin Q0 to a twenty-fourth output pin Q11, a pulse input pin CP#, a first clear pin MR, a ground pin GND and a power supply pin VCC; the pulse input pin CP# of the second counter U8 is connected with the twelfth output pin Q12 of the first counter U6 (C1 12 on the twelfth output pin Q12 represents a signal on the pin, and if the signals on two pins are the same, it represents that the two pins are connected with each other), the first clear pin MR is used for inputting a preset clear signal RD C, the ground pin GND is connected with a ground terminal, and the power supply pin VCC is connected with a voltage source; the first I / O expansion chip U10 and the second I / O expansion chip U11 have the same structure and are connected with the first counter U6 and the second counter U8 respectively. Wherein, the digital conversion circuit needs to be connected with a single-chip microcomputer when in use, and the first I / O expansion chip U10 and the second I / O expansion chip U11 are used for receiving data output by the first output pin Q1 (output signal C1 1) to the twenty-fourth output pin Q11 (output signal C1 24) and forwarding the data to the single-chip microcomputer.

[0049] In the scheme provided by the embodiment, the first counter U6 can be a high-frequency counter chip of model 74VHC4040FT(BJ), which can count the number of pulses input to the first clock input pin CK# and output in binary form on the first output pin Q1 (output signal C1_1) to the twelfth output pin Q12 (output signal C1_12). For example, if 10 pulses are counted, 10 in binary form is 0000 00001010, and only the second output pin Q2 and the fourth output pin Q4 are 1 (outputting high-level signals), and the rest of the pins are 0 (low-level signals). 12 The chip can count at most 2

[0050] The second counter U8 can be a lower-frequency counter chip of model CD4040BM(LX), which has the same function as the first counter U6 of model 74VHC4040FT(BJ), but has a lower working frequency and price. The pulse input pin CP# of the second counter U8 is also pin 10.

[0051] After the first counter U6 and the second counter U8 are connected in series, they can record data of at most 2 24 -1 (i.e., the range of values that can be represented by a 24-bit binary number) pulses. The first counter U6 can normally work under a frequency signal of not higher than 50 MHz under a working voltage of 3.3 V, which makes the frequency of the oscillation signal generated by the first RC circuit reach a maximum of 50 MHz. The high pulse frequency and large counting range make the digital conversion circuit have high conversion rate and precision. In other embodiments, the first counter U6 and the second counter U8 can both be high-frequency counter chips.

[0052] The first I / O expansion chip U10 and the second I / O expansion chip U11 can be I / O expansion chips of model TCA9535PWR, which is an expansion chip with 16 I / O ports (P00-P07, P10-P17). The chip communicates with the single-chip microcomputer through IIC (Inter-Integrated Circuit, Inter-Integrated Circuit), and the single-chip microcomputer can read the input data of each I / O port through communication. The IIC communication only needs to occupy two pins (the two pins corresponding to the signals MCU_SDA and MCU_SCL) of the single-chip microcomputer, and the single-chip microcomputer can read the data transmitted by the I / O expansion chip through the two pins. When the number of pulses recorded by the first counter U6 reaches the binary number 1111 1111 1111, the first output pin Q1 to the twelfth output pin Q12 are all 1, which has reached the maximum value of counting. When another pulse is input, it will become 0000 0000 0000, and the twelfth output pin Q12 will change from 1 to 0, indicating that it has advanced by one bit. Therefore, the output of the twelfth output pin Q12 of the first counter U6 is also the pulse input signal of the second counter U8. The twelfth output pin Q12 of the first counter U6 is connected to the pulse input pin CP# of the second counter U8. In this way, when the data of the first counter U6 overflows and returns to zero, it will be incremented to the second counter U8. The second counter U8 counts how many bits the data of the first counter U6 has advanced. Together, they form a 24-bit counter (both chips are 12-bit counters, and when they are connected in series, they become a 24-bit counter). Finally, the 24 output signals C1_1-C1_24 of the first counter U6 and the second counter U8 are sequentially and one-to-one input to the first expansion chip U10 and the second I / O expansion chip U11. The pins A0, A1, and A2 of the first I / O expansion chip U10 and the second I / O expansion chip U11 are the pins for specifying the IIC communication address. By configuring these three pins, multiple chips of this type can be connected in parallel. The use of I / O expansion chips can reduce the use of hardware resources of the single-chip microcomputer and save resources for the single-chip microcomputer to process other tasks.

[0053] The single-chip microcomputer can control whether the first clock signal C1_CLK, i.e., the frequency signal, is connected to the first counter U6 through the second analog switch U4. When measuring the frequency of the oscillation signal, the single-chip microcomputer sends a clear signal RD_C to the first counter U6 and the second counter U8, and sends a switch signal C_SWITCH to the second analog switch U4. At this time, the selection pin B of the second analog switch U4 is connected to the first pin A1, and the second pin A2 is connected to the ground. Figure 2The X in the figure indicates that the second pin A2 of the second analog switch U4 is not used, and the X in other positions also indicates that the pin is not used), the first clock signal C1 CLK starts to be sent to the first counter U6, the single-chip microcomputer starts timing, the first counter U6 and the second counter U8 start to count the pulse number of the square wave signal generated by the first RC circuit, and the first oscillation capacitor C_1 completes one charging and discharging to generate a pulse. After a certain time (the longer the time, the more the pulse number is counted, and the more accurate the final calculated frequency is), the single-chip microcomputer changes the direction of C_SWITCH and stops timing, the first pin A1 of the second analog switch U4 stops outputting the first clock signal C1 CLK, the first counter unit Z11 stops counting the pulse number of the oscillation signal, and the single-chip microcomputer reads the pulse number sent by the data acquisition unit Z12. At this point, the pulse number and the statistical time are obtained, and the value of the pulse number divided by the statistical time is the frequency of the oscillation signal.

[0054] Preferably, as shown in Figure 2 The digital conversion circuit further comprises a sixth filter capacitor C6, and the power supply pin VCC and the ground pin GND of the second analog switch U4 are connected through the sixth filter capacitor C6. The sixth filter capacitor C6 can filter out interference signals in the power supply. The value of the sixth filter capacitor C6 can be 100nF.

[0055] Preferably, as shown in Figure 2 The digital conversion circuit further comprises an eighth filter capacitor C8 and a seventh filter resistor R7, the first pin A1 of the second analog switch U4, the eighth filter capacitor C8, the seventh filter resistor R7 and the ground terminal are connected in sequence, and the connection node between the eighth filter capacitor C8 and the seventh filter resistor R7 is used for outputting the first clock signal C1 CLK. The eighth filter capacitor C8 and the seventh filter resistor R7 can constitute a high-pass filter, thereby filtering out low-frequency interference signals. The value of the eighth filter capacitor C8 can be 47pF, and the value of the seventh filter resistor R7 can be 1kΩ.

[0056] Preferably, as shown in Figure 3 The digital conversion circuit further comprises a tenth filter capacitor C10, and the ground pin GND and the power supply pin VCC of the first counter U6 are connected through the tenth filter capacitor C10. The tenth filter capacitor C10 can filter out interference signals in the power supply. The value of the tenth filter capacitor C10 can be 100nF.

[0057] Preferably, as shown in Figure 3As shown, the digital conversion circuit also includes a twelfth filter capacitor C12, which connects the ground pin GND and the power supply pin VCC of the second counter U8. The twelfth filter capacitor C12 can filter out interference signals in the power supply. The value of the twelfth filter capacitor C12 can be 100nF. Similarly, as... Figure 4 As shown, a fourteenth filter capacitor C14 is provided between the power supply pin VCC and the ground pin GND of the first I / O expansion chip U10, and a fifteenth filter capacitor C15 is provided between the power supply pin VCC and the ground pin GND of the second I / O expansion chip U11.

[0058] Preferred, such as Figure 2 As shown, the capacitive sensor further includes a second oscillating capacitor C_2, and the digital conversion circuit further includes a second oscillation unit (located below the first oscillation unit Z1). The second oscillation unit includes a second oscillation resistor R2, a third analog switch U2, and the Schmitt trigger U3. The second oscillating capacitor C_2, the second oscillating resistor R2, and the third analog switch U2 are connected in series. The third analog switch U2 is used to control the second oscillating resistor R2 and the second oscillating capacitor C_2 to be in a charging state or a discharging state. The connection node between the second oscillating capacitor C_2 and the second oscillating resistor R2 is connected to the Schmitt trigger U3. The Schmitt trigger U3 and the third analog switch U2 are connected in series. The Schmitt trigger U3 is used to switch the on / off state of the third analog switch U2 according to the charging voltage of the second oscillating capacitor, so that the third analog switch U2 controls the second oscillating resistor R2 and the second oscillating capacitor C_2 to be in a charging state or a discharging state.

[0059] This embodiment takes into account that some capacitive sensors include two oscillating capacitors, namely a first oscillating capacitor C_1 and a second oscillating capacitor C_2. The common terminal of the first oscillating capacitor C_1 and the second oscillating capacitor C_2 is grounded. These two oscillating capacitors correspond to the first oscillating unit Z1 and the second oscillating unit, respectively. The first oscillating unit Z1 and the second oscillating unit can operate independently and generate a high-frequency oscillation signal, respectively.

[0060] like Figures 2 to 4 As shown, the second counter unit and data acquisition unit corresponding to the second oscillation unit have the same structure and principle as the first counter unit Z11 and data acquisition unit Z12 corresponding to the first oscillation unit Z1; through Figures 2 to 4 The digital conversion circuit of the capacitive sensor shown can generate two high-frequency oscillation signals and measure the frequency of these two oscillation signals.

[0061] exist Figure 2 and Figure 3In the embodiment, the second oscillation unit and the corresponding second counter unit are symmetrically arranged with the first oscillation unit Z1 and the corresponding first counter unit Z11 about a horizontal line, and the lower part of the dashed box is the second oscillation unit and the corresponding second counter unit; the second counter unit comprises a fourth analog switch U5, a third counter U7 and a fourth counter U9. The data acquisition unit Z12 further comprises a third I / O expansion chip U12, and the second I / O expansion chip U11 is shared by the first oscillation unit Z1 and the second oscillation unit; the data acquisition unit Z12 acquires input data of 48 ports, and the first oscillation unit Z1 and the second oscillation unit correspond to input data of 24 ports respectively. The communication addresses of the three I / O expansion chips are different, and the communication address pins A0, A1 and A2 of the first I / O expansion chip U10 can all be connected to the ground terminal GND; the communication address pin A0 of the second I / O expansion chip U11 is connected to the voltage source VCC, and the communication address pins A1 and A2 are connected to the ground terminal GND; and the communication address pins A0 and A1 of the third I / O expansion chip U12 are connected to the voltage source VCC, and the communication address A2 is connected to the ground terminal GND.

[0062] Preferably, as shown in Figures 2 to 4 The digital conversion circuit further comprises a second filter capacitor C2, a fourth filter resistor R4, a fourth filter capacitor C4, a seventh filter capacitor C7, a ninth filter capacitor C9, an eighth filter resistor R8, an eleventh filter capacitor C11, a thirteenth filter capacitor C13 and a sixteenth filter capacitor C16, so that the measurement result of the digital conversion can be improved.

[0063] As shown in Figure 5 The working process of the digital conversion circuit of the capacitive sensor provided by the embodiment is as follows:

[0064] Step one, power on the system, that is, power on the digital conversion circuit;

[0065] Step two, the RC circuit starts oscillation;

[0066] Step three, the single-chip microcomputer clears the values of all the counters through a clear signal RD_C;

[0067] Step four, the single-chip microcomputer controls the analog switch to be connected to the counter through a switch signal C_SWITCH;

[0068] Step five, the single-chip microcomputer disconnects the analog switch after a certain time;

[0069] Step six, the counter stops counting, the single-chip microcomputer reads the input information of the I / O expansion chip, and obtains the oscillation frequency of the RC circuit in this period of time, that is, the pulse frequency;

[0070] Step seven, the single-chip microcomputer calculates the frequency of the oscillation signal, and one measurement is completed; at this time, the next measurement can be returned to step three.

[0071] In summary, the utility model provides a kind of digital conversion circuit of capacitive sensor, including first oscillation resistance R1, first analog switch U1 and Schmidt trigger U3, the charging voltage of first oscillation capacitor C_1 as the input signal of Schmidt trigger U3, the output signal of Schmidt trigger U3 controls the communication state of first analog switch U1, to make first analog switch U1 control first oscillation resistance R1 and first oscillation capacitor C_1 be in charging state or discharge state, to further generate high frequency oscillation signal.

[0072] The above description is only the description of the preferred embodiment of the utility model, and not any limitation on the scope of the utility model, any change or modification made by the person skilled in the art according to the above disclosure belongs to the protection scope of the utility model.

Claims

1. A digital conversion circuit for a capacitive sensor comprising a first oscillation capacitor, characterized by, The digital conversion circuit comprises a first oscillation unit, and the first oscillation unit comprises a first oscillation resistor, a first analog switch and a Schmitt trigger; The first oscillation capacitor, the first oscillation resistor and the first analog switch are connected in series, and the first analog switch is used to control the first oscillation resistor and the first oscillation capacitor to be in a charging state or a discharging state; A connection node between the first oscillation capacitor and the first oscillation resistor is connected with the Schmitt trigger; the Schmitt trigger and the first analog switch are connected in series, and the Schmitt trigger is used to switch the connection state of the first analog switch according to the charging voltage of the first oscillation capacitor, so that the first analog switch controls the first oscillation resistor and the first oscillation capacitor to be in a charging state or a discharging state.

2. A digital conversion circuit for a capacitive sensor as claimed in claim 1, characterized in that The first analog switch comprises a first pin, a ground pin, a second pin, a selection pin, a power supply pin and an enable pin; the first pin and the ground pin of the first analog switch are connected with a ground terminal respectively, the second pin is connected with a voltage source, the selection pin is connected with one end of the first oscillation resistor, and the power supply pin is connected with a voltage source; The Schmitt trigger comprises a first input pin, a ground pin, a power supply pin and a first output pin; the first input pin of the Schmitt trigger is connected with the connection node between the first oscillation capacitor and the first oscillation resistor, the ground pin is connected with a ground terminal, the power supply pin is connected with a voltage source, and the first output pin is connected with the enable pin of the first analog switch.

3. A digital conversion circuit for a capacitive sensor as claimed in claim 2, characterized in that The digital conversion circuit further comprises a first filter capacitor and a third filter resistor; the connection node between the first oscillation capacitor and the first oscillation resistor is connected with the first input pin of the Schmitt trigger through the first filter capacitor; and the first filter capacitor, the third filter resistor and a ground terminal are connected in sequence.

4. A digital conversion circuit for a capacitive sensor as claimed in claim 2, characterized in that The digital conversion circuit further comprises a third filter capacitor; the first pin and the second pin of the first analog switch are connected through the third filter capacitor.

5. A digital conversion circuit for a capacitive sensor as claimed in claim 2, characterized in that The digital conversion circuit further comprises a first counter unit and a data acquisition unit; the first counter unit comprises a second analog switch, a first counter and a second counter; and the data acquisition unit comprises a first I / O expansion chip and a second I / O expansion chip; The second analog switch comprises a first pin, a ground pin, a selection pin, a power supply pin and an enable pin; the first pin of the second analog switch is used to output a first clock signal, the ground pin is connected with a ground terminal, the selection pin is connected with the first output pin of the Schmitt trigger, the power supply pin is connected with a voltage source, and the enable pin is used to input a preset switch signal; The first counter comprises a first output pin to a twelfth output pin, a first clock input pin, a first clear pin, a ground pin and a power supply pin; the first clock input pin of the first counter is used to input the first clock signal, the first clear pin is used to input a preset clear signal, the ground pin is connected with a ground terminal, and the power supply pin is connected with a voltage source; The second counter comprises thirteenth to twenty-fourth output pins, a pulse input pin, a first clear pin, a ground pin and a power pin; the pulse input pin of the second counter is connected with the twelfth output pin of the first counter, the first clear pin is used for inputting a preset clear signal, the ground pin is connected with a ground terminal, and the power pin is connected with a voltage source; The first I / O expansion chip and the second I / O expansion chip are identical in structure and are connected with the first counter and the second counter respectively.

6. A digital conversion circuit for a capacitive sensor as claimed in claim 5, characterized in that The digital conversion circuit further comprises a sixth filter capacitor; the power pin and the ground pin of the second analog switch are connected through the sixth filter capacitor.

7. A digital conversion circuit for a capacitive sensor as claimed in claim 5, characterized in that The digital conversion circuit further comprises an eighth filter capacitor and a seventh filter resistor; the first pin of the second analog switch, the eighth filter capacitor, the seventh filter resistor and a ground terminal are connected in sequence; and a connection node between the eighth filter capacitor and the seventh filter resistor is used for outputting the first clock signal.

8. A digital conversion circuit for a capacitive sensor as claimed in claim 5, characterized in that The digital conversion circuit further comprises a tenth filter capacitor; the ground pin and the power pin of the first counter are connected through the tenth filter capacitor.

9. A digital conversion circuit for a capacitive sensor as claimed in claim 5, characterized in that The digital conversion circuit further comprises a twelfth filter capacitor; the ground pin and the power pin of the second counter are connected through the twelfth filter capacitor.

10. A digital conversion circuit for a capacitive sensor as claimed in claim 1, characterized in that The capacitive sensor further comprises a second oscillation capacitor, and the digital conversion circuit further comprises a second oscillation unit, which comprises a second oscillation resistor, a third analog switch and the Schmitt trigger; The second oscillation capacitor, the second oscillation resistor and the third analog switch are connected in series, and the third analog switch is used for controlling the second oscillation resistor and the second oscillation capacitor to be in a charging state or a discharging state; A connection node between the second oscillation capacitor and the second oscillation resistor is connected with the Schmitt trigger; the Schmitt trigger and the third analog switch are connected in series, and the Schmitt trigger is used for switching the communication state of the third analog switch according to the charging voltage of the second oscillation capacitor, so that the third analog switch controls the second oscillation resistor and the second oscillation capacitor to be in a charging state or a discharging state.

Images