Interface circuit of silicon-based OLED IC

Abstract

The utility model relates to an interface circuit of a silicon-based OLED IC, and belongs to the field of interface circuits. The interface circuit comprises a user interface and an IC circuit. The IC circuit comprises an interface signal conversion module and an IC communication interface. The user interface is connected with the IC communication interface through the interface signal conversion module; and the user interface comprises five PINs (Personal Identification Number). The C communication interface comprises an IIC communication interface, an SPI communication interface and a UART communication interface. According to the utility model, five PIN interfaces are compatible with IIC, SPI and UART communication interfaces.

Description

TECHNICAL FIELD

[0001] The utility model belongs to interface circuit field, specifically, the utility model relates to a kind of interface circuit of silicon-based OLED IC. BACKGROUND

[0002] In prior art, commonly used silicon-based OLED IC interface circuit is as shown in Figure 2 Wherein, user end needs 8 PINs (pins) to meet the needs of three communication interfaces of IIC, SPI and UART. The large number of pins is not conducive to the area layout of the circuit board, and brings problems such as cost increase, maintenance complexity, etc.

[0003] Comparative document 1 (CN118503190A) discloses a slave multiplexing circuit compatible with I2C and SPI. The patent advantage lies in redesigning the I2C and SPI analog circuit and digital circuit of the IC bottom layer, thereby achieving the purpose of saving IC resources and reducing the number of interface PINs. However, the patent can only be compatible with I2C and SPI interfaces, and the bottom layer circuit needs to be modified, which has high technical requirements and complex operability.

[0004] Comparative document 2 (CN219761118U) discloses a white balance debugging circuit supporting IIC and RS232 signal conversion. The patent advantage utilizes a special chip to be compatible with IIC, SPI and RS232 (UART) interfaces, but the patent needs to design a special circuit at the AP end to achieve the purpose, and a special chip is needed. The patent is mainly used for AP end, and cannot achieve the purpose of reducing the number of OLED screen interfaces.

[0005] To solve the problems in the above-mentioned comparative documents, the present application proposes an interface circuit of silicon-based OLED IC. UTILITY MODEL CONTENT

[0006] The utility model aims to overcome the shortcomings of the prior art and proposes an interface circuit of silicon-based OLED IC to achieve the following purposes: to realize the function of 5 PIN interface compatible with IIC, SPI and UART communication interfaces.

[0007] To achieve the above-mentioned purposes, the utility model adopts the technical scheme: an interface circuit of silicon-based OLED IC, the interface circuit includes a user interface and an IC circuit, the IC circuit includes an interface signal conversion module and an IC communication interface; the user interface is connected with the IC communication interface through the interface signal conversion module; the user interface includes 5 PINs, and the IC communication interface includes SPI, IIC and UART communication interfaces.

[0008] Preferably, the five pins are connected to the SPI, IIC, and UART communication interfaces through the interface signal conversion module.

[0009] Preferably, the interface signal conversion module includes an OR gate, an XOR gate, and an AND gate, and the five pins are respectively connected to the SPI, IIC, and UART communication interfaces through the OR gate, XOR gate, and AND gate.

[0010] Preferably, the first input terminal of the OR gate is connected to PIN1, the second input terminal of the OR gate is connected to PIN2, and the output terminal of the OR gate is connected to the CS terminal of the SPI communication interface; the SDI terminal of the SPI communication interface is connected to PIN3; the SCLK terminal of the SPI communication interface is connected to PIN4; and the SDO terminal of the SPI communication interface is connected to PIN5.

[0011] Preferably, the first input terminal of the XOR gate is connected to PIN1, the second input terminal of the XOR gate is connected to PIN2, and the output terminal of the XOR gate is connected to the RST_N terminal of the IIC communication interface; the SDA terminal of the IIC communication interface is connected to PIN3; and the SCL terminal of the IIC communication interface is connected to PIN4.

[0012] Preferably, the first input terminal of the AND gate is connected to PIN1, the second input terminal of the AND gate is connected to PIN2, and the output terminal of the AND gate is connected to the RST_N terminal of the UART communication interface; the TX terminal of the UART communication interface is connected to PIN5; and the RX terminal of the UART communication interface is connected to PIN3.

[0013] The technical effects of this utility model are as follows: This utility model provides an interface circuit for a silicon-based OLED IC, which achieves the effect of simultaneously being compatible with IIC, SPI and UART communication interfaces without changing the underlying circuit. It can also reduce the number of interface pins from the original 8 pins to 5 pins, thereby meeting the communication interface needs of different customers. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the interface circuit structure of a silicon-based OLED IC according to an embodiment of the present invention;

[0015] Figure 2 This is a diagram of the interface circuit structure of an existing silicon-based OLED IC. Detailed Implementation

[0016] The specific embodiments of this utility model will be further described in detail below with reference to the accompanying drawings. The purpose is to help those skilled in the art to have a more complete, accurate, and in-depth understanding of the inventive concept and technical solution of this utility model, and to facilitate its implementation. It should be noted that the terms "first," "second," etc., used in this application are only for the convenience of describing the technical solution and distinguishing different components, and are not intended to limit this application. To make the technical solution of this utility model clearer, it will be explained and illustrated through the following embodiments.

[0017] This embodiment provides an interface circuit for a silicon-based OLED IC. The interface circuit includes a user interface and an IC circuit. The IC circuit includes an interface signal conversion module and an IC communication interface. The user interface is connected to the IC communication interface through the interface signal conversion module. The user interface includes 5 pins.

[0018] Specifically, such as Figure 1 As shown, the IC communication interface in this embodiment includes SPI, IIC, and UART communication interfaces, and the five pins are connected to the SPI, IIC, and UART communication interfaces through the interface signal conversion module.

[0019] The interface signal conversion module of this embodiment includes an OR gate, an XOR gate, and an AND gate. The five pins are respectively connected to the SPI, IIC, and UART communication interfaces through the OR gate, XOR gate, and AND gate.

[0020] This embodiment of the silicon-based OLED IC uses the most basic SPI, I2C, and UART communication interfaces, requiring no modification to the underlying circuitry of each communication interface. Only an interface signal conversion module, including one OR gate, one XOR gate, and one AND gate, needs to be added to the IC circuit to achieve 5-pin compatibility with SPI, I2C, and UART functions. The 5 pins are designed based on the time-division multiplexing principle as follows:

[0021] PIN1 input: represents CS0, the first chip select signal;

[0022] PIN2 input: indicates CS1, the second chip select signal;

[0023] PIN3 input / output: Indicates SDA / SDI / RX, connected to the SDI terminal of the SPI communication interface; the SDA terminal of the IIC communication interface; and the RX terminal of the UART communication interface.

[0024] PIN4 input: Indicates SCLK / SCL, connected to the SCLK terminal of the SPI communication interface; or the SCL terminal of the IIC communication interface.

[0025] PIN5 output: Indicates SDO / TX, connected to the SDO terminal of the SPI communication interface; or the TX terminal of the UART communication interface.

[0026] Specifically, in this embodiment, the first input terminal of the OR gate is connected to PIN1, the second input terminal of the OR gate is connected to PIN2, and the output terminal of the OR gate is connected to the CS terminal of the SPI communication interface; the SDI terminal of the SPI communication interface is connected to PIN3; the SCLK terminal of the SPI communication interface is connected to PIN4; and the SDO terminal of the SPI communication interface is connected to PIN5.

[0027] The first input terminal of the XOR gate is connected to PIN1, the second input terminal of the XOR gate is connected to PIN2, and the output terminal of the XOR gate is connected to the RST_N terminal of the IIC communication interface; the SDA terminal of the IIC communication interface is connected to PIN3; and the SCL terminal of the IIC communication interface is connected to PIN4.

[0028] The first input terminal of the AND gate is connected to PIN1, the second input terminal of the AND gate is connected to PIN2, and the output terminal of the AND gate is connected to the RST_N terminal of the UART communication interface; the TX terminal of the UART communication interface is connected to PIN5; and the RX terminal of the UART communication interface is connected to PIN3.

[0029] Based on the above structure, the working principle of this embodiment is as follows:

[0030] ① When both PIN1 and PIN2 are input at a low level, the CS signal output after CS0 and CS1 pass through the OR gate is at a low level, and the SPI communication interface is working at this time; the RST_N of the IIC and UART communication interfaces is in a low-level reset state, and the IIC and UART communication interfaces are not working; at this time, PIN3 = SDI; PIN4 = SCLK; PIN5 = SDO;

[0031] ② When either PIN1 or PIN2 is high, the RST_N signal of the IIC communication interface is output high after CS0 and CS1 pass through the XOR gate, and the IIC communication interface is working at this time; the CS signal of the SPI communication interface is high, and the RST_N of the UART communication interface is in a low-level reset state, and the SPI and UART communication interfaces are not working; at this time, PIN3 = SDA; PIN4 = SCL; the specific value of PIN5 is not considered.

[0032] ③ When both PIN1 and PIN2 are high, CS0 and CS1, after passing through the AND gate, output a high level for the RST_N signal of the UART communication interface, at which point the UART communication interface is working; the CS signal of the SPI communication interface is high, and the RST_N of the IIC communication interface is in a low-level reset state, so the IIC and UART communication interfaces are not working; at this time, PIN3 = RX; the specific value of PIN4 is not considered; PIN5 = TX;

[0033] This invention provides an interface circuit for a silicon-based OLED IC that achieves compatibility with IIC, SPI, and UART communication interfaces without altering the underlying circuitry. Furthermore, it reduces the number of interface pins from the original eight to five, thereby meeting the communication interface requirements of different customers.

[0034] The present invention has been described above by way of example with reference to the accompanying drawings. Obviously, the specific implementation of the present invention is not limited to the above-described manner. Any non-substantial improvements made using the inventive concept and technical solution of the present invention; or the direct application of the inventive concept and technical solution to other situations without modification, are all within the protection scope of the present invention.

Claims

1. An interface circuit for a silicon-based OLED IC, characterized in that: The interface circuit includes a user interface and an IC circuit. The IC circuit includes an interface signal conversion module and an IC communication interface. The user interface is connected to the IC communication interface through the interface signal conversion module. The user interface includes 5 pins. The IC communication interface includes an SPI communication interface, an IIC communication interface, and a UART communication interface.

2. The interface circuit for a silicon-based OLED IC according to claim 1, characterized in that: The five pins are connected to the SPI communication interface, IIC communication interface, and UART communication interface through the interface signal conversion module.

3. The interface circuit for a silicon-based OLED IC according to claim 2, characterized in that: The interface signal conversion module includes an OR gate, an XOR gate, and an AND gate. The five pins are respectively connected to the SPI communication interface, the IIC communication interface, and the UART communication interface through the OR gate, the XOR gate, and the AND gate.

4. The interface circuit for a silicon-based OLED IC according to claim 3, characterized in that: The first input terminal of the OR gate is connected to PIN1, the second input terminal of the OR gate is connected to PIN2, and the output terminal of the OR gate is connected to the CS terminal of the SPI communication interface; the SDI terminal of the SPI communication interface is connected to PIN3; the SCLK terminal of the SPI communication interface is connected to PIN4; and the SDO terminal of the SPI communication interface is connected to PIN5.

5. The interface circuit for a silicon-based OLED IC according to claim 3, characterized in that: The first input terminal of the XOR gate is connected to PIN1, the second input terminal of the XOR gate is connected to PIN2, and the output terminal of the XOR gate is connected to the RST_N terminal of the IIC communication interface; the SDA terminal of the IIC communication interface is connected to PIN3; and the SCL terminal of the IIC communication interface is connected to PIN4.

6. The interface circuit for a silicon-based OLED IC according to claim 3, characterized in that: The first input terminal of the AND gate is connected to PIN1, the second input terminal of the AND gate is connected to PIN2, and the output terminal of the AND gate is connected to the RST_N terminal of the UART communication interface; the TX terminal of the UART communication interface is connected to PIN5; and the RX terminal of the UART communication interface is connected to PIN3.

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