Soft commutation circuit of brushless driver

Abstract

The utility model relates to a soft commutation circuit of a brushless driver. The soft commutation circuit comprises an input end input of a commutation signal IN, a monostable trigger A, a monostable trigger B, resistors R1 and R2, an exclusive-OR gate 1, an exclusive-OR gate 2, an exclusive-OR gate 3, a D trigger and capacitors C1, C2 and C3, wherein the monostable trigger A and the monostable trigger B are connected in parallel; wherein the input end input is divided into two paths, one path is connected to the monostable trigger A through the end A of the OR gate 1, and the other path is connected to the monostable trigger B through the end B of the OR gate 2; the device is reasonable in design, compact in structure and convenient to use.

Description

TECHNICAL FIELD

[0001] The utility model relates to a soft commutation circuit of brushless driver belongs to the field of circuit, especially in the process of working commutation of brushless motor, through adjusting driver commutation and power switch timing, realize the soft commutation of brushless driver, reduce the circuit of power terminal current and voltage peak. BACKGROUND

[0002] At present in the application, the brushless driver adopts the hard commutation technology, namely, directly gives the commutation signal in the motor operation process, does not consider the working state of the motor at this time, or in the system application, adopts the external software to control the commutation and power switch timing, but this method is generally more in high -power occasion application.

[0003] The brushless motor needs frequently commutation in the working process, in the commutation process, will bring the larger current and voltage peak, causes the impact to the circuit even damages. Therefore, need in the commutation process, gives certain buffer, thereby reduces the circuit impact.

[0004] The prior art brushless driver mostly adopts the hard commutation technology, this makes the circuit impact bigger, easily causes the damage of circuit, adopts the software method control timing, increases the complexity of circuit. CONTENT OF UTILITY MODEL

[0005] The utility model solves the technical problem that the utility model provides a kind of soft commutation circuit of brushless driver, the utility model does not need programming, and circuit structure is also relatively simple, and universal adaptability is better. Meanwhile solve the problem of the larger voltage current peak when the brushless motor hard commutation, reduce the impact to circuit.

[0006] To solve the above problem, the technical scheme adopted by the utility model is as follows:

[0007] A kind of soft commutation circuit of brushless driver, including the input end input of commutation signal IN, parallel monostable trigger A and monostable trigger B, resistance R1, R2, exclusive or gate 1, exclusive or gate 2, exclusive or gate 3, D trigger, capacitor C1, C2;Wherein, input end input is divided into two ways,

[0008] Monostable trigger A has or gate 1,

[0009] Monostable trigger B has or gate 2;

[0010] One way is connected to monostable trigger A by the A end of or gate 1,

[0011] One way is connected to monostable trigger B by the B end of or gate 2,

[0012] The Q end of the monostable trigger A and the Q end of the monostable trigger B are connected to the A and B input ends of the exclusive OR gate 1 respectively, and the output end F of the exclusive OR gate 1 is divided into two paths, one of which is connected to the B end of the exclusive OR gate 2 and the other of which is connected to the A end of the exclusive OR gate 3.

[0013] The F end of the exclusive OR gate 2 is connected to the main path shutdown signal output end, and the F end of the exclusive OR gate 3 is connected to the reversing signal O.

[0014] As a further improvement of the above technical solution:

[0015] The A end of the exclusive OR gate 2 is connected to VCC.

[0016] The B end of the exclusive OR gate 3 is connected to the ground.

[0017] For the monostable trigger A, a capacitor C1 is connected between the T1 and T2 ends, and the T2 end is connected to VCC through a resistor R1.

[0018] For the monostable trigger B, a capacitor C2 is connected between the T1 and T2 ends, and the T2 end is connected to VCC through a resistor R2.

[0019] The A of the OR gate 2 is connected to the ground, the B of the OR gate 1 and the CD end of the monostable trigger A are connected to VCC.

[0020] The CD end of the monostable trigger B is connected to VCC.

[0021] The monostable trigger A and the monostable trigger B process forward and reverse signals respectively.

[0022] In the working process, first, the reversing signal enters the monostable trigger circuit A and the monostable trigger circuit B; then, the monostable trigger circuit A and the monostable trigger circuit B process the reversing signals in different directions respectively, wherein the monostable trigger circuit A and the monostable trigger circuit B process forward and reverse signals respectively, and generate a pulse signal with a set width at the reversing position, and the width of the pulse signal is the time length of the closed PWM in the later stage;

[0023] Secondly, the pulse signal after processing enters the exclusive OR gate 1 for signal synthesis, that is, the pulse signals in two directions are synthesized into one signal; thirdly, the synthesized signal is divided into two paths.

[0024] One of the two paths inverts the signal and enters the control main path to close the PWM signal.

[0025] The other path enters the D trigger input end CLOCK1 through the exclusive OR gate 3 and sets a delay time, and the PWM shutdown is completed within the delay time, and the delay time is the time when the new reversing signal appears; then, the D trigger generates a new reversing signal.

[0026] The input end CLOCK1 of the D trigger is connected to the ground through a capacitor C3.

[0027] In the working project, firstly, the commutation signal enters the monostable trigger circuit A and the monostable trigger circuit B; then, the monostable trigger circuit A and the monostable trigger circuit B process the commutation signals in different directions respectively, wherein the monostable trigger circuit A and the monostable trigger circuit B process the positive and reverse signals respectively, and generate the pulse signals with a set width at the commutation position, and the width of the pulse signal is the time length of closing the PWM in the later stage;

[0028] Secondly, the pulse signals after processing enter the exclusive OR gate 1 to synthesize the signals, that is, the pulse signals in two directions are synthesized into a signal; thirdly, the synthesized signal is divided into two paths;

[0029] One path inverts the signal and enters the control main path to close the PWM signal;

[0030] One path enters the D flip-flop input terminal CLOCK1 through the exclusive OR gate 3 signal and sets the delay time, and the PWM shutdown is completed within the delay time, and the delay time is the time when the new commutation signal appears; then, the D flip-flop generates a new commutation signal;

[0031] The input terminal CLOCK1 of the D flip-flop is grounded through the capacitor C3.

[0032] The utility model discloses a through adjusting the timing of commutation signal and power main path PWM, reaches the purpose of the soft commutation of brushless motor. This scheme can effectively protect the circuit from commutation damage. The utility model discloses reasonable in design, low in cost, solid and durable, safe and reliable, simple to operate, time saving and labor saving, capital saving, compact structure and convenient to use. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 It is the circuit structure schematic diagram of the utility model. DETAILED DESCRIPTION

[0034] As Figure 1 The soft commutation circuit of the brushless driver of the embodiment includes the input end input of the commutation signal IN, the parallel monostable trigger A and the monostable trigger B, the resistors R1 and R2, the exclusive OR gate 1, the exclusive OR gate 2, the exclusive OR gate 3, the D flip-flop, the capacitors C1 and C2; wherein the input end input is divided into two paths,

[0035] The monostable trigger A has the or gate 1,

[0036] The monostable trigger B has the or gate 2;

[0037] One path is connected to the monostable trigger A through the A end of the or gate 1,

[0038] One path is connected to the monostable trigger B through the B end of the or gate 2,

[0039] The Q end of the monostable trigger A and the Q end of the monostable trigger B are connected to the A and B input ends of the exclusive OR gate 1 respectively, and the output end F of the exclusive OR gate 1 is divided into two paths, one of which is connected to the B end of the exclusive OR gate 2, and the other of which is connected to the A end of the exclusive OR gate 3.

[0040] The F end of the exclusive OR gate 2 is connected to the main path off signal output end, and the F end of the exclusive OR gate 3 is connected to the commutation signal O. The A end of the exclusive OR gate 2 is connected to VCC.

[0041] The B end of the exclusive OR gate 3 is connected to the ground.

[0042] For the monostable trigger A, a capacitor C1 is connected between the T1 and T2 ends, and the T2 end is connected to VCC through a resistor R1.

[0043] For the monostable trigger B, a capacitor C2 is connected between the T1 and T2 ends, and the T2 end is connected to VCC through a resistor R2.

[0044] The A of the OR gate 2 is connected to the ground, the B of the OR gate 1 and the CD end of the monostable trigger A are connected to VCC.

[0045] The CD end of the monostable trigger B is connected to VCC.

[0046] The monostable trigger A and the monostable trigger B process forward and reverse signals respectively.

[0047] As Figure 1 In the utility model, the commutation signal first enters the monostable trigger circuit, and the circuit mainly processes the commutation signals in different directions, generates a pulse signal with a certain width at the position of commutation, and the width can be adjusted according to needs. The width of the pulse signal is the time length of closing the PWM in the later stage.

[0048] The two monostable trigger circuits process forward and reverse signals respectively, and the processed signals enter the exclusive OR gate for signal synthesis, that is, the signals in two directions are synthesized into a signal. After synthesis, the signal is divided into two signals, one of which is inverted and enters the control main path to close the PWM signal, and the other signal enters the D trigger. The D trigger generates a new commutation signal. The time of the new commutation signal can be adjusted by adjusting the capacitor.

[0049] The purpose of the design is that when the commutation signal of the brushless driver is sent from the outside, the main path PWM square wave is first closed, the circuit is temporarily suspended, the suspension time is 5 mu S (the time can be adjusted), after the circuit is suspended, the commutation signal is sent into the main power circuit after a delay of 2 mu S (the time can be adjusted), and the brushless driver resumes normal work after 5 mu S, and the normal commutation is realized.

[0050] The utility model fully describes in order to disclose more clearly, and the prior art is not enumerated one by one.

[0051] It should be pointed out finally that the above examples are only used to illustrate the technical solutions of the present application, and not to limit them. Although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can still be modified, or some technical features can be replaced equivalently. It is obvious for those skilled in the art to combine the technical solutions of the present application. These modifications or replacements do not make the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the present application. The technical contents not described in detail in the present application are all known technologies.

Claims

1. A soft commutation circuit for a brushless drive, characterized by: The input end input including commutation signal IN, parallel monostable trigger A and monostable trigger B, resistance R1, R2, XOR gate 1, XOR gate 2, XOR gate 3, D trigger, capacitor C1, C2; wherein, the input end input is divided into two ways, The monostable trigger A has the OR gate 1, The monostable trigger B has the OR gate 2; One way through the A end of the OR gate 1 accesses the monostable trigger A, One way through the B end of the OR gate 2 accesses the monostable trigger B, The Q end of the monostable trigger A, the monostable trigger B respectively accesses the A, B two input ends of the XOR gate 1, the output end F of the XOR gate 1 is divided into two ways, one way accesses the B end of the XOR gate 2, one way accesses the A end of the XOR gate 3; The F end of the XOR gate 2 accesses the main road off signal output end, the F end of the XOR gate 3 accesses the commutation signal O.

2. A soft commutation circuit for a brushless drive according to claim 1, characterized in that: The A end of the XOR gate 2 accesses VCC.

3. The soft commutation circuit for a brushless motor drive of claim 1, wherein: The B end of the XOR gate 3 accesses ground.

4. The soft commutation circuit for a brushless motor drive of claim 1, wherein: For the monostable trigger A, the capacitor C1 is connected between T1 and T2, and T2 is connected to VCC through the resistance R1.

5. The soft commutation circuit for a brushless motor drive of claim 1, wherein: For the monostable trigger B, the capacitor C2 is connected between T1 and T2, and T2 is connected to VCC through the resistance R2.

6. The soft commutation circuit for a brushless motor drive of claim 1, wherein: The A of the OR gate 2 accesses ground, the B of the OR gate 1 and the CD end of the monostable trigger A access VCC.

7. The soft commutation circuit for a brushless motor drive of claim 1, wherein: The CD end of the monostable trigger B accesses VCC.

8. The soft commutation circuit for a brushless motor drive of claim 1, wherein: The monostable trigger A, the monostable trigger B respectively processes forward and reverse signals.

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