Power-on maloperation prevention circuit of underwater intelligent detection equipment

Abstract

The embodiment of the utility model discloses a power-on maloperation prevention circuit for underwater intelligent detection equipment. The power-on maloperation prevention circuit comprises a first reset chip, a second reset chip, an analog switch, a microcontroller and an interface chip, a reset signal output end of the first reset chip is respectively connected with a reset port of the microcontroller and a manual reset port of the second reset chip; the reset signal output end of the second reset chip is connected with the control end of the analog switch; the common end of the analog switch is connected with the enabling control end of the interface chip through a resistor, the normally open end of the analog switch is connected with a ground wire, and the normally closed end of the analog switch is connected with a power supply; the signal output end of the microcontroller is connected with the signal input end of the interface chip. The stable output of the microprocessor is ensured, so that the power-on stability is improved, and the error output condition caused by power-on jitter is avoided.

Description

Technical Field

[0001] This utility model relates to the field of circuit safety, and in particular to a circuit for preventing accidental operation when an underwater intelligent detection device is powered on. Background Technology

[0002] Intelligent underwater detection equipment that drives pyrotechnics generally contains a microprocessor. During the power-on reset period, the microprocessor's output pins are unstable because the internal software is not loaded and running. If it directly controls the subsequent action mechanism, it will cause control errors and, in severe cases, lead to major accidents.

[0003] There is currently no effective solution to the problem of unreliable control output of the power-on reset device in existing intelligent detection equipment. Utility Model Content

[0004] To address the aforementioned issues, this invention provides a power-on anti-malfunction circuit for underwater detection equipment. By controlling the opening and closing of the analog switch through the pulse output of the first and second reset chips after power-on, the stable control output of the microprocessor is connected to the output terminal of the interface chip, thereby achieving stable power-on output and solving the problem of unreliable control output of the power-on reset device in existing intelligent detection equipment.

[0005] To achieve the above objectives, this utility model provides a power-on anti-malfunction circuit for underwater detection equipment, comprising: a first reset chip, a second reset chip, an analog switch, a microcontroller, and an interface chip; the reset signal output terminal of the first reset chip is connected to the reset port of the microcontroller and the manual reset port of the second reset chip respectively; the reset signal output terminal of the second reset chip is connected to the control terminal of the analog switch; the common terminal of the analog switch is connected to the enable control terminal of the interface chip through a resistor, the normally open terminal is connected to the ground wire, and the normally closed terminal is connected to the power supply; the signal output terminal of the microcontroller is connected to the signal input terminal of the interface chip.

[0006] Further optionally, the analog switch incorporates a single-pole double-throw switch.

[0007] Further optionally, the microcontroller includes a first signal output terminal and a second signal output terminal; the interface chip includes a first signal input terminal and a second signal input terminal; the first signal output terminal is connected to the first signal input terminal; and the second signal output terminal is connected to the second signal input terminal.

[0008] Optionally, the interface chip includes a third signal output terminal and a fourth signal output terminal; the third signal output terminal is connected to the first output branch and is grounded through a resistor; the fourth signal output terminal leads out to the second output branch and is grounded through a resistor.

[0009] The above technical solution has the following beneficial effects: by cooperating with the first reset chip, the second reset chip and the analog switch, the stable output of the microprocessor is ensured, thereby improving the stability of power-on and avoiding erroneous output caused by power-on jitter. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 This is a schematic diagram of the power-on anti-malfunction circuit of the underwater intelligent detection equipment provided in this embodiment of the utility model.

[0012] Reference numerals in the attached figures: 1-First reset chip; 2-Second reset chip; 3-Analog switch; 4-Microcontroller; 5-Interface chip. Detailed Implementation

[0013] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0014] To address the unreliable control output of the power-on reset device in existing intelligent detection equipment, this invention provides a power-on anti-maloperation circuit for underwater intelligent detection equipment. Figure 1 This is a schematic diagram of the power-on anti-malfunction circuit of the underwater intelligent detection equipment provided in this embodiment of the utility model, as shown below. Figure 1 As shown, the circuit includes: a first reset chip 1, a second reset chip 2, an analog switch 3, a microcontroller 4, and an interface chip 5; the reset signal output terminal of the first reset chip 1 is connected to the reset port of the microcontroller 4 and the manual reset port of the second reset chip 2 respectively; the reset signal output terminal of the second reset chip 2 is connected to the control terminal of the analog switch 3; the common terminal of the analog switch 3 is connected to the enable control terminal of the interface chip 5 through a resistor, the normally open terminal is connected to the ground wire, and the normally closed terminal is connected to the power supply; the signal output terminal of the microcontroller 4 is connected to the signal input terminal of the interface chip 5.

[0015] like Figure 1As shown, the reset signal output terminal of the first reset chip 1 splits into two branches, which are respectively connected to the reset port of the microcontroller 4 and the manual reset port of the second reset chip 2 to generate a reset signal for the microprocessor to complete the reset of the microprocessor.

[0016] The reset signal output terminal of the second reset chip 2 is connected to the control terminal of the analog switch 3. The common terminal of the analog switch 3 is connected to the enable terminal of the interface chip 5 through a resistor. The normally open contact of the analog switch 3 is connected to the ground wire, and the normally closed contact is connected to the power supply.

[0017] The first reset chip 1, the second reset chip 2, the microcontroller 4, and the interface chip 5 are all connected to the power supply Vcc.

[0018] The signal output terminal of the microcontroller 4 is connected to the signal input terminal of the interface chip 5.

[0019] When the system powers on, the first reset chip 1 outputs a 200ms low-level pulse followed by a high-level pulse. After the microprocessor resets, it initializes the internal software and enters a stable low-level output state. The second reset chip 2, upon power-on, is in operation. It connects in series with the reset signal output of the first reset chip 1 via its manual reset port, outputting a 400ms low-level pulse followed by a high-level pulse. When the analog switch 3 powers on, its internal switch common port is first connected to the normally closed contact (high level) and then to the normally open contact (low level), outputting a 400ms high-level pulse followed by a low-level pulse. When the enable pin of the control interface chip 5 is powered on, it is at a high level, and the output of the interface chip 5 is in a tri-state. During the tri-state, the output is stably controlled at a low level through the pull-down resistor. When the enable pin changes to a low level, the interface chip 5 changes from the tri-state to the output state, connecting the signal output of the microprocessor to the signal input of the interface chip 5. This connects the output stably controlled by the microprocessor to the input of the interface chip 5, thereby achieving the purpose of stable output after power-on. This further ensures that the port driving the pyrotechnic device outputs a stable low level when powered on, eliminates the influence of port instability during processor reset on the output, and prevents erroneous output caused by power-on jitter.

[0020] Preferably, the interface chip 5 in this embodiment is model 74HC245.

[0021] As an optional implementation, analog switch 3 incorporates a single-pole double-throw switch.

[0022] The analog switch 3 has a built-in single-pole double-throw switch. Its control terminal is connected to the reset signal output port of the second reset chip 2, and its common terminal is connected to the enable terminal of the interface chip 5 through a resistor. The normally open contact is connected to the ground wire, and the normally closed contact is connected to the power supply.

[0023] As an optional implementation, the microcontroller 4 includes a first signal output terminal and a second signal output terminal; the interface chip 5 includes a first signal input terminal and a second signal input terminal; the first signal output terminal is connected to the first signal input terminal; and the second signal output terminal is connected to the second signal input terminal.

[0024] The microcontroller 4 includes two signal output terminals, namely a first signal output terminal and a second signal output terminal. The interface chip 5 includes two signal input terminals, namely a first signal input terminal and a second signal input terminal. The two signal input terminals of the interface chip 5 are respectively connected to the two signal output terminals of the microcontroller 4. Different signals can be output through different output ports. Of course, the number of signal output terminals and signal input terminals can be arbitrarily set according to requirements.

[0025] As an optional implementation, the interface chip 5 includes a third signal output terminal and a fourth signal output terminal; the third signal output terminal is connected to the first output branch and is grounded through a resistor; the fourth signal output terminal leads out to the second output branch and is grounded through a resistor.

[0026] like Figure 1 As shown, interface chip 5 also includes two signal output terminals: a third signal output terminal and a fourth signal output terminal. A first output branch is led out from the third signal output terminal, and the third signal output terminal is simultaneously connected to ground via a resistor. A second output branch is led out from the fourth signal output terminal, and the fourth signal output terminal is also simultaneously connected to ground via a resistor, ensuring that interface chip 5 can output multiple signals. Of course, the number of signal output terminals of interface chip 5 can be arbitrarily set according to requirements.

[0027] The above technical solution has the following beneficial effects: by cooperating with the first reset chip, the second reset chip and the analog switch, the stable output of the microprocessor is ensured, thereby improving the stability of power-on and avoiding erroneous output caused by power-on jitter.

[0028] The above-described specific embodiments of the utility model further illustrate the purpose, technical solution, and beneficial effects of the utility model. It should be understood that the above content is only a specific embodiment of the utility model and is not intended to limit the scope of protection of the utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the utility model should be included within the scope of protection of the utility model.

Claims

1. A power-on anti-malfunction circuit for an underwater intelligent detection device, characterized in that, include: First reset chip, second reset chip, analog switch, microcontroller and interface chip; The reset signal output terminal of the first reset chip is connected to the reset port of the microcontroller and the manual reset port of the second reset chip, respectively. The reset signal output terminal of the second reset chip is connected to the control terminal of the analog switch; The common terminal of the analog switch is connected to the enable control terminal of the interface chip through a resistor, the normally open terminal is connected to the ground wire, and the normally closed terminal is connected to the power supply. The signal output terminal of the microcontroller is connected to the signal input terminal of the interface chip.

2. The power-on anti-malfunction circuit for underwater intelligent detection equipment according to claim 1, characterized in that: The analog switch incorporates a single-pole double-throw switch.

3. The power-on anti-malfunction circuit for underwater intelligent detection equipment according to claim 1, characterized in that: The microcontroller includes a first signal output terminal and a second signal output terminal; The interface chip includes a first signal input terminal and a second signal input terminal; The first signal output terminal is connected to the first signal input terminal; The second signal output terminal is connected to the second signal input terminal.

4. The power-on anti-malfunction circuit for underwater intelligent detection equipment according to claim 3, characterized in that: The interface chip includes a third signal output terminal and a fourth signal output terminal; The third signal output terminal is connected to the first output branch, and the third signal output terminal is grounded through a resistor; The fourth signal output terminal leads to the second output branch, and the fourth signal output terminal is grounded through a resistor.

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