Multiphase flow analysis and measurement circuit
By using inexpensive analog front-end AFE chips and integrated circuit components, the problems of insufficient circuit accuracy and high power consumption in multiphase flow detection are solved, achieving efficient signal processing and system stability, and reducing hardware costs.
Patent Information
- Application Number
- CN202520298458.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-24
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2035-02-24
AI Technical Summary
Existing multiphase flow detection circuits suffer from insufficient accuracy, high power consumption, and high cost, which affect signal quality and system stability.
The circuit structure is simplified by using a single, inexpensive analog front-end (AFE) chip instead of the traditional, expensive dedicated function chip. It combines an electrode array, an analog switch array, a main microprocessor unit, and interface circuits. It also uses low-power transimpedance amplifiers and digital potentiometer adjustment modules to achieve efficient signal conversion and processing.
It simplifies the circuit structure, reduces hardware costs, improves signal quality and system reliability and stability, and achieves high-precision multiphase flow detection.
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Figure CN223679120U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the technical field of resistance impedance measurement, especially relates to a multiphase flow analysis measurement circuit. BACKGROUND
[0002] The electrical tomography (ET) technology has the characteristics of fast response, low equipment cost, good safety, no radioactive source and no radiation, and has important research value and wide application prospect in the fields of multiphase flow detection and monitoring, such as oil-gas and oil-water two-phase flow in the petroleum industry, gas-solid two-phase flow in pneumatic conveying, gas-solid two-phase flow in fluidized bed and trickle bed reactor. At present, there are some problems in the application of the ET technology. First, the existing measurement circuit structure often adopts traditional discrete devices and multiple chips to realize special functions and data acquisition systems, which inevitably has the disadvantage of insufficient precision. Second, the complex measurement circuit requires higher power consumption, which increases the heat generation, affects the stability of the temperature, and is not conducive to the feature extraction of weak analog signals. Third, it requires extremely high precision of peripheral devices and multiple semiconductor chips, which significantly increases the cost of the circuit. SUMMARY
[0003] To solve the above technical problems, the purpose of the utility model is to provide a multiphase flow analysis measurement circuit which can simplify the circuit structure, improve the signal quality, and ensure the reliability and stability of the system.
[0004] The first technical scheme adopted by the utility model is: including electrode array, analog switch switching array, analog front end (AFE) chip, main micro processing unit, interface circuit and computer PC end, the output end of the electrode array is connected with the first input end of the analog switch switching array, the output end of the analog switch switching array is connected with the first input end of the analog front end (AFE) chip, the output end of the analog front end (AFE) chip is connected with the input end of the main micro processing unit, the first output end of the main micro processing unit is connected with the second input end of the analog front end (AFE) chip, the second output end of the main micro processing unit is connected with the second input end of the analog switch switching array, the third output end of the main micro processing unit is connected with the input end of the interface circuit, and the interface circuit is connected with the computer PC end.
[0005] Further, the analog front end (AFE) chip comprises a digital potentiometer adjustment module, a waveform generator, a low-power trans-impedance amplifier, a first gain resistor, a first gain capacitor, a second gain resistor, a second gain capacitor, an analog-to-digital converter, a discrete Fourier transform module, a serial peripheral interface, a crystal oscillator, and a sequencer, wherein an output terminal of the waveform generator is connected to an input terminal of the digital potentiometer adjustment module, an output terminal of the low-power trans-impedance amplifier, a second terminal of the first gain resistor, and a second terminal of the first gain capacitor are all connected to a first terminal of the second gain resistor, a second terminal of the second gain resistor, a first terminal of the second gain capacitor, and an input terminal of the analog-to-digital converter are connected, a second terminal of the second gain capacitor is grounded, an output terminal of the analog-to-digital converter is connected to a first input terminal of the discrete Fourier transform module, an output terminal of the discrete Fourier transform module is connected to the serial peripheral interface, a first output terminal of the crystal oscillator is connected to a second input terminal of the discrete Fourier transform module, and a second output terminal of the crystal oscillator is connected to an input terminal of the sequencer.
[0006] Further, the digital potentiometer adjustment module comprises a gain amplifier and a digital-to-analog converter, wherein an output terminal of the digital-to-analog converter is connected to an input terminal of the gain amplifier.
[0007] Further, the analog front end (AFE) chip further comprises an excitation generation module, an output terminal of the excitation generation module is connected to a third input terminal of the analog switch switching array, an input terminal of the excitation generation module is connected to a fourth output terminal of the main micro-processing unit, the excitation generation module comprises a waveform generator, a high-speed digital-to-analog converter, and an excitation amplifier, and the waveform generator, the high-speed digital-to-analog converter, and the excitation amplifier are connected in sequence.
[0008] Further, the analog front end (AFE) chip further comprises a measurement voltage module and a measurement current module, the measurement voltage module and the measurement current module are both connected to the discrete Fourier transform module, and an equivalent circuit of the measurement voltage module and the measurement current module comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a voltmeter, an ammeter, and a trans-impedance amplifier, wherein a first terminal of the first capacitor is connected to a first terminal of the second capacitor, a second terminal of the first capacitor is connected to a first terminal of the first resistor, a second terminal of the second capacitor is connected to a first terminal of the second resistor, a second terminal of the first resistor, a first terminal of the voltmeter, and a first terminal of the ammeter are connected, a second terminal of the second resistor, a second terminal of the voltmeter, an input terminal of the trans-impedance amplifier, and a first terminal of the third resistor are connected, a second terminal of the ammeter, a second terminal of the third resistor, and an output terminal of the trans-impedance amplifier are connected.
[0009] Further, the digital logic control circuit and the analog processing channel are further included, the fifth output end of the main micro-processing unit is connected with the input end of the digital logic control circuit, the sixth output end of the main micro-processing unit is connected with the input end of the analog processing channel, and the output end of the digital logic control circuit is connected with the fourth input end of the analog switch switching array.
[0010] The utility model discloses beneficial effect is: through using single cheap analog front end (AFE) chip replaces traditional expensive special function chip / circuit module, has simplified circuit structure, has reduced design development difficulty, has saved hardware cost, and cooperation sensor will the physical quantity of measurement object be converted into digital signal, is convenient for detection and control, reaches the purpose of improving signal quality and guaranteeing system reliability, stability. BRIEF DESCRIPTION OF DRAWINGS
[0011] Figure 1 It is the structural frame principle schematic drawing of the multi-phase flow analysis measurement circuit of the utility model;
[0012] Figure 2 It is the ECT system overall design block diagram of before simplification provided by the specific embodiment of the utility model;
[0013] Figure 3 It is the ECT system hardware principle block diagram of before simplification provided by the specific embodiment of the utility model;
[0014] Figure 4 It is the volt-ampere measurement specific circuit diagram provided by the specific embodiment of the utility model;
[0015] Figure 5 It is the equivalent circuit specific circuit diagram of measurement method provided by the specific embodiment of the utility model;
[0016] Figure 6 It is the AFE simplified block diagram provided by the specific embodiment of the utility model;
[0017] Figure 7 It is the schematic diagram of AFE signal path provided by the specific embodiment of the utility model;
[0018] Figure 8 It is the specific circuit diagram of AFE signal path provided by the specific embodiment of the utility model. DETAILED DESCRIPTION
[0019] The utility model will be further explained in detail in connection with the drawings and specific embodiment.The step numbering in the following embodiment is only set for facilitating the explanation, and the order between steps is not limited, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of the person skilled in the art.
[0020] It should be noted that, as no special explanation, the singular form of "one", "said" and "the" used in the present disclosure also includes the plural form, unless the context clearly indicates otherwise. In addition, unless otherwise defined, all technical and scientific terms used herein have the same meaning as understood by those skilled in the art. The terms used in the specification herein are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The term "and / or" used herein includes any combination of one or more related listed items.
[0021] Reference Figure 1 The utility model provides a kind of multiphase flow analysis measurement circuit, including electrode array, analog switch switching array, analog front end AFE chip, main microprocessing unit, interface circuit and computer PC end, the output of the electrode array is connected with the first input of the analog switch switching array, the output of the analog switch switching array is connected with the first input of the analog front end AFE chip, the output of the analog front end AFE chip is connected with the input of the main microprocessing unit, the first output of the main microprocessing unit is connected with the second input of the analog front end AFE chip, the second output of the main microprocessing unit is connected with the second input of the analog switch switching array, the third output of the main microprocessing unit is connected with the input of the interface circuit, the interface circuit is connected with the computer PC end each other.
[0022] Further as the preferred embodiment of the utility model, as shown in Figure 2 And Figure 8 The embodiment supports the application circuit of one of process imaging technology, capacitive imaging ECT technology, applied to the visualization monitoring and research of dielectric two-phase flow process. ECT system overall block diagram composition includes: data resources provided by sensor; Hardware design includes electrode interface, excitation generation and setting, electrode state switching, signal conversion and conditioning, digital signal processing, power system design, etc.; Measurement control; Image and data extraction; User interface, etc. Circuit hardware principle block diagram composition includes capacitive sensor and sensor interface switch array, digital signal processing channel, main microcontroller control unit, excitation generation module and data communication module.
[0023] Specifically, as shown in Figure 7 The analog front end AFE chip includes digital potentiometer adjusting module, waveform generator, low-power transimpedance amplifier TIA, first gain resistor R TIA , first gain capacitor C TIA , second gain resistor R FILTER , second gain capacitor C FILTERThe waveform generator, the low-power trans-impedance amplifier, the first gain resistor, the first gain capacitor, the second gain resistor, the second gain capacitor, the analog-to-digital converter, the discrete Fourier transform module, the serial peripheral interface, the crystal oscillator and the sequencer are connected in series.
[0024] Further, as a preferred embodiment of the utility model, a single cheap analog front end (AFE) chip is used to replace a traditional expensive functional module circuit, and the highly integrated AFE function includes a precision AC voltage source, a waveform generator and a low-power digital analog converter (DAC) are used to generate a fixed frequency sine wave, and the frequency and amplitude can be set; a precision differential voltmeter, after the pin connection is set according to the specification, a measurement sequence is started, DFT is performed on the measurement data, the real part and the imaginary part are stored in a FIFO, and the FIFO is read by a host controller. A high-precision ammeter, after the pin connection is set according to the specification, the current passes through a TIA and is measured by an ADC, a measurement sequence is run, and then DFT is performed on the ADC data. The real part and the imaginary part are stored in a FIFO, and the host controller reads the FIFO and performs calculation according to the impedance calculation formula.
[0025] Specifically, the digital potentiometer adjustment module includes a gain amplifier and a digital-to-analog converter, wherein the output end of the digital-to-analog converter is connected with the input end of the gain amplifier.
[0026] Specifically, it further includes an excitation generation module, the output end of the excitation generation module is connected with the third input end of the analog switch switching array, the input end of the excitation generation module is connected with the fourth output end of the host micro processing unit, and the excitation generation module includes a waveform generator, a high-speed digital-to-analog converter and an excitation amplifier.
[0027] Further, as a preferred embodiment of the utility model, the excitation generation module uses a waveform generator, a high-speed DAC and an excitation amplifier to generate a high-frequency excitation signal. The frequency is programmable, and the range is DC to 200KHz. The signal amplitude is programmable, and the maximum can reach ±607mV. The data communication module adopts a four-wire SPI interface, and the signal definition is MISO, MOSI, SCLK and #CS.
[0028] Specifically, such as Figure 4 and Figure 5 As shown, it also includes a voltage measurement module and a current measurement module. Both the voltage measurement module and the current measurement module are connected to the discrete Fourier transform module. The equivalent circuit of the voltage measurement module and the current measurement module includes a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a third resistor R3, a voltmeter, an ammeter, and a transimpedance amplifier. The first terminal of the first capacitor is connected to the first terminal of the second capacitor, the second terminal of the first capacitor is connected to the first terminal of the first resistor, the second terminal of the second capacitor is connected to the first terminal of the second resistor, the second terminal of the first resistor and the first terminal of the voltmeter are connected to the first terminal of the ammeter, the second terminal of the second resistor, the second terminal of the voltmeter, the input terminal of the transimpedance amplifier and the first terminal of the third resistor are connected, and the second terminal of the ammeter and the second terminal of the third resistor are connected to the output terminal of the transimpedance amplifier.
[0029] Further, as a preferred embodiment of this utility model, the voltage measurement module measures the voltage of the excitation signal when a voltage is applied to the sensor. After being configured according to specifications, a DFT (Discrete Fourier Transform) operation is performed on the ADC data using a DFT hardware accelerator to calculate the real and imaginary parts, which are then stored in a data FIFO register. The current measurement module applies the same excitation signal to the sensor, and a high-speed general-purpose amplifier (TIA) converts the current to voltage, which is then read by the ADC (Analog-to-Digital Converter) through the gain resistor RTIA. Similar to the voltage measurement module, a DFT operation is performed on the ADC results, and the real and imaginary parts are stored in a data FIFO register for reading by the main microcontroller.
[0030] Specifically, such as Figure 3 As shown, it also includes a digital logic control circuit and an analog processing channel. The fifth output terminal of the main microprocessor unit is connected to the input terminal of the digital logic control circuit, the sixth output terminal of the main microprocessor unit is connected to the input terminal of the analog processing channel, and the output terminal of the digital logic control circuit is connected to the fourth input terminal of the analog switch array.
[0031] Furthermore, such as Figure 6 As shown, calculate the current-limiting resistor value R. LIMIT Determine the maximum peak voltage Vpp of the AC excitation voltage, and calculate the DC root mean square voltage using the formula. Determine the limiting current I LIMIT To allow 80% of the maximum input current; calculate
[0032] Select the value of the isolation capacitor C. LIMIT ,like Figure 4C1, C2 in C1, C2, Figure 5 C3, C4 in C3, C4; select precision resistor R TIA , as Figure 4 R3 in R3, Figure 7 Gain resistor R of high-speed TIA in TIA ; select precision resistor R CAL , used with high-speed DAC and excitation amplifier, to generate accurate current. R CAL Calibrate high-speed TIA gain resistor.
[0033] Calculate the impedance value Z of the access pin, read the data FIFO by the main microcontroller, and obtain Using Ohm's law, divide the voltage amplitude by the current amplitude; combine R TIA Convert the current measurement value into voltage. Determine the impedance formula of the measured object
[0034] The working principle of the specific embodiment of the utility model is as follows:
[0035] The resistance impedance value is indirectly measured by using the volt-ampere method, which is divided into four steps:
[0036] 1) Precise AC voltage source, use waveform generator, high-speed low-power digital analog converter DAC and excitation amplifier to generate sine wave of specific frequency, frequency programmable, range is DC to 200KHz. Signal amplitude is programmable, highest up to ±607mV.
[0037] 2) Precise differential voltmeter, after pin connection is set according to specification, start measurement sequence, execute DFT to measurement data, real part and imaginary part are stored in FIFO memory, and are read by main controller.
[0038] 3) High-precision ammeter, after pin connection is set according to specification, current is measured by ADC after passing through TIA, measurement sequence is run, then DFT is executed to ADC data. Real part and imaginary part are stored in FIFO memory, and are read by main controller.
[0039] 4) The calculation formula is:
[0040]
[0041] In the above formula, Z UNKNOWN Is the unknown impedance to be measured; Is the unknown impedance voltage; Is the unknown impedance current; Is the size of the unknown impedance voltage; Is the size of the unknown impedance current; r V And i VRe and Im are respectively real and imaginary parts of the voltage DFT measurement; r I Re and Im are respectively real and imaginary parts of the voltage DFT measurement; r I Re and Im are respectively real and imaginary parts of the current DFT measurement.
[0042] The above is a specific description of the preferred embodiment of the utility model, but the utility model is not limited to the described embodiment, and those skilled in the art can make various equivalent modifications or replacements without departing from the spirit of the utility model, and these equivalent modifications or replacements are all included in the range defined by the claims of the present application.
Claims
1. A multiphase flow analysis measurement circuit, comprising: The electrode array, the analog switch switching array, the analog front end (AFE) chip, the main micro-processing unit, the interface circuit and the computer PC end are connected, the output end of the electrode array is connected with the first input end of the analog switch switching array, the output end of the analog switch switching array is connected with the first input end of the analog front end (AFE) chip, the output end of the analog front end (AFE) chip is connected with the input end of the main micro-processing unit, the first output end of the main micro-processing unit is connected with the second input end of the analog front end (AFE) chip, the second output end of the main micro-processing unit is connected with the second input end of the analog switch switching array, the third output end of the main micro-processing unit is connected with the input end of the interface circuit, and the interface circuit and the computer PC end are connected with each other.
2. The multiphase flow analysis measurement circuit of claim 1, wherein, The analog front end (AFE) chip includes a digital potentiometer adjusting module, a waveform generator, a low-power trans-impedance amplifier, a first gain resistor, a first gain capacitor, a second gain resistor, a second gain capacitor, an analog-to-digital converter, a discrete Fourier transform module, a serial peripheral interface, a crystal oscillator and a sequencer, wherein the output end of the waveform generator is connected with the input end of the digital potentiometer adjusting module, the output end of the low-power trans-impedance amplifier, the second end of the first gain resistor and the second end of the first gain capacitor are connected with the first end of the second gain resistor, the second end of the second gain resistor and the first end of the second gain capacitor are connected with the input end of the analog-to-digital converter, the second end of the second gain capacitor is grounded, the output end of the analog-to-digital converter is connected with the first input end of the discrete Fourier transform module, the output end of the discrete Fourier transform module is connected with the serial peripheral interface, the first output end of the crystal oscillator is connected with the second input end of the discrete Fourier transform module, and the second output end of the crystal oscillator is connected with the input end of the sequencer.
3. The multiphase flow analysis measurement circuit of claim 2, wherein, The digital potentiometer adjusting module includes a gain amplifier and a digital-to-analog converter, wherein the output end of the digital-to-analog converter is connected with the input end of the gain amplifier.
4. The multiphase flow analysis measurement circuit of claim 3, wherein, The excitation generating module is further included, the output end of the excitation generating module is connected with the third input end of the analog switch switching array, the input end of the excitation generating module is connected with the fourth output end of the main micro-processing unit, the excitation generating module includes a waveform generator, a high-speed digital-to-analog converter and an excitation amplifier, and the waveform generator, the high-speed digital-to-analog converter and the excitation amplifier are connected in sequence.
5. The multiphase flow analysis measurement circuit of claim 4, wherein, The application also comprises a voltage measurement module and a current measurement module, both of which are connected to the discrete Fourier transform module, and the equivalent circuit of the voltage measurement module and the current measurement module comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a voltmeter, an ammeter and a trans-impedance amplifier, wherein the first end of the first capacitor is connected to the first end of the second capacitor, the second end of the first capacitor is connected to the first end of the first resistor, the second end of the second capacitor is connected to the first end of the second resistor, the second end of the first resistor, the first end of the voltmeter and the first end of the ammeter are connected, the second end of the second resistor, the second end of the voltmeter, the input end of the trans-impedance amplifier and the first end of the third resistor are connected, and the second end of the ammeter, the second end of the third resistor and the output end of the trans-impedance amplifier are connected.
6. The multiphase flow analysis measurement circuit of claim 5, wherein, The application also comprises a digital logic control circuit and an analog processing channel, the fifth output end of the main micro-processing unit is connected to the input end of the digital logic control circuit, the sixth output end of the main micro-processing unit is connected to the input end of the analog processing channel, and the output end of the digital logic control circuit is connected to the fourth input end of the analog switch switching array.