Semiconductor chip structure, electronic device and electronic circuit

Abstract

The utility model provides a semiconductor chip structure, an electronic device and an electronic circuit. The semiconductor chip structure comprises an epitaxial layer, a chip device layer, a first electrode and a second electrode. Wherein the first surface of the epitaxial layer is a roughened surface, the roughened surface is provided with a plurality of hexagonal pyramid microstructures, the width of the bottom of each hexagonal pyramid microstructure is within 0.5-1 micron, the height of each hexagonal pyramid microstructure is within 0.7-1.5 microns, and the thickness of each hexagonal pyramid microstructure is 0.5-1 micron. Compared with a coarsening structure formed by a plurality of large conical structures in the prior art, the coarsening surface can more effectively scatter light, so that the light emitting efficiency is improved.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor device fabrication, and in particular to a semiconductor chip structure, electronic device, and electronic circuit. Background Technology

[0002] The flip-chip consists of, from top to bottom, a sapphire substrate, an N-type semiconductor, a light-emitting layer, a P-type semiconductor layer, and electrodes. The flip-chip emits light from the sapphire substrate. Since the light extraction efficiency of a rough surface is higher than that of a smooth surface, existing technologies often pattern the light-emitting surface of the sapphire substrate to create a roughened structure, thereby improving the chip's light extraction efficiency.

[0003] Generally, the coarsened structure formed by the patterning process includes several conical structures. The bottom width is generally uniformly controlled at 1.9 micrometers to 2.1 micrometers or 1.4 micrometers to 1.6 micrometers or more, and the height is generally 1.7 micrometers to 1.9 micrometers or 1.4 micrometers to 1.6 micrometers or more. The shape is generally large, which results in a relatively low light extraction efficiency.

[0004] Therefore, providing a coarsened structure with high light extraction efficiency has become a technical problem that the industry urgently needs to solve. Utility Model Content

[0005] This invention provides a semiconductor chip structure to solve the problem of generally low light extraction efficiency in the coarsened structure of the prior art.

[0006] According to a first aspect of the present invention, a semiconductor chip structure is provided, comprising:

[0007] The epitaxial layer has a first surface that is roughened, and the roughened surface is provided with a plurality of hexahedral microstructures. The bottom width of each hexahedral microstructure is within 0.5 micrometers to 1 micrometer, and the height of each hexahedral microstructure is within 0.7 micrometers to 1.5 micrometers.

[0008] A chip device layer, wherein the chip device layer is located in a first region on the second surface of the epitaxial layer, and the first surface and the second surface of the epitaxial layer are opposite to each other;

[0009] A first electrode and a second electrode, wherein the first electrode is located on the surface of the chip device layer and the second electrode is located in a second region on a second surface of the epitaxial layer.

[0010] Optionally, the chip device layer includes:

[0011] A light-emitting layer, wherein the light-emitting layer is located in a first region on the second surface of the epitaxial layer;

[0012] A first semiconductor layer is located on the light-emitting layer;

[0013] A metal reflective layer is located on the first semiconductor layer.

[0014] Optionally, the epitaxial layer is an N-type semiconductor layer, the first semiconductor layer is a P-type semiconductor layer, the first electrode is a P-type electrode, and the second electrode is an N-type electrode.

[0015] Optionally, the light-emitting layer is a multi-quantum well.

[0016] Optionally, the materials of the epitaxial layer and the first semiconductor layer are gallium nitride.

[0017] Optionally, the thickness of the semiconductor chip structure is 3 micrometers to 10 micrometers.

[0018] Optionally, the semiconductor chip structure further includes a supporting substrate and a bonding layer; wherein the bonding layer is used to bond the first surface of the epitaxial layer to the supporting substrate.

[0019] Optionally, the supporting substrate may include at least a silicon substrate, a glass substrate, or a sapphire substrate.

[0020] According to a second aspect of the present invention, an electronic device is provided, including the semiconductor chip structure.

[0021] According to a third aspect of the present invention, an electronic circuit is provided, including the aforementioned electronic device.

[0022] Compared with the prior art, the technical solution of this utility model embodiment has the following beneficial effects:

[0023] According to the present invention, a semiconductor chip structure includes an epitaxial layer, a chip device layer, a first electrode, and a second electrode. The first surface of the epitaxial layer is a roughened surface, which has a plurality of hexahedral microstructures. The bottom width of each hexahedral microstructure is within 0.5 micrometers to 1 micrometer, and the height of each hexahedral microstructure is within 0.7 micrometers to 1.5 micrometers. Compared to the roughened structures obtained through patterning in the prior art, the hexahedral microconical structures in the roughened surface are smaller than the conical structures in the prior art, allowing the roughened surface to scatter light more effectively, thereby improving light extraction efficiency.

[0024] Furthermore, the semiconductor chip structure also includes a supporting substrate and a bonding layer, the bonding layer being used to bond the first surface of the epitaxial layer to the supporting substrate. Since the semiconductor chip structure, composed of the epitaxial layer, the chip device layer, the first electrode, and the second electrode, is relatively thin, the supporting substrate can support the semiconductor chip structure, making it less prone to breakage during transportation. Moreover, when the semiconductor chip structure is mounted into a circuit to complete the circuit connection, the bonding layer and the supporting substrate can be easily peeled off, making it a high-efficiency light-emitting device. Attached Figure Description

[0025] Figure 1 This is a cross-sectional schematic diagram of a semiconductor chip structure provided in an embodiment of the present invention;

[0026] Figure 2 This is a cross-sectional view of a flip-chip LED provided in an embodiment of the present invention. Figure 1 ;

[0027] Figure 3 This is a cross-sectional view of a flip-chip LED provided in an embodiment of the present invention. Figure 2 .

[0028] Figure label:

[0029] 1-Epipolar layer;

[0030] 2-Chip device layer;

[0031] 3-First electrode;

[0032] 4-Second electrode;

[0033] 5-bonding layer;

[0034] 6-Supporting substrate;

[0035] 201 - Emissive layer;

[0036] 202 - First semiconductor layer;

[0037] 203-Metallic reflective layer. Detailed Implementation

[0038] The embodiments of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model. The terms "first," "second," "third," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or devices.

[0039] As described in the background art, in order to improve light extraction efficiency, the prior art usually adopts the method of patterning the light extraction surface to form a roughened surface to improve light extraction efficiency.

[0040] Generally, the roughened structure formed by the patterning process includes several conical structures. The bottom diameter is generally uniformly controlled to be above 1.9 micrometers to 2.1 micrometers or 1.4 micrometers to 1.6 micrometers, and the height is generally above 1.7 micrometers to 1.9 micrometers or 1.4 micrometers to 1.6 micrometers. The shape is generally large, which causes excessive total internal reflection during the propagation of light inside the chip, thereby reducing the light extraction efficiency and making the light extraction efficiency of the roughened structure low.

[0041] In view of this, the present invention creatively provides a semiconductor chip structure.

[0042] in, Figure 1 This is a cross-sectional schematic diagram of a semiconductor chip structure provided in an embodiment of the present invention.

[0043] Please refer to Figure 1 The semiconductor chip structure provided in the embodiments of this utility model includes:

[0044] Epitaxial layer 1, the first surface of the epitaxial layer 1 is a roughened surface, the roughened surface is provided with a plurality of hexagonal cone microstructures, the bottom width of each hexagonal cone microstructure is within 0.5 micrometers to 1 micrometer, and the height of each hexagonal cone microstructure is within 0.7 micrometers to 1.5 micrometers;

[0045] Chip device layer 2, the chip device layer 2 is located in a first region on the second surface of the epitaxial layer 1, the first surface and the second surface of the epitaxial layer 1 are opposite to each other;

[0046] The first electrode 3 and the second electrode 4 are located on the surface of the chip device layer 2 and the second electrode 4 is located in the second region on the second surface of the epitaxial layer 1.

[0047] The semiconductor chip structure provided by this invention forms a roughened surface on the first surface of the epitaxial layer, and the roughened surface is provided with a plurality of six-pinion microcone structures. The bottom width of each six-pinion microcone structure is within 0.5 micrometers to 1 micrometer, and the height of each six-pinion microcone structure is within 0.7 micrometers to 1.5 micrometers. Therefore, compared with the roughened structure in the prior art, the six-pinion microcone structures in the roughened surface are smaller than the conical structures in the roughened structure in the prior art. Thus, the number of six-pinion microcone structures on the roughened surface of the same area is greater than the number of conical structures in the prior art, thereby increasing the light-emitting area and reducing total internal reflection of light within the chip, allowing more light to escape from the semiconductor chip structure in the form of scattering, thereby improving the light extraction efficiency.

[0048] To make the above-mentioned objectives, features and beneficial effects of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings.

[0049] in, Figure 2 This is a cross-sectional view of a flip-chip LED provided in an embodiment of the present invention. Figure 1 .

[0050] Please refer to Figure 2 The following explanation uses a flip-chip LED structure to illustrate the beneficial effects of the roughened surface of this invention.

[0051] The epitaxial layer 1 may be, for example, an N-type semiconductor layer, and the chip device layer 2 includes:

[0052] Light-emitting layer 201, wherein the light-emitting layer 201 is located in a first region on the second surface of the epitaxial layer 1;

[0053] The first semiconductor layer 202 is located on the light-emitting layer 201, and the first semiconductor layer 202 is a P-type semiconductor layer. Therefore, the first electrode 3 is a P-type electrode, and the second electrode 4 is an N-type electrode.

[0054] A metal reflective layer 203 is located on the first semiconductor layer 202.

[0055] As an example, the light-emitting layer 201 is a multiple quantum well. Of course, those skilled in the art should realize that there are many other materials for the light-emitting layer 201, and this invention does not limit this to any particular material.

[0056] As an example, the materials of the N-type semiconductor layer and the P-type semiconductor layer can be, for example, gallium nitride. Of course, there are many other materials that can be used for the N-type semiconductor layer and the P-type semiconductor layer, and this invention does not limit them.

[0057] The first electrode 3 and the second electrode 4 are typically made of metal, transparent conductive oxide, or carbon nanomaterials. Their main function is to serve as channels for current input and output, ensuring that current can be efficiently transmitted to the LED chip, thereby achieving light emission. Different electrode materials have different effects on the performance of the LED chip; therefore, the selection of electrode materials needs to be determined based on actual conditions, and this invention does not impose any limitations on this.

[0058] The metal reflective layer 203 is typically made of a highly conductive metal material, such as aluminum, silver, gold, or copper. These metals have high reflectivity and good optical properties, making them suitable for reflection requirements in different wavelength bands. Those skilled in the art can select the material of the metal reflective layer 203 according to the actual situation, and this invention does not limit this selection.

[0059] in, Figure 3 This is a cross-sectional view of a flip-chip LED provided in an embodiment of the present invention. Figure 2 .

[0060] In one specific embodiment, when the materials of the P-type semiconductor layer and the N-type semiconductor layer are gallium nitride, the thickness of the semiconductor chip structure is 3 micrometers to 10 micrometers. Because the semiconductor chip structure is relatively thin, it is easily broken during transportation, making it difficult to transfer.

[0061] Therefore, please refer to Figure 3 The semiconductor chip structure further includes a support substrate 6 and a bonding layer 5. The bonding layer 5 is used to bond the first surface of the epitaxial layer 1 to the support substrate 6. The support substrate 6 supports the semiconductor chip structure composed of the epitaxial layer 1, the chip device layer 2, the first electrode 3, and the second electrode 4, making it less prone to breakage during transportation. Furthermore, when the semiconductor chip structure is mounted into a circuit to complete the circuit connection, the bonding layer 5 and the support substrate 6 can be easily peeled off, making it a high-efficiency light-emitting device.

[0062] As an example, the bonding layer 5 can be made of organic adhesive or dielectric material, allowing it to be dissolved by immersion in a chemical solution. This separates the bonding layer 5 from the supporting substrate 6 and the epitaxial layer 1, enabling the semiconductor chip structure composed of the epitaxial layer 1, the chip device layer 2, the first electrode 3, and the second electrode 4 to become a high-efficiency light-emitting device. Of course, there are many other options for the material of the bonding layer 5 and the method for separating the bonding layer 5 from the supporting substrate 6, and this invention does not limit these options.

[0063] As an example, the supporting substrate 6 can be a silicon substrate, a glass substrate, or a sapphire substrate. Of course, there are many other materials that can be used for the supporting substrate 6, and this invention does not limit this to any particular material.

[0064] The following is Figure 2 Taking the cross-sectional view of the flip-chip LED structure shown below as an example, the working process of the flip-chip LED structure provided by this utility model will be explained:

[0065] Please refer to Figure 2 When the first electrode 3 is connected to the positive terminal of the power supply and the second electrode 4 is connected to the negative terminal of the power supply, the flip-chip LED is forward-biased. The P-type semiconductor layer and the N-type semiconductor layer form a PN junction. When the flip-chip LED is forward-biased, electrons are injected from the N-type semiconductor to the P-type semiconductor, and holes are injected from the P-type semiconductor to the N-type semiconductor. These injected minority carriers recombine with the majority carriers in the opposite region, releasing excess energy as light, thus emitting light. The light-emitting layer 201 between the P-type and N-type semiconductor layers restricts the recombination process of minority and majority carriers, thereby improving luminous efficiency and photon emissivity. Furthermore, the light emitted from the PN junction is reflected by the metal reflective layer 203 and exits from the first surface of the N-type semiconductor. Furthermore, because the first surface of the N-type semiconductor is a roughened surface, and the roughened surface is provided with a plurality of hexagonal microstructures, the bottom width of each hexagonal microstructure is within 0.5 micrometers to 1 micrometer, and the height of each hexagonal microstructure is within 0.7 micrometers to 1.5 micrometers, thereby increasing the light-emitting area and reducing total internal reflection of light within the chip, allowing more light to escape from the flip-chip in the form of scattering. Therefore, the light-emitting efficiency of the flip-chip can be improved.

[0066] In summary, the semiconductor chip structure provided by this utility model includes an epitaxial layer, a chip device layer, a first electrode, and a second electrode. The first surface of the epitaxial layer is a roughened surface, which has a plurality of hexahedral microstructures. The bottom width of each hexahedral microstructure is within 0.5 micrometers to 1 micrometer, and the height of each hexahedral microstructure is within 0.7 micrometers to 1.5 micrometers. Compared to the roughened structures obtained through patterning in the prior art, the hexahedral microconical structures in the roughened surface are smaller than the conical structures in the prior art, allowing the roughened surface to scatter light more effectively, thereby improving light extraction efficiency.

[0067] Furthermore, the semiconductor chip structure also includes a supporting substrate and a bonding layer, the bonding layer being used to bond the first surface of the epitaxial layer to the supporting substrate. Since the semiconductor chip structure, composed of the epitaxial layer, the chip device layer, the first electrode, and the second electrode, is relatively thin, the supporting substrate can support the semiconductor chip structure, making it less prone to breakage during transportation. Moreover, when the semiconductor chip structure is mounted into a circuit to complete the circuit connection, the bonding layer and the supporting substrate can be easily peeled off, making it a high-efficiency light-emitting device.

[0068] This utility model embodiment also provides an electronic device, which includes the semiconductor chip structure.

[0069] This utility model embodiment also provides an electronic circuit, which includes the electronic device.

[0070] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A semiconductor chip structure, characterized in that, include: The epitaxial layer has a first surface that is roughened, and the roughened surface is provided with a plurality of hexahedral microstructures. The bottom width of each hexahedral microstructure is within 0.5 micrometers to 1 micrometer, and the height of each hexahedral microstructure is within 0.7 micrometers to 1.5 micrometers. A chip device layer, wherein the chip device layer is located in a first region on the second surface of the epitaxial layer, and the first surface and the second surface of the epitaxial layer are opposite to each other; A first electrode and a second electrode, wherein the first electrode is located on the surface of the chip device layer and the second electrode is located in a second region on a second surface of the epitaxial layer.

2. The semiconductor chip structure according to claim 1, characterized in that, The chip device layer includes: A light-emitting layer, wherein the light-emitting layer is located in a first region on the second surface of the epitaxial layer; A first semiconductor layer is located on the light-emitting layer; A metal reflective layer is located on the first semiconductor layer.

3. The semiconductor chip structure according to claim 2, characterized in that, The epitaxial layer is an N-type semiconductor layer, the first semiconductor layer is a P-type semiconductor layer, the first electrode is a P-type electrode, and the second electrode is an N-type electrode.

4. The semiconductor chip structure according to claim 3, characterized in that, The light-emitting layer is a multi-quantum well.

5. The semiconductor chip structure according to claim 3, characterized in that, The epitaxial layer and the first semiconductor layer are made of gallium nitride.

6. The semiconductor chip structure according to claim 3, characterized in that, The thickness of the semiconductor chip structure is 3 micrometers to 10 micrometers.

7. The semiconductor chip structure according to any one of claims 1-6, characterized in that, The semiconductor chip structure further includes a supporting substrate and a bonding layer; wherein the bonding layer is used to bond the first surface of the epitaxial layer to the supporting substrate.

8. The semiconductor chip structure according to claim 7, characterized in that, The supporting substrate includes at least a silicon substrate, a glass substrate, or a sapphire substrate.

9. An electronic device, characterized in that, The electronic device includes the semiconductor chip structure as described in any one of claims 1-8.

10. An electronic circuit, characterized in that, The electronic circuit includes the electronic device as described in claim 9.

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