Total dose irradiation resistant high-order temperature compensation band-gap reference voltage source

Abstract

The utility model provides a high-order temperature compensation band-gap reference voltage source resistant to total dose irradiation, and belongs to the technical field of integrated circuits. The total dose irradiation resistant high-order temperature compensation band-gap reference voltage source comprises a bias module, a high-order compensation module and a band-gap core module, wherein the band-gap core module is configured to generate band-gap reference current based on the operational amplifier, the resistor and the diode; the bias module is configured to provide bias voltage for the band gap core module and provide current for the high-order compensation module; and the high-order compensation module is configured to receive the current generated by the bias module and generate compensation current through a metal oxide semiconductor field effect transistor and a bipolar junction transistor which work in a strong inversion region so as to compensate a high-order nonlinear term in the band-gap reference current.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and more specifically, to a high-order temperature-compensated bandgap reference voltage source resistant to total dose irradiation. Background Technology

[0002] A bandgap reference is a critical component in analog and mixed-signal integrated circuit design. It generates a relatively stable reference voltage over a wide temperature range by incorporating voltages with positive and negative temperature coefficients. This characteristic makes it essential for ensuring the consistent performance of modules such as comparators, operational amplifiers, and bias circuits under different temperature and power supply conditions. Especially in applications requiring high-precision measurements, such as analog-to-digital converters / digital-to-analog converters, sensors, and power management controllers, the stability of the bandgap reference directly impacts the overall system performance and measurement accuracy. Its working principle is based on the temperature-dependent bandgap characteristics of silicon. Temperature compensation is achieved through circuit design, providing a highly stable reference potential that is insensitive to temperature changes, which is crucial for maintaining the accuracy and reliability of the circuit system.

[0003] Traditional bandgap voltage reference sources are constructed using operational amplifiers and bipolar junction transistors (BJTs). By appropriately combining negative and positive temperature coefficient voltages generated by BJTs, a stable voltage V with a near-zero temperature coefficient is obtained. REF This ensures stable and reliable operation of the circuit over a wide temperature range. For ordinary first-order compensated bandgap references, their accuracy in practical circuits often fails to meet expectations; therefore, higher-order compensation is required to obtain a more accurate reference voltage. Furthermore, in extreme environments (such as spacecraft, nuclear facilities, and high-energy physics detectors), the reliability of existing bandgap reference voltage sources becomes even more difficult to guarantee.

[0004] Therefore, it is urgent to improve the accuracy and reliability of bandgap reference voltage sources under high-irradiation environments. Utility Model Content

[0005] To address the limitations in accuracy and stability of existing bandgap voltage references, this application provides a bandgap voltage reference that maintains stable and accurate output even under extreme environments, particularly improving the system's reliability and stability under irradiation. Compared to transistors, diodes have several advantages. First, they have a simpler structure, lower leakage current, and lower sensitivity to interface states. While some defects may occur in the oxide layer after total dose irradiation, diodes lack a base region, and these defects have a much smaller impact on diode characteristics compared to transistors. Second, diode current is exponentially related to forward voltage; the current increases after irradiation, but this current change has a smaller impact on diode voltage. Therefore, diodes have a natural advantage over transistors in terms of radiation resistance. These characteristics enable the diode bandgap reference to maintain more stable performance under irradiation. This solution utilizes the radiation tolerance of diodes, combining radiation-resistant circuit design with optimized high-order temperature compensation methods, to not only maintain a stable output voltage of the bandgap voltage reference under total dose irradiation but also achieve high-precision temperature compensation.

[0006] This application provides a high-order temperature-compensated bandgap reference voltage source resistant to total dose irradiation, including a bias module, a high-order compensation module, and a bandgap core module;

[0007] The bandgap core module is configured to generate a bandgap reference current based on an operational amplifier, resistors, and diodes.

[0008] The bias module is configured to provide a bias voltage to the bandgap core module and to supply current to the higher-order compensation module;

[0009] The high-order compensation module is configured to receive the current generated by the bias module and generate compensation current through metal-oxide-semiconductor field-effect transistors and bipolar junction transistors operating in the strong inversion region to compensate for the high-order nonlinear terms in the bandgap reference current.

[0010] Optionally, the bias module includes a first branch, a second branch, a third branch, a fourth branch, and a fifth branch connected in parallel;

[0011] The first branch includes a first PMOS transistor PM1, a third PMOS transistor PM3, a first NMOS transistor NM1, a first resistor R1, and a first diode D1 connected in series.

[0012] The second branch includes a second PMOS transistor M2, a fourth PMOS transistor PM4, a second NMOS transistor NM2, and a second diode D2 connected in series; and...

[0013] The first PMOS transistor PM1, the second PMOS transistor M2, the third PMOS transistor PM3, and the fourth PMOS transistor PM4 form a current mirror to make the currents in the first and second branches equal; the gates of the first NMOS transistor NM1 and the second NMOS transistor NM2 are connected and biased in the saturation region.

[0014] The third branch includes the fifth PMOS transistor PM5, the sixth PMOS transistor PM6, the second resistor R2, and the third diode D3 connected in series.

[0015] The fourth branch includes the seventh PMOS transistor PM7, the ninth PMOS transistor PM9, the third NMOS transistor NM3, and the third resistor R3 connected in series; and the positive terminal of the third diode D3 is connected to one end of the third resistor R3.

[0016] The fifth branch includes the eighth PMOS transistor PM8, the tenth PMOS transistor PM10 and the fourth NMOS transistor NM4 connected in series; and the eighth PMOS transistor PM8, the tenth PMOS transistor PM10, the seventh PMOS transistor PM7 and the ninth PMOS transistor PM9 form a current mirror structure.

[0017] The source of the eighth PMOS transistor PM8 is used to connect to V. DD The drain of the fourth NMOS transistor, NM4, is grounded.

[0018] Optionally, the higher-order compensation module includes a sixth branch, a seventh branch, an eighth branch, and a ninth branch connected in parallel;

[0019] The sixth branch includes the eleventh PMOS transistor PM11, the twelfth PMOS transistor PM12, the fifth NMOS transistor NM5, and the first BJT transistor Q1 connected in series.

[0020] The seventh branch includes the sixth NMOS transistor NM6, the second BJT transistor Q2, and the seventh NMOS transistor NM7; wherein the sixth NMOS transistor NM6 and the second BJT transistor Q2 are connected in series, and the seventh NMOS transistor NM7 and the second BJT transistor Q2 are connected in parallel; and the gate of the seventh NMOS transistor NM7 is connected to the gate of the fourth NMOS transistor NM4.

[0021] The eighth branch includes the thirteenth PMOS transistor PM13 and the third BJT transistor Q3 connected in series;

[0022] The ninth branch includes the fourteenth PMOS transistor PM14, the fifteenth PMOS transistor PM15, and the fourth resistor R4 connected in series.

[0023] Optionally, the bandgap core module includes parallel tenth, eleventh, and twelfth branches and an operational amplifier;

[0024] The tenth branch includes the sixteenth PMOS transistor PM16 connected in series with the fifth resistor R5; and the drain of the sixteenth PMOS transistor PM16 is also used to connect to V. REF One end of the fifth resistor R5 is also connected to one end of the fourth resistor R4;

[0025] The eleventh branch includes the seventeenth PMOS transistor PM17, the seventh resistor R7, the fourth diode D4, and the sixth resistor R6; and the seventeenth PMOS transistor PM17, the seventh resistor R7, and the fourth diode D4 are connected in series, while the sixth resistor R6 is connected in parallel with the seventh resistor R7 and the fourth diode D4.

[0026] The twelfth branch includes the eighteenth PMOS transistor PM18, the fifth diode D5, and the eighth resistor R8; and the eighteenth PMOS transistor PM18 and the fifth diode D5 are connected in series, while the eighth resistor R8 and the fifth diode D5 are connected in parallel.

[0027] The non-inverting input of the operational amplifier is connected to the drain of the seventeenth PMOS transistor PM17, the inverting input is connected to the drain of the eighteenth PMOS transistor PM18, and the output is connected to the gates of the sixteenth PMOS transistor PM16, the seventeenth PMOS transistor PM17, and the eighteenth PMOS transistor PM18.

[0028] Optionally, the width-to-length ratio of the first NMOS transistor NM1 and the second NMOS transistor NM2 is equal.

[0029] Optionally, the unit quantity equivalent ratio of the first diode D1 and the second diode D2 is 2:1.

[0030] Optionally, the gates of the fifth NMOS transistor NM5 and the sixth NMOS transistor NM6 are connected to the drain of the twelfth PMOS transistor PM12, the base of the first BJT transistor Q1 and the base of the second BJT transistor Q2 are connected, and the base of the third BJT transistor Q3 and the collector of the second BJT transistor Q2 are connected, thereby forming a loop to generate a compensation current.

[0031] Optionally, the input current of the sixth NMOS transistor NM6 is equal to the output current of the twelfth PMOS transistor PM12.

[0032] Optionally, the compensation current I comp satisfy:

[0033]

[0034] Where μ(T) is the electron mobility of the MOSFET, and C ox I0 is the capacitance per unit area of ​​the MOSFET gate oxide layer; q is the charge of an electron; I1 and I2 are respectively the capacitance per unit area of ​​the MOSFET gate oxide layer. 11 and I 22The mirror current, I 11 I is the current flowing through the first resistor. 22 The current flowing through the third resistor is I1 = p1I. 11 I2 = p2I 22 Where P1 and P2 are the mirror magnifications of the current mirror, respectively; I Q2 For I Q1 The mirror current, I Q1 This is the collector current of the first BJT transistor Q1. p is the mirror magnification of the current mirror.

[0035] Optionally, the bandgap core module includes a current-mode bandgap circuit.

[0036] The high-order temperature-compensated bandgap reference voltage source provided in this application embodiment has achieved at least the following beneficial effects:

[0037] This application provides bias current to the bandgap core module through a bias module and provides current to the higher-order compensation module. The higher-order compensation module generates compensation current through metal-oxide-semiconductor field-effect transistors and bipolar junction transistors operating in the strong inversion region to compensate for the higher-order nonlinear terms in the bandgap reference current, thereby achieving compensation for the bandgap reference current. At the same time, the embodiments of this application improve the resistance to total dose irradiation by using diodes in the bias module and the bandgap core circuit to generate positive temperature coefficient current and negative temperature coefficient current. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application or the background art, the accompanying drawings used in the embodiments of this application or the background art will be described below.

[0039] Figure 1 This illustration shows a schematic diagram of the compensation logic of a high-order temperature-compensated bandgap reference voltage source provided in an embodiment of this application.

[0040] Figure 2 This illustration shows an optional circuit diagram of a high-order temperature-compensated bandgap reference voltage source provided in an embodiment of this application.

[0041] Figure 3 This illustration shows an optional simulation diagram of the output voltage and compensation voltage of the high-order temperature-compensated bandgap reference voltage source provided in an embodiment of this application. Detailed Implementation

[0042] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0043] It should be noted that when a component is considered to be "connected" to another component, it can be directly connected to and integrated with the other component, or there may be an intervening component present. The terms "mounted," "one end," "the other end," and similar expressions used in this document are for illustrative purposes only.

[0044] With the rapid development of modern electronic technology, especially in fields such as aerospace, military, and nuclear energy, electronic components are required to operate stably under harsh environmental conditions, particularly high-irradiation environments. Under high-irradiation conditions, electronic devices may experience problems including current leakage, parameter drift, and functional failure. To ensure the reliability of systems under irradiation, radiation hardening technology has become one of the key technologies.

[0045] In high-irradiation environments, circuits also need to consider the adverse effects of total dose irradiation (TID). However, for bipolar transistors, after TID irradiation, charges are introduced into the oxide, forming interface states at the Si-SiO2 interface, increasing the surface recombination rate, and raising the leakage current I. CBO Increase, base current I B Increasing the DC gain β decreases, leading to V BE The properties change drastically. And this drastic change cannot be completely eliminated by annealing. Its main manifestations are:

[0046] 1. Current gain (β) decreases

[0047] Irradiation introduces defects such as oxide defects or deep level defects into transistors. These defects affect the efficiency of carrier transport inside the transistor, resulting in a decrease in β. Consequently, the operating point of the transistor may change, causing slower switching speeds or even complete failure.

[0048] 2. Increased reverse saturation current in the base-emitter junction (BE junction)

[0049] Irradiation increases defects in semiconductors, which in turn increase reverse saturation current. This alters the current characteristics of the transistor, affecting its amplification capability. The increased reverse saturation current can also lead to an increase in base current, thus impacting circuit performance.

[0050] 3. Increased leakage current

[0051] Irradiation generates trapping defects in the collector-base junction (CB junction) and base-emitter junction (BE junction) regions of a transistor. These defects alter carrier transport characteristics, leading to an increase in collector and base leakage current. This, in turn, increases the leakage current in the transistor's off-state, resulting in increased static power consumption and potentially affecting high-frequency characteristics.

[0052] In summary, after total dose irradiation, on the one hand, the voltage change with positive temperature coefficient is small, while the voltage change with negative temperature coefficient is large. These two changes cannot be weighted out, leading to V... REF The temperature coefficient deviates significantly from the design value; on the other hand, irradiation causes circuit performance degradation or even failure. In other words, the traditional transistor structure is insufficient to meet the application requirements of a bandgap reference voltage source under irradiation conditions.

[0053] Realization of negative temperature coefficient voltage: Diodes have a negative temperature coefficient, meaning that as the temperature increases, V... D It will decrease. This characteristic can be explained using the band gap theory of semiconductor materials, where...

[0054] The relationship between voltage and temperature for a forward-biased diode is as follows:

[0055]

[0056] In formula (1), Tr is the reference temperature; V GO V is the band voltage of silicon at the reference temperature Tr. D0 (T r ) represents the diode voltage at the reference temperature Tr; μ is the process constant, approximately equal to 4; θ is a coefficient related to the diode current; V T Thermoelectric voltage, Where: k is the Boltzmann constant, with a value of approximately 1.38 × 10⁻⁶. -23 Joules per Kelvin (J / K); T is absolute temperature in Kelvin (K); q is the charge of an electron, approximately 1.6 × 10⁻⁶. -19 Coulomb (C).

[0057] Achieving a positive temperature coefficient voltage: By using two diodes operating at different current densities, a voltage difference (ΔV) proportional to the absolute temperature can be obtained. D Specifically, ΔV D It can be represented as:

[0058]

[0059] In formula (2), k is the Boltzmann constant, which has a value of approximately 1.38 × 10⁻⁶. -23Joules per Kelvin (J / K); T is absolute temperature, in Kelvin (K); q is the charge of an electron, approximately 1.6 × 10⁻⁶. -19 Coulomb (C), I11, and I22 are the currents flowing through D1 and D2, respectively.

[0060] Synthesis of bandgap reference voltage: The negative temperature coefficient voltage V obtained above is used to synthesize the bandgap reference voltage. D and positive temperature coefficient voltage ΔV D With appropriate combinations, a stable voltage V with a temperature coefficient close to zero at a specific temperature (usually room temperature) can be obtained. REF By precisely designing circuit parameters, such as the current density ratio of transistors and the resistance value, a reference voltage output with an extremely low temperature coefficient can be achieved over a wide temperature range.

[0061] In related technologies, V D High-order compensation includes: (1) designing a circuit to generate TlnT, and eliminating V by selecting an appropriate ratio. D (2) Perform Taylor expansion of TlnT and design a circuit to eliminate higher-order terms in the expansion; (3) Perform piecewise linear compensation for nonlinear temperature characteristics; (4) Use devices made of specific materials in the circuit, such as using resistors with different temperature coefficients for compensation.

[0062] In view of this, such as Figure 1 As shown, this application provides a high-order temperature-compensated bandgap reference voltage source, including a bias module, a high-order compensation module, and a bandgap core module; as shown Figure 1 As shown, the bandgap core module is configured to generate a bandgap reference current; the bias module is configured to provide a bias voltage to the bandgap core module and provide current to the higher-order compensation module; the higher-order compensation module is configured to receive the current generated by the bias module and generate a compensation current through a metal-oxide-semiconductor field-effect transistor and a bipolar junction transistor operating in the strong inversion region to compensate for the higher-order nonlinear terms in the bandgap reference current.

[0063] Figure 2 An optional circuit structure for the high-order temperature-compensated bandgap reference voltage source provided in this application is shown. Figure 2 The circuit structure is divided into three parts by dashed lines, from left to right: bias module, high-order compensation module, and bandgap core module. The bias module provided in this application includes a first branch, a second branch, a third branch, a fourth branch, and a fifth branch connected in parallel.

[0064] The first branch includes a first PMOS transistor PM1, a third PMOS transistor PM3, a first NMOS transistor NM1, a first resistor R1, and a first diode D1 connected in series. The second branch includes a second PMOS transistor M2, a fourth PMOS transistor PM4, a second NMOS transistor NM2, and a second diode D2 connected in series. Furthermore, the first PMOS transistor PM1, the second PMOS transistor M2, the third PMOS transistor PM3, and the fourth PMOS transistor PM4 form a current mirror to ensure that the currents in the first and second branches are equal. The gates of the first NMOS transistor NM1 and the second NMOS transistor NM2 are connected and biased in the saturation region. The third branch includes a fifth PMOS transistor PM5, a sixth PMOS transistor PM6, and a third diode D3 connected in series. The fourth branch includes a seventh PMOS transistor PM7, a ninth PMOS transistor PM9, a third NMOS transistor NM3, and a third resistor R3 connected in series. The anode of the third diode D3 is connected to one end of the second resistor R2, and the third diode D3 is also connected to the source of the third NMOS transistor NM3. The fifth branch includes the eighth PMOS transistor PM8, the tenth PMOS transistor PM10, and the fourth NMOS transistor NM4 connected in series; furthermore, the eighth PMOS transistor PM8, the tenth PMOS transistor PM10, the seventh PMOS transistor PM7, and the ninth PMOS transistor PM9 form a current mirror structure. The source of the eighth PMOS transistor PM8 is connected to V. DD The drain of the fourth NMOS transistor NM4 is grounded. Optionally, the gate voltage of the fifth PMOS transistor PM5 is equal to the gate voltage of the first PMOS transistor PM1. Optionally, the gate voltage of the sixth PMOS transistor PM6 is equal to the gate voltage of the second PMOS transistor M2.

[0065] Optionally, the first PMOS transistor PM1, the second PMOS transistor M2, the third PMOS transistor PM3, and the fourth PMOS transistor PM4 constitute a Cascode current mirror, making the currents in the first branch and the second branch equal. In this application, the width-to-length ratios of the first NMOS transistor NM1 and the second NMOS transistor NM2 are equal, i.e. At this point, the drain currents of the first NMOS transistor NM1 and the second NMOS transistor NM2 are equal. According to the current formula:

[0066]

[0067] Therefore, the gate voltage V of the first NMOS transistor NM1 is... GS(NM1) The gate voltage V of the second NMOS transistor NM2 GS(NM2) They are equal. That is... Figure 2 The voltages at points C and D are equal, i.e., V C =V D Therefore, we can conclude that:

[0068] V D1+I 11 R1 = V D2 (4)

[0069] Where I11 is the current flowing through the first resistor R1. Optionally, adjusting the equivalent ratio of the unit quantity of the first diode D1 and the second diode D2 can change their current density. Optionally, the equivalent ratio of the unit quantity of the first diode D1 and the second diode D2 in this application is 2:1, that is, D1 is equivalent to two D2 connected in parallel. Solving formulas (2) and (4) yields: Therefore, I11 is a positive temperature current. The anode voltage V of the third diode in the third branch... D3 The bias current is equal to the voltage across the third resistor R3 in the fourth branch. It is a negative temperature current.

[0070] According to the embodiments of this application, such as Figure 2 As shown, the high-order compensation module includes a sixth branch, a seventh branch, an eighth branch, and a ninth branch connected in parallel. The sixth branch includes an eleventh PMOS transistor PM11, a twelfth PMOS transistor PM12, a fifth NMOS transistor NM5, and a first BJT transistor Q1 connected in series. The seventh branch includes a sixth NMOS transistor NM6, a second BJT transistor Q2, and a seventh NMOS transistor NM7; wherein the sixth NMOS transistor NM6 and the second BJT transistor Q2 are connected in series, and the seventh NMOS transistor NM7 and the second BJT transistor Q2 are connected in parallel; furthermore, the gate of the seventh NMOS transistor NM7 is connected to the gate of the fourth NMOS transistor NM4. The eighth branch includes a thirteenth PMOS transistor PM13 and a third BJT transistor Q3 connected in series; the ninth branch includes a fourteenth PMOS transistor PM14, a fifteenth PMOS transistor PM15, and a fourth resistor R4 connected in series.

[0071] See Figure 2 The fifth NMOS transistor NM5, the sixth NMOS transistor NM6, the first BJT transistor Q1, and the third BJT transistor Q3 form a loop to generate a compensation current I. comp For this loop, according to Kirchhoff's Voltage Law (KVL), we can obtain:

[0072] V GS(NM5) +V BE1 =V GS(NM6) +V BE3 (5)

[0073] We can obtain: ΔV GS(NM5,NM6) =ΔV BE(1,3) (6)

[0074] Furthermore,

[0075] I C1 and I C3 These are the collector currents of the first BJT transistor Q1 and the third BJT transistor Q3, respectively.

[0076] The drain currents of the fifth NMOS transistor NM5 and the sixth NMOS transistor NM6 are respectively:

[0077]

[0078] Among them, U n C represents the electron mobility of the MOSFET. ox The capacitance per unit area of ​​the MOSFET gate oxide layer; and These are the width-to-length ratios of the fifth NMOS transistor NM5 and the sixth NMOS transistor NM6, respectively, and they are equal. Therefore, I DS(NM5) =I DS(NM6) Q1 and Q2 form a current mirror. for Figure 2 At point E in the equation, according to Kirchhoff's Current Law (KCL), we can obtain:

[0079]

[0080] in I1 is the current flowing through the fifth NMOS transistor NM5, and I2 is the current flowing through the seventh NMOS transistor NM7. b3 This represents the current flowing through the base of the third BJT transistor Q3. I1 and I2 are mirror images of the current I. 11 and I 22 Therefore, I1 = p1I 11 Furthermore, I2 = p2I 22 Where P1 and P2 are the mirror magnifications of the current mirror, respectively.

[0081] Combining formulas (8), (9), and (10), we can obtain:

[0082]

[0083] Combining formulas (6), (7), and (11), we can obtain:

[0084]

[0085] Because the base current I of Q3 b3 Very small, therefore

[0086] Simplifying formula (12) yields:

[0087]

[0088] Substituting the expressions for I1 and I2, we get:

[0089]

[0090] Where μ(T) is the electron mobility of the MOSFET, and C ox I0 is the capacitance per unit area of ​​the MOSFET gate oxide layer; q is the charge of an electron; I1 and I2 are respectively the capacitance per unit area of ​​the MOSFET gate oxide layer. 11 and I 22 The mirror current, I 11 I is the current flowing through the first resistor. 22 The current flowing through the third resistor is I1 = p1I. 11 I2 = p2I 22 Where P1 and P2 are the mirror magnifications of the current mirror, respectively; I Q2 For I Q1 The mirror current, I Q1 This is the collector current of the first BJT transistor. p is the mirror magnification of the current mirror.

[0091] From formula (13), we can see that I comp I is an exponential function of absolute temperature T, exhibiting high-order temperature characteristics. comp It can be rationally designed to offset the Tln T term to achieve higher-order compensation.

[0092] According to an embodiment of this application, the bandgap core module includes a tenth branch, an eleventh branch, and a twelfth branch connected in parallel, and an operational amplifier. The tenth branch includes a sixteenth PMOS transistor PM16 connected in series with a fifth resistor R5; and the drain of the sixteenth PMOS transistor PM16 is also used to connect to V. REF V REF This is the bandgap output voltage. The other end of the fifth resistor R5 is also connected to one end of the fourth resistor R4. The eleventh branch includes the seventeenth PMOS transistor PM17, the seventh resistor R7, the fourth diode D4, and the sixth resistor R6; and the seventeenth PMOS transistor PM17, the seventh resistor R7, and the fourth diode D4 are connected in series, while the sixth resistor R6 is connected in parallel with the seventh resistor R7 and the fourth diode D4. The twelfth branch includes the eighteenth PMOS transistor PM18, the fifth diode D5, and the eighth resistor R8; and the eighteenth PMOS transistor PM18 and the fifth diode D5 are connected in series, while the eighth resistor R8 and the fifth diode D5 are connected in parallel. The non-inverting input of the operational amplifier is connected to the drain of the seventeenth PMOS transistor PM17, the inverting input is connected to the drain of the eighteenth PMOS transistor PM18, and the output is connected to the gates of the sixteenth PMOS transistor PM16, the seventeenth PMOS transistor PM17, and the eighteenth PMOS transistor PM18.

[0093] See Figure 2 Operational amplifier EA uses feedback to ensure that the voltages at points A and B in the circuit are the same. Furthermore, the output of the operational amplifier is connected to the gate of the sixteenth PMOS transistor PM16, and the drain output voltage V of the sixteenth PMOS transistor PM16 is... REF At this point, the positive temperature coefficient current is:

[0094]

[0095] The negative temperature coefficient current is:

[0096]

[0097] Bandgap output voltage V REF for:

[0098] V REF =(I P +I N +I comp R5; (17)

[0099] Among them, I P I is the current flowing through the fourth diode D4. N I is the current flowing through the eighth resistor R8. comp To compensate for the current. Combining the aforementioned formula (13), it is easy to see that by adjusting I... comp It can compensate for the bandgap output voltage.

[0100] The high-order temperature-compensated bandgap reference voltage source provided in this application has an output voltage V. REF The change with temperature can be measured by the temperature coefficient TC. The temperature coefficient TC satisfies:

[0101]

[0102] In formula (18), V REFMAX and V REFMIN T represents the maximum and minimum values ​​of the output voltage of this high-order temperature-compensated bandgap reference voltage source, respectively. MAX and T MIN V represents the upper and lower limits of the operating temperature of this high-order temperature-compensated bandgap reference voltage source, respectively. REF This represents a typical output value for this high-order temperature-compensated bandgap reference voltage source. The temperature coefficient is typically expressed in ppm / ℃.

[0103] like Figure 2 As shown, this application provides an example of a high-order temperature-compensated bandgap reference voltage source according to this application. Figure 3The output voltage V of this high-order temperature-compensated bandgap reference voltage source is shown. REF and compensation voltage V comp The temperature characteristic simulation curve is based on... Figure 3 The data shown can be calculated using formula (18) to obtain the output voltage V of the high-order temperature-compensated bandgap reference voltage source provided in this application within a temperature range of -40℃ to 125℃. REF The temperature coefficient is only 1.5ppm / ℃, and the output voltage V REF The voltage remains stable around 0.55V, and the fluctuation does not exceed 0.0052V under a wide temperature range. It is easy to see that the output voltage V of the high-order temperature-compensated bandgap reference voltage source provided in this application is stable. REF The stability and accuracy have been greatly improved.

[0104] In summary, the bias module provided in this application provides bias current to the bandgap core module and current to the higher-order compensation module. The higher-order compensation module generates a compensation current through a loop formed by metal-oxide-semiconductor field-effect transistors (the fifth NMOS transistor NM5 and the sixth NMOS transistor NM6) and bipolar junction transistors (the first BJT transistor Q1 and the third BJT transistor Q3) operating in the strong inversion region. This compensation current is an exponential function of the absolute temperature T, thereby compensating for the higher-order nonlinear terms in the bandgap reference current and achieving higher-precision reference voltage. Furthermore, the embodiments of this application address the problem of poor performance of traditional reference voltage sources after total dose radiation by using diodes in the bias module and the bandgap core circuit to generate positive and negative temperature coefficient currents.

[0105] The above description is merely a specific implementation of the embodiments of this application, but the protection scope of the embodiments of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the embodiments of this application should be included within the protection scope of the embodiments of this application. Therefore, the protection scope of the embodiments of this application should be determined by the protection scope of the claims.

Claims

1. A high-order temperature compensated bandgap reference voltage source resistant to total dose irradiation, characterized in that, The bias module, the high-order compensation module and the bandgap core module are connected in parallel. The bandgap core module is configured to generate a bandgap reference current based on an operational amplifier, a resistor and a diode. The bias module is configured to provide a bias voltage for the bandgap core module and provide a current for the high-order compensation module. The high-order compensation module is configured to receive the current generated by the bias module and generate a compensation current through a metal oxide semiconductor field effect transistor and a bipolar junction transistor working in a strong inverse type region to compensate for high-order nonlinear terms in the bandgap reference current.

2. The high-order temperature-compensated bandgap reference voltage source of claim 1, wherein, The bias module includes a first branch, a second branch, a third branch, a fourth branch and a fifth branch connected in parallel. The first branch includes a first PMOS tube PM1, a third PMOS tube PM3, a first NMOS tube NM1, a first resistor R1 and a first diode D1 connected in series. The second branch includes a second PMOS tube M2, a fourth PMOS tube PM4, a second NMOS tube NM2 and a second diode D2 connected in series. The first PMOS tube PM1, the second PMOS tube M2, the third PMOS tube PM3 and the fourth PMOS tube PM4 form a current mirror to equalize the currents of the first and second branches; the gates of the first NMOS tube NM1 and the second NMOS tube NM2 are connected and biased in the saturation region. The third branch includes a fifth PMOS tube PM5, a sixth PMOS tube PM6, a second resistor R2 and a third diode D3 connected in series. The fourth branch includes a seventh PMOS tube PM7, a ninth PMOS tube PM9, a third NMOS tube NM3 and a third resistor R3 connected in series; and the anode of the third diode D3 is connected to one end of the third resistor R3. The fifth branch includes an eighth PMOS tube PM8, a tenth PMOS tube PM10 and a fourth NMOS tube NM4 connected in series; and the eighth PMOS tube PM8, the tenth PMOS tube PM10, the seventh PMOS tube PM7 and the ninth PMOS tube PM9 form a current mirror structure. The source of the eighth PMOS transistor PM8 is used to be connected to V DD ; the drain of the fourth NMOS transistor NM4 is grounded.

3. The total dose radiation hardened high-order temperature compensated bandgap reference voltage source of claim 2, wherein, The high-order compensation module includes a sixth branch, a seventh branch, an eighth branch and a ninth branch connected in parallel. The sixth branch includes an eleventh PMOS tube PM11, a twelfth PMOS tube PM12, a fifth NMOS tube NM5 and a first BJT tube Q1 connected in series. The seventh branch includes a sixth NMOS tube NM6, a second BJT tube Q2 and a seventh NMOS tube NM7; the sixth NMOS tube NM6 and the second BJT tube Q2 are connected in series, and the seventh NMOS tube NM7 and the second BJT tube Q2 are connected in parallel; and the gate of the seventh NMOS tube NM7 is connected to the gate of the fourth NMOS tube NM4. The eighth branch includes a thirteenth PMOS tube PM13 and a third BJT tube Q3 connected in series. The ninth branch includes a fourteenth PMOS tube PM14, a fifteenth PMOS tube PM15 and a fourth resistor R4 connected in series.

4. The high-order temperature-compensated bandgap reference voltage source of claim 3, wherein, The bandgap core module includes a tenth branch, an eleventh branch and a twelfth branch connected in parallel and an operational amplifier. The tenth branch comprises a sixteenth PMOS transistor PM16 and a fifth resistor R5 connected in series; a drain of the sixteenth PMOS transistor PM16 is further connected to V REF ; one end of the fifth resistor R5 is further connected to one end of the fourth resistor R4; The eleventh branch comprises a seventeenth PMOS transistor PM17, a seventh resistor R7, a fourth diode D4 and a sixth resistor R6; the seventeenth PMOS transistor PM17, the seventh resistor R7 and the fourth diode D4 are connected in series, and the sixth resistor R6 is connected in parallel with the seventh resistor R7 and the fourth diode D4; The twelfth branch comprises an eighteenth PMOS transistor PM18, a fifth diode D5 and an eighth resistor R8; the eighteenth PMOS transistor PM18 and the fifth diode D5 are connected in series, and the eighth resistor R8 is connected in parallel with the fifth diode D5; The non-inverting input terminal of the operational amplifier is connected with the drain of the seventeenth PMOS transistor PM17, the inverting input terminal is connected with the drain of the eighteenth PMOS transistor PM18, and the output terminal is connected with the gate of the sixteenth PMOS transistor PM16, the gate of the seventeenth PMOS transistor PM17 and the gate of the eighteenth PMOS transistor PM18.

5. The high-order temperature compensated bandgap reference voltage source of claim 2, wherein, The width-length ratios of the first NMOS transistor NM1 and the second NMOS transistor NM2 are equal.

6. The high-order temperature compensated bandgap reference voltage source of claim 2, wherein, The unit quantity equivalent ratio of the first diode D1 and the second diode D2 is 2:

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7. The high-order temperature compensated bandgap reference voltage source of claim 3, wherein, The gates of the fifth NMOS transistor NM5 and the sixth NMOS transistor NM6 are connected with the drain of the twelfth PMOS transistor PM12, the base of the first BJT transistor Q1 and the base of the second BJT transistor Q2 are connected; the base of the third BJT transistor Q3 and the collector of the second BJT transistor Q2 are connected; thereby forming a loop to generate a compensation current.

8. The high-order temperature compensated bandgap reference voltage source of claim 3, wherein, The input current of the sixth NMOS transistor NM6 is equal to the output current of the twelfth PMOS transistor PM12.

9. The high-order temperature compensated bandgap reference voltage source of claim 7, wherein, Compensation current I comp satisfies: Wherein, μ (T) is the electron mobility of MOSFET, C ox is the unit area capacitance of MOSFET gate oxide; q is the charge amount of electron; I1 and I2 are the mirror currents of I 11 and I 22 , I 11 is the current flowing through the first resistance, I 22 is the current flowing through the third resistance; I1 = p1I 11 , I2 = p2I 22 , wherein, P1 and P2 are the mirror multiples of the current mirror respectively; I Q2 is the mirror current of I Q1 , I Q1 is the collector current of the first BJT Q1, p is the mirror multiple of the current mirror.

10. The high-order temperature-compensated bandgap reference voltage source of claim 1, wherein, The bandgap core module comprises a current mode bandgap circuit.

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