Semiconductor processing apparatus

Abstract

The utility model discloses a semiconductor processing device. The semiconductor processing apparatus includes a first chamber portion, a second chamber portion movable relative to the first chamber portion between an open position and a closed position. The first cavity part is provided with a first section of groove channel and a second section of groove channel which are formed in the surface of the inner wall of the first cavity part, the second cavity part is provided with a third section of groove channel and a fourth section of groove channel which are formed in the surface of the inner wall of the second cavity part, and the first section of groove channel and the third section of groove channel are communicated and jointly form a first section of edge channel; the second section of groove channel and the fourth section of groove channel are communicated and jointly form a second section of edge channel, one part of the edge of the wafer extends into the first section of edge channel, and the other part of the edge of the wafer extends into the second section of edge channel. And the second-section edge channel and the second-section edge channel are mutually independent. Therefore, high-precision and convenient pollution extraction is carried out on the corresponding edges of the wafer by utilizing the second-section edge channel and the second-section edge channel respectively.

Description

[Technical Field]

[0001] This utility model relates to the field of semiconductor technology, and in particular to a semiconductor processing system and semiconductor processing method thereof. [Background Technology]

[0002] As semiconductor dimensions continue to shrink, impurities inherent in the silicon wafer material itself become a requirement for quality control and monitoring. However, current wafer contamination detection technologies are limited to extracting and detecting impurities on the wafer surface or performing destructive testing on the entire wafer material.

[0003] Chinese patent application No. 201510836143.0 discloses a method for extracting and detecting wafer contamination using a closed channel within a microcavity. The closed channel can only extract and detect surface contamination and bulk metal contamination on the wafer. However, in some applications, it is necessary to extract and detect contamination at the wafer edges separately.

[0004] Chinese patent application No. 201811040519.7 discloses a method and apparatus for processing the outer edge of a semiconductor wafer using edge microprocessing space. However, in some applications, it is impossible or difficult to extract and detect ultra-fine amounts of impurities at the edge of the wafer.

[0005] Therefore, it is necessary to propose a new solution to overcome the problems in the existing technology.

[0006] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. [Utility Model Content]

[0007] The purpose of this invention is to provide a semiconductor processing device and a semiconductor processing method that can extract and detect contaminants and impurities on the edges of wafers with high precision and convenience.

[0008] To achieve the above objectives, the present invention provides a semiconductor processing apparatus, comprising: a first chamber portion; and a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein when the second chamber portion is in the closed position relative to the first chamber portion, a wafer can be accommodated between the first chamber portion and the second chamber portion, and when the second chamber portion is in the open position relative to the first chamber portion, the wafer can be removed or placed in; the first chamber portion has a first groove and a second groove formed on its inner wall surface, and the second chamber portion has a third groove and a fourth groove formed on its inner wall surface; when the second chamber portion is in the closed position relative to the first chamber portion and the wafer is accommodated between the second chamber portion and the first chamber portion, the first groove and the third groove communicate and together form a first edge channel, and the second groove and the fourth groove communicate and together form a second edge channel, wherein the wafer... A portion of the edge of the wafer extends into a first edge channel, and another portion of the edge of the wafer extends into a second edge channel. The second chamber or the first chamber has a first through-hole and a third through-hole connecting the first edge channel to the outside, and a second through-hole and a fourth through-hole connecting the second edge channel to the outside. One of the first and third through-holes serves as the inlet of the first edge channel, and the other through-hole serves as the outlet of the first edge channel. Similarly, one of the second and fourth through-holes serves as the inlet of the second edge channel, and the other through-hole serves as the outlet of the second edge channel. Extraction liquid is driven to enter the first edge channel through its corresponding inlet, flows through the first edge channel, and exits through its corresponding outlet. Similarly, extraction liquid is driven to enter the second edge channel through its corresponding inlet, flows through the second edge channel, and exits through its corresponding outlet.

[0009] Compared with the prior art, in this invention, the driving extractant enters the first edge channel through the corresponding inlet, the extractant flows through the first edge channel and exits through the corresponding outlet, and the driving extractant enters the second edge channel through the corresponding inlet, the extractant flows through the second edge channel and exits through the corresponding outlet. This allows for high-precision and convenient extraction and detection of contaminants and impurities on the edge of the wafer.

[0010] Therefore, it should be understood that this overview is provided only for the purpose of summarizing some embodiments in order to provide a basic understanding of some aspects of the present invention. Thus, the above embodiments are merely examples and should not be construed as limiting the scope or concept of the present invention in any way. The features, appearance, and advantages of the various embodiments will become apparent from the following detailed description and accompanying drawings, which illustrate the principles of some embodiments by way of example. [Attached Image Description]

[0011] The present invention will be more readily understood in conjunction with the accompanying drawings and the following detailed description, wherein the same reference numerals correspond to the same structural components, wherein:

[0012] Figure 1 This is a three-dimensional structural diagram of the first chamber portion in the first embodiment of the present invention;

[0013] Figure 2 This is a top view of the first chamber portion in the first embodiment of the present invention.

[0014] Figure 3 This is a three-dimensional structural diagram of the second chamber in the first embodiment of the present invention;

[0015] Figure 4 This is a top view of the second chamber in the first embodiment of the present invention.

[0016] Figure 5 for Figure 4 Enlarged view of circle A in the image;

[0017] Figure 6 This is a cross-sectional view of the semiconductor processing device in the first embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 4 EE line in the middle;

[0018] Figure 7 for Figure 6 A magnified view of circle B in the image;

[0019] Figure 8 for Figure 6 A magnified view of circle C in the image;

[0020] Figure 9 This is a cross-sectional view of the semiconductor processing device in the first embodiment of the present invention at another location, wherein the cross-sectional lines of this cross-sectional view correspond to... Figure 4 The FF line in the middle;

[0021] Figure 10 for Figure 9 A magnified view of circle D in the image;

[0022] Figure 11 This is a cross-sectional view of the semiconductor processing device in the first embodiment of the present invention at another location, wherein the cross-sectional lines of this cross-sectional view correspond to... Figure 4 GG line in the middle;

[0023] Figure 12 for Figure 11 A magnified view of circle H in the image;

[0024] Figure 13 This is a schematic diagram of the edge channel and related structures of the semiconductor processing device in this utility model.

[0025] Figures 14-15 for Figure 13 A schematic diagram illustrating the working principle of the edge channels and related structures in the diagram.

[0026] Figure 16 This is a schematic flowchart of the semiconductor processing method in the first embodiment of the present invention.

[0027] Figure 17 This is a three-dimensional structural diagram of the first chamber portion in the second embodiment of the present invention;

[0028] Figure 18 for Figure 17 A top view of the first chamber section is shown.

[0029] Figure 19 This is a three-dimensional structural diagram of the second chamber in the second embodiment of the present invention;

[0030] Figure 20 for Figure 19 A top view of the second chamber section;

[0031] Figure 21 for Figure 20 A magnified view of circle L in the image;

[0032] Figure 22 for Figure 20 An enlarged view of circle M in the image;

[0033] Figure 23 This is a cross-sectional view of the semiconductor processing device in the second embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 20 The XX line in the middle;

[0034] Figure 24 for Figure 23 A magnified view of circle N in the image;

[0035] Figure 25 This is a cross-sectional view of the semiconductor processing device in the second embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 20 The YY line in the middle;

[0036] Figure 26 for Figure 25 A magnified view of circle O in the image;

[0037] Figure 27This is a cross-sectional view of the semiconductor processing device in the second embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 20 The ZZ line in the middle;

[0038] Figure 28 for Figure 27 A magnified view of circle P in the image;

[0039] Figures 29-30 for Figure 25 A schematic diagram illustrating the working principle of the first and second edge channels in the semiconductor processing device shown.

[0040] Figure 31 This is a schematic flowchart of the semiconductor processing method in the second embodiment of the present invention. [Specific Implementation Examples]

[0041] The following describes some embodiments of the present invention more fully with reference to the accompanying drawings, which list some, but not all, embodiments. In fact, various embodiments of the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make the present invention thorough and complete, and to fully convey the scope of the present invention to those skilled in the art. For example, unless otherwise stated, referring to something as first, second, etc., should not be construed as implying a particular order. Furthermore, something may be described as being above something (unless otherwise stated) but is actually below something, and vice versa; similarly, something described as being on the left may be on the right, and vice versa. The same reference numerals always denote the same element.

[0042] First Embodiment

[0043] This invention provides a semiconductor processing device that can efficiently and conveniently extract and detect contaminants and impurities at the edges of wafers.

[0044] Figure 6 This is a cross-sectional schematic diagram of the semiconductor processing apparatus in the first embodiment of the present invention. Figure 6As shown, the semiconductor processing device 100 includes a first chamber portion 110 and a second chamber portion 120 movable relative to the first chamber portion 110 between an open position and a closed position. In this embodiment, the first chamber portion 110 is an upper chamber portion, and the second chamber portion 120 is a lower chamber portion, the lower chamber portion being driven to move up and down such that the second chamber portion 120 moves relative to the first chamber portion 110 between an open position and a closed position. In another embodiment, the first chamber portion 110 may also be a lower chamber portion, and the second chamber portion 120 may be an upper chamber portion, the upper chamber portion being driven to move up and down such that the second chamber portion 120 moves relative to the first chamber portion 110 between an open position and a closed position. The movement between the second chamber portion 120 and the first chamber portion 110 is relative; either the second chamber portion 120 or the first chamber portion 110 may be moving. When the second chamber portion 120 is in the closed position relative to the first chamber portion 110, the wafer 200 can be accommodated between the first chamber portion 110 and the second chamber portion 120. When the second chamber portion 120 is in the open position relative to the first chamber portion 110, the wafer 200 can be removed or placed in.

[0045] Figure 1 This is a three-dimensional structural diagram of the first chamber portion 110 in one embodiment of the present invention; Figure 2 This is a top view of the first chamber 110 in one embodiment of the present invention. Figure 3 This is a three-dimensional structural diagram of the second chamber 120 in one embodiment of the present invention. Figure 4 This is a top view of the second chamber 120 in one embodiment of the present invention. Figure 5 for Figure 4 Enlarged view of circle A in the image. Figure 6 This is a cross-sectional view of a location of the semiconductor processing device in one embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 4 EE line in the middle; Figure 7 for Figure 6 A magnified view of circle B in the image; Figure 8 for Figure 6 Enlarged view of circle C in the image. Figure 9 This is a cross-sectional view of the semiconductor processing apparatus of the present invention at another location in one embodiment, wherein the cross-sectional lines of this cross-sectional view correspond to... Figure 4 The FF line in the middle; Figure 10 for Figure 9 Enlarged view of circle D in the image. Figure 11 This is a cross-sectional view of the semiconductor processing apparatus of the present invention at another location in one embodiment, wherein the cross-sectional lines of this cross-sectional view correspond to... Figure 4The GG line in the middle. Figure 12 for Figure 11 Enlarged view of circle H in the image. Figure 13 This is a schematic diagram of the edge channel and related structures of the semiconductor processing device in this utility model. Figures 14-15 for Figure 13 A schematic diagram illustrating the working principle of the edge channel and related structures in the diagram. Figure 16 This is a schematic flowchart of one embodiment of the semiconductor processing method of this utility model.

[0046] Combination Figure 1-12 As shown, the first chamber portion 110 has a first groove 111 formed on its inner wall surface, and the second chamber portion 120 has a second groove 121 formed on its inner wall surface. Figure 7 , 8 As shown in Figures 1 and 10, when the second chamber portion 120 is in the closed position relative to the first chamber portion 110 and the wafer 200 is accommodated between the second chamber portion 120 and the first chamber portion 110, the first groove channel 111 and the second groove channel 121 are connected and together form an edge channel 130, and the edge 210 of the wafer 200 extends into the edge channel 130.

[0047] In one embodiment, such as Figure 3 , 4 As shown in Figures 5, 8, and 12, the second chamber portion 120 has a first through hole 122, a second through hole 123, and a third through hole 124 communicating the edge channel 130 with the outside, and an isolation protrusion 125 located between the first through hole 122 and the second through hole 123. The first through hole 122 and the second through hole 123 are arranged adjacent to each other. Figures 13-15 As shown, the extract that enters the edge channel 130 through the first through hole 122 flows from the first through hole 122 to the third through hole 124 and flows out from the third through hole 124, and the extract that enters the edge channel 130 through the second through hole 123 flows from the second through hole 123 to the third through hole 124 and flows out from the third through hole 124.

[0048] like Figure 5 , 8 As shown in Figure 13, the isolation protrusion 125 blocks the edge channel 130 so that the edge channel 130 forms an unclosed annulus. The edge channel between the first through hole 122 and the third through hole 124 is referred to as the first edge channel 131, and the edge channel between the second through hole 123 and the third through hole 124 is referred to as the second edge channel 132.

[0049] In one embodiment, the first through hole 122 and the second through hole 123 are located on one side of the edge channel, and the third through hole 124 is located on the other side of the edge channel. Preferably, in Figure 13In this embodiment, the length of the first edge channel 131 is equal to the length of the second edge channel 132. Of course, in other embodiments, the lengths of the first edge channel 131 and the second edge channel 132 may not be equal.

[0050] In one embodiment, the semiconductor processing device 100 can be used to extract contaminants from the edge 210 of the wafer 200. Figure 16 This is a schematic flowchart of a semiconductor processing method 500 in one embodiment of the present invention. The semiconductor processing method 500 utilizes the semiconductor processing apparatus 100 to extract contaminants from the edge 210 of the wafer 200. The semiconductor processing method 500 includes the following steps.

[0051] Step 510, as follows Figure 14 As shown, the first extract 141 is driven to enter the first edge channel 131 through the first through hole 122, and the second extract 142 is driven to enter the second edge channel 132 through the second through hole 123. Due to the tension, both the first extract 141 and the second extract 142 can fill the corresponding positions of their respective edge channels.

[0052] Step 520: In one embodiment, as... Figure 15 As shown, when the second extract 142 is located within the second edge channel 132, driving gas is introduced into the first edge channel 131 through the first through hole 122 to drive the first extract 141 to the third through hole 124 and recover the first extract 141 through the third through hole 124. Then, the third liquid (not shown) is driven through the first through hole into the first edge channel 131 (and...). Figure 12 In the first segment of extract 141 located in the same position, due to tension, the third segment of liquid can fill the corresponding position of its edge channel. Then, driving gas is introduced into the second edge channel 132 through the second through-hole 123 to drive the second segment of extract 142 to the third through-hole 124, and the second segment of extract 142 is recovered through the third through-hole 124. In another alternative embodiment, when the first segment of extract 141 is located in the first edge channel 131, driving gas is introduced into the second edge channel 132 through the second through-hole 123 to drive the second segment of extract 142 to the third through-hole 124, and the second segment of extract 142 is recovered through the third through-hole 124. Then, a fourth segment of liquid (not shown) is driven into the second edge channel 132 through the second through-hole 123 (and...). Figure 12The second section of extract 142 is located at the same position. Due to the tension, the fourth section of liquid can fill the corresponding position of the edge channel where it is located. Then, driving gas is introduced into the first section edge channel 131 through the first through hole 122 to drive the first section of extract 141 to the third through hole 124 and recover the first section of extract 141 through the third through hole 124.

[0053] Step 530: Detect contaminants based on the recovered first extract, the recovered second extract, or a mixture of the recovered first and second extracts. That is, contaminant detection can be performed on either the recovered first or second extract alone, or the recovered first and second extracts can be mixed and then the mixture can be tested for contaminants. The contaminants can be metallic contaminants, also known as metallic impurities, or of other types.

[0054] Step 540: In one embodiment, after recovering both the first extract 141 and the second extract 142, driving gas is introduced through the first through-hole 122 into the first edge channel 131 to drive the third liquid to the third through-hole 124, and the waste liquid is recovered through the third through-hole 124. In another embodiment, driving gas can be introduced through the second through-hole 123 into the second edge channel 132 to drive the fourth liquid to the third through-hole 124, and the waste liquid is recovered through the third through-hole 124. In yet another embodiment, a negative pressure is provided at the third through-hole 124 so that either the third or fourth liquid is recovered into the waste liquid bottle. It should be noted that the third and fourth liquids do not exist simultaneously; only one or the other liquid is present.

[0055] To obtain more extract, steps 510-520 and 540 can be repeated, so that multiple first-stage extracts can flow sequentially through the first-stage edge channel 131, and multiple second-stage extracts can flow sequentially through the second-stage edge channel 132.

[0056] Prior to step 510, the semiconductor processing method 500 further includes:

[0057] Hydrofluoric acid mixed gas is introduced into the first edge channel 131 and the second edge channel 132 through the first through hole 122 and the second through hole 123 respectively, and the waste gas is recovered through the third through hole 124 to etch the edge of the wafer 200, making it easier to extract contaminants in the future.

[0058] When the first extraction solution 141 is driven to flow from the first through-hole 122 to the third through-hole 124, the first extraction solution 141 flows through a portion of the edge of the wafer 200 extending into the first edge channel 131 to extract contaminants on this portion of the edge of the wafer 200. When the second extraction solution 142 is driven to flow from the second through-hole 123 to the third through-hole 124, the second extraction solution 142 flows through a portion of the edge of the wafer 200 extending into the second edge channel 132 to extract contaminants on this portion of the edge of the wafer 200. Specifically, the extraction solution can dissolve and remove the contaminants by undergoing a physical or chemical reaction with them.

[0059] like Figure 14 As shown, after driving the first segment of extract 141 through the first through-hole 122 into the first segment edge channel 131, the first segment of extract 141 stops at a first position. After driving the third segment of liquid through the first through-hole 122 into the first segment edge channel 131, the third segment of extract stops at a first position, which is the location of the first through-hole 122. After driving the second segment of extract 142 through the second through-hole 123 into the second segment edge channel 132, the second segment of extract 142 stops at a second position. After driving the fourth segment of liquid through the second through-hole 123 into the second segment edge channel 132, the fourth segment of liquid stops at a second position, which is the location of the second through-hole 123.

[0060] The first extract 141 and the third liquid (if any) provide a liquid seal at a first location in the edge channel to prevent the driving gas from passing through the first location when the driving gas is introduced through the second through-hole. The second extract 142 and the fourth liquid (if any) provide a liquid seal at a second location in the edge channel to prevent the gas from passing through the second location when the driving gas is introduced through the first through-hole.

[0061] If, during the process of driving the first extract 141 to the third through-hole 124 by introducing driving gas into the first edge channel 131 through the first through-hole 122, there is no second extract 142 located within the second edge channel 132, then due to the lack of a sealing effect from the second extract 142, some of the driving gas will pass through the gap between the isolation protrusion 125 and the first chamber portion 110 and enter the second edge channel 132. This would make it impossible to precisely control the forward speed of the first extract 141, and might even prevent the first extract 141 from reaching the third through-hole 124. If the first through-hole 122 and the second through-hole 123 are combined into a single through-hole, i.e., the edge channel 130 forms a complete ring, it becomes impossible to precisely control the movement of a segment of extract along the edge channel 130.

[0062] In one embodiment, the volumes of the first, second, third, and fourth extracts are all less than 3 ml. For example, the first and second extracts can be 0.5 mL each, resulting in a total volume of 1 mL for subsequent detection and calculation. The volumes of the first and second extracts are equal, forming a first edge channel 131 and a second edge channel 132, allowing for mixing of the first and second extracts to calculate contaminants on the edge 210 of the wafer 200. In this invention, the volume of each extract is very small, which increases the concentration of contaminants and thus improves the detection limit.

[0063] In this invention, the edge channel 130 is a closed channel, ensuring that the extract entering the edge channel 130 through the first through-hole 122 can only flow along the edge channel 130 from the first through-hole 122 to the third through-hole 124, and that the extract entering the edge channel 130 through the second through-hole 123 can only flow along the edge channel from the second through-hole 123 to the third through-hole 124. The flow rate of the extract in the edge channel 130 is less than 5 ml / min, for example, 3 ml / min. In this invention, the first stage extract 141 and the second stage extract 142 can be controlled to travel slowly and uniformly along the edge channel 130, allowing sufficient time for the extract to react with contaminants on the edge of the wafer.

[0064] like Figure 1 , 2 As shown in Figures 7 and 8, the first chamber portion 110 has a fourth through-hole 112 opposite to the third through-hole 124 and a fifth through-hole 113 opposite to the isolation protrusion 125. After the extractant enters the third through-hole 124, driving gas is introduced through the fourth through-hole 112 to allow the extractant to leave the edge channel 130 more quickly. When extracting contaminants from the edge 210 of the wafer 200, gas is introduced inward through the fifth through-hole 113 to maintain a certain gas pressure, preventing the driving gas entering through the first through-hole 122 from entering the second edge channel 132 through the isolation protrusion 125, and preventing the driving gas entering through the second through-hole 123 from entering the first edge channel 131 through the isolation protrusion 125.

[0065] like Figure 7 and 13 As shown, the third through hole 124 includes a groove joint 1241 communicating with the edge channel 130 and a through hole tube 1242 communicating with the groove joint. The groove joint 1241 serves as the funnel opening of the through hole tube 1242, which makes it easier to collect the extract and prevents the flowing extract from overflowing the third through hole 124.

[0066] Second Embodiment

[0067] Figure 23 This is a cross-sectional schematic diagram of the semiconductor processing apparatus in the second embodiment of this utility model. Figure 23 As shown, the semiconductor processing apparatus 300 includes a first chamber portion 310 and a second chamber portion 320 movable relative to the first chamber portion 310 between an open position and a closed position. Further detailed description of the semiconductor processing apparatus 300 can be found in the description of the semiconductor processing apparatus 100, and identical parts will not be described again.

[0068] Figure 17 This is a three-dimensional structural diagram of the first chamber in the second embodiment of the present invention. Figure 18 This is a top view of the first chamber in the second embodiment of the present invention. Figure 19 This is a three-dimensional structural diagram of the second chamber in the second embodiment of the present invention. Figure 20 This is a top view of the second chamber in the second embodiment of the present invention. Figure 21 for Figure 20 An enlarged view of circle L in the image. Figure 22 for Figure 20 An enlarged view of circle M in the image. Figure 23 This is a cross-sectional view of the semiconductor processing device in the second embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 20 The XX line in the middle; Figure 24 for Figure 23 A magnified view of circle N in the image; Figure 25 This is a cross-sectional view of the semiconductor processing device in the second embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 20 The YY line in the middle; Figure 26 for Figure 25 A magnified view of circle O in the image; Figure 27 This is a cross-sectional view of the semiconductor processing device in the second embodiment of the present invention, wherein the cross-sectional lines of the cross-sectional view correspond to... Figure 20 The ZZ line in the middle; Figure 28 for Figure 27 A magnified view of circle P in the image; Figures 29-30 for Figure 25 A schematic diagram illustrating the working principle of the first and second edge channels in the semiconductor processing device shown.

[0069] Combination Figure 17-30As shown, the first chamber portion 310 has a first groove channel 311, a second groove channel 315 formed on its inner wall surface, and an annular rib 314 located outside the first groove channel 311 and the second groove channel 315. The second chamber portion 320 has a third groove channel 321, a fourth groove channel 328 formed on its inner wall surface, a wafer positioning portion 329 formed in the middle of the third groove channel 321 and the fourth groove channel 328, and an annular groove 341 located outside the third groove channel 321 and the fourth groove channel 328. Figure 23-28 As shown, when the second chamber portion 320 is in the closed position relative to the first chamber portion 310 and the wafer 200 is accommodated between the second chamber portion 320 and the first chamber portion 310, the annular rib 314 and the annular groove 341 cooperate with each other, the wafer positioning portion 329 positions the wafer 200, the first groove channel 311 and the third groove channel 321 are connected and together form the first edge channel 331, the second groove channel 315 and the fourth groove channel 328 are connected and together form the second edge channel 332. A portion of the edge of the wafer 200 extends into the first edge channel 331, and another portion of the edge of the wafer 200 extends into the second edge channel 332. The wafer positioning portion 329 does not affect the flow of fluid through the first edge channel 331 and the second edge channel 332.

[0070] In the second embodiment, the second chamber portion 320 has a first through hole 322 and a third through hole 324 communicating the first edge channel 331 with the outside, and a second through hole 323 and a fourth through hole 326 communicating the second edge channel 332 with the outside, a first isolation protrusion 325 located between the first through hole 322 and the second through hole 323, and a second isolation protrusion 327 located between the third through hole 324 and the fourth through hole 326. The first through hole 322 and the second through hole 323 are arranged adjacent to each other, and the third through hole 324 and the fourth through hole 326 are arranged adjacent to each other. The first isolation protrusion 325 and the second isolation protrusion 327 prevent the first edge channel 331 and the second edge channel 332 from closing into an annular shape.

[0071] In one embodiment, one of the first through holes 322 and the third through hole 324 serves as the inlet of the first edge channel 331, the other through hole 322 and the third through hole 324 serves as the outlet of the first edge channel 331, one of the second through holes 323 and the fourth through hole 326 serves as the inlet of the second edge channel 332, and the other through hole 323 and the fourth through hole 326 serves as the outlet of the second edge channel.

[0072] like Figures 29-30As shown, the driving extract enters the first edge channel 331 through the corresponding inlet, flows through the first edge channel 331 and exits through the corresponding outlet, and the driving extract enters the second edge channel 332 through the corresponding inlet, flows through the second edge channel 332 and exits through the corresponding outlet. Figures 29-30 In the preferred embodiment shown, the first through hole 322 serves as the inlet of the first edge channel 331, the third through hole 324 serves as the outlet of the first edge channel 331, the fourth through hole 326 serves as the inlet of the second edge channel 332, and the second through hole 323 serves as the outlet of the second edge channel 332. In other embodiments, the third through hole 324 may serve as the inlet of the first edge channel 331, and the second through hole 323 may serve as the inlet of the second edge channel 332.

[0073] Preferably, the through hole serving as the inlet of the first edge channel 331 is adjacent to the through hole serving as the outlet of the second edge channel 332, and the through hole serving as the outlet of the first edge channel 331 is adjacent to the through hole serving as the inlet of the second edge channel 332. In this way, the flow direction of the extract in the first edge channel 331 and the flow direction of the extract in the second edge channel 332 can both be clockwise or counterclockwise, which makes the control of the extract more precise and easier.

[0074] Preferably, the length of the first edge channel 331 and the length of the second edge channel 332 are equal. Of course, in other embodiments, the lengths of the first edge channel 331 and the second edge channel 332 may not be equal.

[0075] In one embodiment, the semiconductor processing device 300 can be used to extract contaminants from the edges of the wafer 200. Figure 31 This is a schematic flowchart of the semiconductor processing method 600 in a second embodiment of the present invention. The semiconductor processing method 600 utilizes the semiconductor processing apparatus 300 to extract contaminants from the edges of the wafer 200. The semiconductor processing method 600 includes the following steps.

[0076] Step 610, as follows Figure 29 As shown, the first segment extract 351 is driven to enter the first segment edge channel 331 through the corresponding inlet, and the second segment extract 352 is driven to enter the second segment edge channel 332 through the corresponding inlet. Due to the tension, both the first segment extract 351 and the second segment extract 352 can fill the corresponding positions of their respective segment edge channels.

[0077] Step 620: In one embodiment, as... Figure 30As shown, when the second extract 352 is located in the second edge channel 332, driving gas is introduced into the first edge channel 331 through the corresponding inlet to drive the first extract 351 to the corresponding outlet and recover the first extract 351 through the corresponding outlet. Then, the third liquid is driven into the first edge channel through the corresponding inlet. Due to the tension, the third liquid can fill the corresponding position of the first edge channel where it is located. Then, driving gas is introduced into the second edge channel 332 through the corresponding inlet to drive the second extract 352 to the corresponding outlet and recover the second extract 352 through the corresponding outlet. In another alternative embodiment, when the first extract 351 is located within the first edge channel 331, a driving gas is introduced into the second edge channel 332 through the corresponding inlet to drive the second extract 352 to the corresponding outlet and recover the second extract 352 through the corresponding outlet. Then, a fourth liquid is driven into the second edge channel 332 through the corresponding inlet. Due to surface tension, the fourth liquid can fill its corresponding position in the second edge channel 332. Subsequently, driving gas is introduced into the first edge channel 331 through the corresponding inlet to drive the first extract 351 to the corresponding outlet and recover the first extract through the corresponding outlet. The driving gas can be nitrogen or other gases.

[0078] Step 630: Contaminant detection is performed on the recovered first extract 351, or the recovered second extract 352, or a mixture of the recovered first extract 351 and the recovered second extract 352. That is, contaminant detection can be performed on either the recovered first extract or the recovered second extract alone, or the recovered first extract and the recovered second extract can be mixed and then the mixture can be used for contaminant detection. The contaminant can be a metallic contaminant, also referred to as a metallic impurity, or of other types.

[0079] Step 640: In one embodiment, after recovering both the first extract 351 and the second extract 352, a driving gas is introduced into the edge channel of the first segment through the corresponding inlet to drive the third liquid to the corresponding outlet, and the waste liquid is recovered through the corresponding outlet. Alternatively, a driving gas is introduced into the edge channel of the second segment through the corresponding inlet to drive the fourth liquid to the corresponding outlet, and the waste liquid is recovered through the corresponding outlet. It should be noted that the third and fourth liquids do not coexist; either the third liquid or the fourth liquid is present.

[0080] To obtain more extract, steps 610-620 and 640 can be repeated, so that multiple first-stage extracts 351 can flow through the first-stage edge channel 331 in sequence, and multiple second-stage extracts 352 can flow through the second-stage edge channel 332 in sequence.

[0081] Prior to step 610, the semiconductor processing method 600 further includes:

[0082] Hydrofluoric acid mixed gas is introduced into the first edge channel 331 and the second edge channel 332 respectively, and the waste gas is recovered through the corresponding outlets to etch the edges of the wafer 200, making subsequent extraction of contaminants easier. The hydrofluoric acid mixed gas will chemically react with the natural oxide layer on the edge surface of the wafer.

[0083] As the first extraction solution 351 is driven from the inlet to the corresponding outlet of the first edge channel 331, it flows through the portion of the wafer 200 extending into the first edge channel 331 to extract contaminants from this portion of the wafer 200's edge. As the second extraction solution 352 is driven from the inlet to the corresponding outlet of the second edge channel 332, it flows through the portion of the wafer 200 extending into the second edge channel 332 to extract contaminants from this portion of the wafer 200's edge. Specifically, the extraction solution can dissolve and remove the contaminants through a physical or chemical reaction.

[0084] like Figure 29 As shown, after driving the first segment of extract 351 into the first edge channel 331 through its corresponding inlet, the first segment of extract stops at a first position. After driving the third segment of liquid into the first edge channel 331 through its corresponding inlet, the third segment of extract stops at a first position, which is the location of the inlet of the first edge channel 331. After driving the second segment of extract 352 into the second edge channel 332 through its corresponding inlet, the second segment of extract stops at a second position. After driving the fourth segment of liquid into the second edge channel 332 through its corresponding inlet, the fourth segment of liquid stops at a second position, which is the location of the inlet of the second edge channel.

[0085] The first extract 351 and the third liquid (if any) provide a liquid seal at a first position of the first edge channel to prevent gas from passing through the first position; the second extract 352 and the fourth liquid (if any) provide a liquid seal at a second position of the second edge channel to prevent gas from passing through the second position.

[0086] If, during the process of introducing driving gas into the first edge channel 331 to drive the first extract 351 to the corresponding outlet, there is no second extract 352 located in the second edge channel 332, then due to the lack of a sealing effect of the second extract 352, some of the driving gas will pass through the gap between the first isolation protrusion 325 and the first chamber portion 110 and enter the second edge channel 352. In this way, the forward speed of the first extract 351 cannot be precisely controlled, and it may even cause the first extract 351 to fail to advance to the corresponding outlet or its forward speed to be uncontrollable.

[0087] In one embodiment, the volumes of the first, second, third, and fourth extracts are all less than 3 ml. For example, the first and second extracts can be 0.5 mL each, resulting in a total volume of 1 mL for subsequent detection and calculation. The volumes of the first and second extracts are equal, with first edge channel 331 and second edge channel 332 used to mix the first and second extracts to calculate contaminants on the edge 210 of the wafer 200. In this invention, the volume of each extract is very small, which increases the concentration of contaminants, thereby improving the detection limit and achieving high-precision detection of trace elements. Both the first and second extracts can be quantified to a predetermined volume using a quantitative loop, allowing for precise control of their volumes.

[0088] In this invention, the first and second edge channels are closed channels, ensuring that the extract entering the first edge channel 331 can only flow from the inlet to the corresponding outlet along the first edge channel 331, and the extract entering the second edge channel 332 can only flow from the inlet to the corresponding outlet along the second edge channel. The flow rate of the extract in each edge channel is 3–20 ml / min, for example, 3 ml / min or 5 ml / min. This invention allows the first extract 351 and the second extract 352 to move slowly and uniformly along the first and second edge channels, providing sufficient time for the extract to react with contaminants on the edge of the wafer.

[0089] like Figure 23 and 24As shown, the inner wall surface of the first chamber portion 110 contacts the first isolation protrusion 325 and the second isolation protrusion 327, thus completely isolating the first and second edge channels. However, even so, gas may still pass through the gap between the first isolation protrusion 325 and the second isolation protrusion 327 and the inner wall surface of the first chamber portion 110. Before the extractant can advance in one of the edge channels, the other edge channel needs to be sealed with liquid.

[0090] This allows for the efficient and convenient extraction and detection of contaminants and impurities at the edges of wafers.

[0091] The details of this utility model can be more clearly understood by referring to the accompanying drawings and the description of specific embodiments. However, the specific embodiments of this utility model described herein are only for explaining the purpose of this utility model and should not be construed as limiting this utility model in any way. Under the teachings of this utility model, those skilled in the art can conceive of any possible modifications based on this utility model, and these should all be considered to fall within the scope of this utility model. It should be noted that when an element is referred to as being "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or there may be an intervening element. The terms "mounted," "connected," and "connected" should be interpreted broadly, for example, it can be a mechanical connection or an electrical connection, or it can be a connection within two elements, which can be a direct connection or an indirect connection through an intermediate medium. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only embodiments.

[0092] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0093] Many modifications and other embodiments of this utility model are relevant to those skilled in the art, who possess relevant industry knowledge and some original data. Therefore, it should be understood that this utility model is not limited to the specific embodiments disclosed, but also includes other embodiments modified within the scope of the appended claims. Furthermore, although the foregoing description and related drawings depict implementations of specific combinations of elements and functions, different combinations of elements and functions implemented through substitution are also included within the scope of the appended claims. The appended claims also include combinations of elements and functions different from those explicitly described above. Although specific terminology is used herein, it is intended to be general descriptive only and is not intended to be limiting.

Claims

1. A semiconductor processing apparatus characterized by comprising: It comprises: a first chamber portion; a second chamber portion movable relative to the first chamber portion between an open position and a closed position, wherein a wafer can be accommodated between the first chamber portion and the second chamber portion when the second chamber portion is in the closed position relative to the first chamber portion, and the wafer can be taken out or put in when the second chamber portion is in the open position relative to the first chamber portion; the first chamber portion has a first groove and a second groove formed on an inner wall surface thereof, and the second chamber portion has a third groove and a fourth groove formed on an inner wall surface thereof, wherein the first groove and the third groove communicate with each other and jointly form a first edge channel, and the second groove and the fourth groove communicate with each other and jointly form a second edge channel when the second chamber portion is in the closed position relative to the first chamber portion and the wafer is accommodated between the second chamber portion and the first chamber portion, a part of an edge of the wafer extends into the first edge channel, and another part of the edge of the wafer extends into the second edge channel, the second chamber portion or the first chamber portion has a first through hole and a third through hole for communicating the first edge channel with the outside, and a second through hole and a fourth through hole for communicating the second edge channel with the outside, one of the first through hole and the third through hole serves as an inlet of the first edge channel, the other of the first through hole and the third through hole serves as an outlet of the first edge channel, one of the second through hole and the fourth through hole serves as an inlet of the second edge channel, and the other of the second through hole and the fourth through hole serves as an outlet of the second edge channel, the extraction liquid is driven to enter the first edge channel through a corresponding inlet, and the extraction liquid flows through the first edge channel and flows out through a corresponding outlet, the extraction liquid is driven to enter the second edge channel through a corresponding inlet, and the extraction liquid flows through the second edge channel and flows out through a corresponding outlet.

2. The semiconductor processing device according to claim 1, wherein the first through hole is adjacent to the second through hole and a first isolation protrusion is arranged between the first through hole and the second through hole, and the third through hole is adjacent to the fourth through hole and a second isolation protrusion is arranged between the third through hole and the fourth through hole, the first isolation protrusion and the second isolation protrusion make the first edge channel and the second edge channel not closed into a ring shape.

3. The semiconductor processing device according to claim 2, wherein the through hole serving as the inlet of the first edge channel is adjacent to the through hole serving as the outlet of the second edge channel, the through hole serving as the outlet of the first edge channel is adjacent to the through hole serving as the inlet of the second edge channel.

4. The semiconductor processing device according to claim 1, wherein the length of the first edge channel is equal to the length of the second edge channel.

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