Multi-path power supply monitoring reset circuit of new energy control board

Abstract

The utility model discloses a multipath power supply monitoring reset circuit of a new energy control board, which is characterized by comprising a first power supply monitoring reset circuit, a second power supply monitoring reset circuit, a third power supply monitoring reset circuit and an output gathering circuit, the first power supply monitoring reset circuit, the second power supply monitoring reset circuit and the third power supply monitoring reset circuit are connected in parallel and then are connected in series with the output gathering circuit; and the first power supply monitoring reset circuit, the second power supply monitoring reset circuit and the third power supply monitoring reset circuit have the same circuit structure. The monitoring voltage range is enlarged, the number of paths of the monitoring voltage is increased, besides 1.2 V, 3.3 V and 5V voltages on the control panel are monitored, the 24V power supply voltage can also be monitored, and the 24V power supply voltage is the input voltage of the whole control panel. 1.2 V, 3.3 V and 5V are obtained through 24V conversion, the voltage has hysteresis, a 24V power supply is directly monitored, and a reset protection function can be responded more quickly in an abnormal voltage input state.

Description

Technical Field

[0001] This utility model belongs to the field of reset circuit technology, and relates to a multi-channel power supply monitoring reset circuit for a new energy control board. Background Technology

[0002] In today's electronic circuit applications, voltage monitoring and protection functions are crucial. While some existing circuits employ multi-channel integrated voltage monitoring, enabling the monitoring of multiple voltages, they suffer from significant cost. This severely limits their widespread adoption in large-scale applications or cost-sensitive projects. Furthermore, current circuits have relatively narrow voltage detection ranges and lack flexibility. In practical applications, different electronic devices have varying tolerances to voltage drops, requiring the setting of different voltage protection thresholds based on specific circumstances. However, existing circuits cannot specify at what voltage drop triggers protection, leading to inaccurate and ineffective protection of electronic devices. This can easily cause equipment damage due to abnormal voltage, affecting the stability and reliability of the entire system. Summary of the Invention

[0003] To address the problems existing in the background technology, this utility model proposes a multi-channel power supply monitoring and reset circuit for a new energy control board.

[0004] To achieve the above objectives, the technical solution adopted by this utility model is as follows: a multi-channel power monitoring and reset circuit for a new energy control board, characterized in that it includes: a first power monitoring and reset circuit, a second power monitoring and reset circuit, a third power monitoring and reset circuit, and an output aggregation circuit.

[0005] The first power monitoring and reset circuit, the second power monitoring and reset circuit, and the third power monitoring and reset circuit are connected in parallel, and then connected in series with the output summing circuit.

[0006] The circuit structures of the first power monitoring reset circuit, the second power monitoring reset circuit, and the third power monitoring reset circuit are the same.

[0007] The first power monitoring and reset circuit includes: a power module and a signal processing module;

[0008] The output of the power supply module is connected to the input of the signal processing module, and the output of the signal processing module is connected to the input of the output summarization circuit.

[0009] The power module includes: resistor R1 and resistor R2;

[0010] One end of resistor R1 is connected to the input power supply VDD1, the other end of resistor R1 is connected to one end of resistor R2, and one end of resistor R2 is connected to ground.

[0011] The signal processing module includes: reset chip U1, resistor R3, and resistor R10;

[0012] One end of resistor R3 is connected to the input power supply VDD4, and the other end of resistor R3 is connected to the nENABLE chip of reset chip U1. The GND pin of reset chip U1 is connected to ground. The IN pin of reset chip U1 is connected to resistors R1 and R2. The nOUT pin of reset chip U1 is connected to one end of resistor R10. The VCC pin of reset chip U1 is connected to the input power supply VDD4.

[0013] The output summing circuit includes: resistor R13 and capacitor C1;

[0014] One end of resistor R13 is connected to the input power supply VDD4, and the other end of resistor R13 is connected to the other end of resistor R10 and one end of capacitor C1. The other end of capacitor C1 is connected to ground. XRS is the output node of the output summary module.

[0015] Compared with existing technologies, this utility model has the following beneficial effects: This utility model achieves significant technological innovation in voltage monitoring and protection, bringing about multiple beneficial effects. It represents a breakthrough in monitoring range. Through patented technology utilizing voltage divider resistors to set the monitoring voltage, the monitoring voltage range is greatly expanded from the previously fixed 1.2-5V to 0.5-100V, meeting the needs of more application scenarios with different voltage requirements. It can not only monitor common 1.2V, 3.3V, and 5V voltages on the control board, but also monitor the 24V power supply voltage. Since 24V is the input voltage of the entire control board, direct monitoring allows for faster triggering of the reset protection function in case of abnormal voltage input, thanks to the voltage hysteresis characteristic, effectively preventing equipment damage due to abnormal voltage and improving system stability and reliability. In terms of the number of monitoring channels, it achieves a multi-channel upgrade. This application supports multi-channel power supply monitoring and adopts OC gate wire and output. It can monitor up to 10 power supplies with different or the same voltage amplitude at the same time. Compared with the previous method of only being able to monitor 1-3 voltages, it greatly improves the monitoring capability and provides a more comprehensive and efficient voltage monitoring solution for complex circuit systems. Attached Figure Description

[0016] Figure 1 This is a block diagram of a multi-channel power supply monitoring and reset circuit for a new energy control board according to this utility model.

[0017] Figure 2 This is a block diagram of the power monitoring and reset circuit of this utility model;

[0018] Figure 3 This utility model relates to a multi-channel power supply monitoring and reset circuit diagram for a new energy control board. Detailed Implementation

[0019] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0020] like Figures 1-3 As shown, the technical solution adopted by this utility model is as follows: a multi-channel power monitoring and reset circuit for a new energy control board, comprising: a first power monitoring and reset circuit, a second power monitoring and reset circuit, a third power monitoring and reset circuit, and an output aggregation circuit.

[0021] The first power supply monitoring and reset circuit, the second power supply monitoring and reset circuit, and the third power supply monitoring and reset circuit are connected in parallel, and then connected in series with the output summing circuit.

[0022] The circuit structures of the first power monitoring reset circuit, the second power monitoring reset circuit, and the third power monitoring reset circuit are the same.

[0023] The first power monitoring and reset circuit includes: a power module and a signal processing module.

[0024] The output of the power supply module is connected to the input of the signal processing module, and the output of the signal processing module is connected to the input of the output summarization circuit.

[0025] This circuit processes the input signals using the same reset chip, ultimately integrating and outputting multiple delayed signals. Each chip independently receives the input signal, processes it through internal delay logic, and then aggregates the signals at the output, achieving the function of integrating delays from multiple signals.

[0026] The power supply module includes: resistor R1 and resistor R2.

[0027] One end of resistor R1 is connected to the input power supply VDD1, the other end of resistor R1 is connected to one end of resistor R2, and one end of resistor R2 is connected to ground.

[0028] Resistor R1 is a pull-up resistor, ensuring that the nENABLE pin of the reset chip U1 is at a high level by default and the chip is activated only when an external low level is input.

[0029] Resistor R2 is an input current limiting resistor, used to protect the input pin of reset chip U1 and limit the input signal current.

[0030] The signal processing module includes: reset chip U1, resistor R3, and resistor R10.

[0031] One end of resistor R3 is connected to the input power supply VDD4, and the other end of resistor R3 is connected to the nENABLE pin of reset chip U1. The GND pin of reset chip U1 is connected to ground. The IN pin of reset chip U1 is connected to resistors R1 and R2. The nOUT pin of reset chip U1 is connected to one end of resistor R10. The VCC pin of reset chip U1 is connected to the input power supply VDD4.

[0032] The nENABLE pin of the reset chip U1 is the enable pin, which is active low and controls whether the chip is working.

[0033] The GND pin of the reset chip U1 is grounded to provide a reference potential.

[0034] The IN pin of the reset chip U1 is the signal input terminal, which receives external input signals.

[0035] The nOUT pin of the reset chip U1 is the delay signal output terminal, which outputs an inverse delay signal.

[0036] The VCC pin of the reset chip U1 is the power input terminal, which is connected to the operating voltage.

[0037] The CDELAY pin of the reset chip is the delay parameter setting terminal.

[0038] Resistor R3 is a power supply pull-up resistor, which stabilizes the potential near the chip's power supply pin.

[0039] Resistor R10 is the output current limiting resistor, which protects the chip's output pins and prevents excessive output current.

[0040] The output summing circuit includes: resistor R13 and capacitor C1.

[0041] One end of resistor R13 is connected to the input power supply VDD4, and the other end of resistor R13 is connected to the other end of resistor R10 and one end of capacitor C1. The other end of capacitor C1 is connected to ground. XRS is the output node of the output summary module.

[0042] Resistor R13 is an output pull-up resistor that ensures the output remains at a high level when there is no signal, thereby enhancing the signal driving capability.

[0043] Capacitor C1 is connected in parallel between XRS and ground to filter out high-frequency noise, stabilize the output signal voltage, and improve signal quality.

[0044] Reset chips U1, U2, and U3 are reset chips from Sanbang Microelectronics. Reset chip U1 monitors the VDD1 voltage. Pin 1 of reset chip U1 is connected to VDD4 via resistor R3, acting as a pull-up enable. Pins 2 and 5 of reset chip U1 are connected to GND and VDD4 respectively, with VDD4 serving as the power supply for reset chip U1. Pin 3 of reset chip U1 is connected to pin 2 of resistors R1 and R2; the voltage at this point is the input voltage for reset chip U1. When this voltage is below 0.5V, pin 4 outputs low. The voltage amplitude at this point is equal to... By setting appropriate values ​​for R1 and R2, the voltage at this point is 0.5V. When VDD1 goes low, the voltage at this point will be lower than 0.5V, and pin 4 will output a low level.

[0045] Reset chips U1, U2, and U3 are connected to the XRS network via resistors R10, R11, and R12. Resistors R10, R11, and R12 act as impedance matching resistors and provide impedance isolation for the outputs of reset chips U1, U2, and U3. Reset chips U1, U2, and U3 are open-collector outputs, allowing for wired-AND logic. When any of the input power supplies VDD1, VDD2, or VDD3 experiences a voltage drop, the XRS signal will be set low. This signal is connected to the DSP's reset signal; when the XRS signal is low, the DSP will perform a low-level reset, preventing system malfunctions and program crashes due to excessively low voltage.

[0046] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A multi-channel power supply monitoring and reset circuit for a new energy control board, characterized in that, It includes: a first power supply monitoring and reset circuit, a second power supply monitoring and reset circuit, a third power supply monitoring and reset circuit, and an output aggregation circuit; The first power monitoring and reset circuit, the second power monitoring and reset circuit, and the third power monitoring and reset circuit are connected in parallel, and then connected in series with the output summing circuit. The circuit structures of the first power monitoring reset circuit, the second power monitoring reset circuit, and the third power monitoring reset circuit are the same.

2. The multi-channel power supply monitoring and reset circuit for a new energy control board according to claim 1, characterized in that, The first power monitoring and reset circuit includes: a power module and a signal processing module; The output of the power supply module is connected to the input of the signal processing module, and the output of the signal processing module is connected to the input of the output summarization circuit.

3. The multi-channel power supply monitoring and reset circuit for a new energy control board according to claim 2, characterized in that, The power module includes: resistor R1 and resistor R2; One end of resistor R1 is connected to the input power supply VDD1, the other end of resistor R1 is connected to one end of resistor R2, and one end of resistor R2 is connected to ground.

4. The multi-channel power supply monitoring and reset circuit for a new energy control board according to claim 3, characterized in that, The signal processing module includes: reset chip U1, resistor R3, and resistor R10; One end of resistor R3 is connected to the input power supply VDD4, and the other end of resistor R3 is connected to the nENABLE chip of reset chip U1. The GND pin of reset chip U1 is connected to ground. The IN pin of reset chip U1 is connected to resistors R1 and R2. The nOUT pin of reset chip U1 is connected to one end of resistor R10. The VCC pin of reset chip U1 is connected to the input power supply VDD4.

5. The multi-channel power supply monitoring and reset circuit for a new energy control board according to claim 4, characterized in that, The output summing circuit includes: resistor R13 and capacitor C1; One end of resistor R13 is connected to the input power supply VDD4, and the other end of resistor R13 is connected to the other end of resistor R10 and one end of capacitor C1. The other end of capacitor C1 is connected to ground. XRS is the output node of the output summary module.

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