AM signal simulation device

By generating two AM signals and using a combiner to detect phase and delay, the problem of traditional AM signal simulation devices being unable to measure the delay of multiple signals is solved, achieving high-quality signal transmission and enhanced anti-interference capabilities.

CN223786048UActive Publication Date: 2026-01-09WUHAN UNIV
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Patent Information

Application Number
CN202520197404.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-08
Publication Date
2026-01-09
Estimated Expiration
2035-02-08

AI Technical Summary

Technical Problem

Traditional AM signal simulation devices can only generate one signal, making it difficult to accurately measure signal delay in multi-signal testing, and they are easily affected by signal lines.

Method used

Two AM signals are generated using a data input circuit, a digital-to-analog converter circuit, a dual-channel DDS circuit, and a multiplication circuit. The phase and delay are detected by a combiner, and a high-precision digital-to-analog converter circuit is used to filter out noisy signals. SMA wires enhance anti-interference capabilities.

Benefits of technology

It achieves high-quality transmission and low distortion of two AM signals, can accurately measure signal delay, and enhances signal stability and anti-interference capability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an AM signal simulation device. The AM signal simulation device comprises a data input circuit, a first digital-to-analog conversion circuit, a second digital-to-analog conversion circuit, a double-path DDS circuit, a first multiplication circuit and a second multiplication circuit. According to the utility model, signal parameters needing to be generated can be manually input through the data input circuit, two paths of AM signals can be generated by adopting the first digital-to-analog conversion circuit, the second digital-to-analog conversion circuit, the double-path DDS circuit, the first multiplication circuit and the second multiplication circuit, and the dual-path AM signal generation circuit can be used in various scenes; and one path of AM signal can be subjected to a comparison test for the other path of AM signal so as to determine that the other path of AM signal is influenced by the signal line and has time delay.
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Description

Technical Field

[0001] This utility model relates to an AM signal simulation device, belonging to the field of high-frequency instrument technology. Background Technology

[0002] AM (Amplitude Modulation) signal is a modulation method that controls the amplitude of a carrier wave through a baseband signal. It is widely used in wireless broadcasting, television signal transmission, remote control systems, and some wireless communication devices. Compared with other modulation methods, AM signals have become one of the important technologies in the field of wireless transmission due to their simple implementation, low cost, and ease of processing.

[0003] In AM testing scenarios, that is, scenarios where AM signals are used for testing, traditional AM signal simulation devices can only generate one AM signal. When testing the reception of AM signals, there may be a delay due to the influence of the signal line. It is difficult to measure the delay when there is only one AM signal. Utility Model Content

[0004] This invention provides an AM signal simulation device that solves the problems disclosed in the background art.

[0005] According to one aspect of this disclosure, an AM signal simulation device is provided, including a data input circuit, a first digital-to-analog converter circuit, a second digital-to-analog converter circuit, a dual-channel DDS circuit, a first multiplication circuit, and a second multiplication circuit;

[0006] The data input circuit inputs a first set of modulation signal parameters to the first digital-to-analog converter circuit, inputs a second set of modulation signal parameters to the second digital-to-analog converter circuit, and inputs a first set of carrier signal parameters and a second set of carrier signal parameters to the dual-channel DDS circuit.

[0007] The first digital-to-analog converter circuit generates the first modulation signal based on the first set of modulation signal parameters;

[0008] The second digital-to-analog converter circuit generates a second modulation signal based on the second set of modulation signal parameters;

[0009] The dual-channel DDS circuit generates the first set of carrier signals and the second set of carrier signal parameters, respectively, based on the first set of carrier signal parameters and the second set of carrier signal parameters.

[0010] The first multiplication circuit generates a first AM signal based on the first modulation signal and the first carrier signal;

[0011] The second multiplication circuit generates a second AM signal based on the second modulation signal and the second carrier signal.

[0012] Furthermore, the data input circuit includes a keyboard and a microprocessor connected to the keyboard output terminal; the keyboard is used to input a first set of modulation signal parameters, a second set of modulation signal parameters, a first set of carrier signal parameters, and a second set of carrier signal parameters to the microprocessor; the microprocessor outputs the first set of modulation signal parameters to a first digital-to-analog converter circuit, outputs the second set of modulation signal parameters to a second digital-to-analog converter circuit, and outputs the first set of carrier signal parameters and the second set of carrier signal parameters to a dual-channel DDS circuit.

[0013] Furthermore, the data input circuit also includes a display device connected to the microprocessor, which is used to display the modulation signal parameters and carrier signal parameters input from the keyboard.

[0014] Furthermore, the dual-channel DDS circuit includes a DDS chip, a first emitter follower circuit, and a second emitter follower circuit. The DDS chip outputs a first current carrier signal and a second current carrier signal according to the first set of carrier signal parameters and the second set of carrier signal parameters, respectively. The first emitter follower circuit and the second emitter follower circuit convert the first current carrier signal and the second current carrier signal into a first voltage carrier signal and a second voltage carrier signal, respectively.

[0015] Furthermore, the first emitter follower circuit and the second emitter follower circuit have the same structure, including resistors R1~R13, inductors L1~L4, capacitors C1~C3 and amplifier D1;

[0016] The positive input terminal of the emitter follower circuit, inductors L1 and L2, resistor R9, and the positive input terminal of amplifier D1 are connected in series. Similarly, the negative input terminal of the emitter follower circuit, inductors L3 and L4, resistor R10, and the negative input terminal of amplifier D1 are connected in series. Resistor R1 is connected between the power supply and the positive input terminal of the emitter follower circuit; resistor R3 is connected between ground and the positive input terminal of the emitter follower circuit; resistor R2 is connected between the power supply and the negative input terminal of the emitter follower circuit; resistor R4 is connected between ground and the negative input terminal of the emitter follower circuit; capacitor C1 is connected between the positive and negative input terminals of the emitter follower circuit; one end of capacitor C2 is connected between inductors L1 and L2, and the other end of capacitor C2 is connected between inductors L3 and L4; one end of capacitor C3 is connected between inductors L2 and L4. Between resistor R9, the other end of capacitor C3 is connected between inductor L4 and resistor R10. One end of resistor R5 is connected between inductor L2 and resistor R9, and the other end of resistor R5 is connected to the power supply. One end of resistor R6 is connected between inductor L4 and resistor R10, and the other end of resistor R6 is connected to the power supply. One end of resistor R7 is connected between inductor L2 and resistor R9, and the other end of resistor R7 is grounded. One end of resistor R8 is connected between inductor L4 and resistor R10, and the other end of resistor R8 is grounded. One end of resistor R11 is connected between resistor R9 and the positive input terminal of amplifier D1, and the other end of resistor R11 is grounded. Resistor R13 is connected between the negative input terminal and the output terminal of amplifier D1. The output terminal of amplifier D1 is output through resistor R12.

[0017] Furthermore, the device also includes a combiner that generates a combined signal based on the first AM signal and the second AM signal.

[0018] Furthermore, the digital-to-analog converter circuit adopts a high-precision digital-to-analog converter circuit with built-in filtering circuit.

[0019] Furthermore, in the device, the circuits are connected using SMA wires.

[0020] The beneficial effects achieved by this utility model are as follows: 1. This utility model allows manual input of the signal parameters to be generated via a data input circuit. It employs a first analog-to-digital converter (A / D) circuit, a second A / D circuit, a dual-channel DDS circuit, a first multiplication circuit, and a second multiplication circuit to generate two AM signals, applicable in various scenarios. One AM signal can be used for comparison testing of the other AM signal, thus determining whether the other AM signal is delayed due to signal line interference. 2. The dual-channel DDS circuit of this utility model includes an emitter follower circuit to ensure high-quality and low-distortion transmission of the dual signals. 3. This utility model also includes a combiner, which can detect the relative phase and delay of the two AM signals by generating a combined signal. 4. This utility model uses a high-precision A / D circuit with an internal filter circuit, which can filter out noisy signals and generate higher-precision signals, effectively improving signal stability and enhancing signal anti-interference capabilities. 5. This utility model uses SMA wires to connect the circuit, enhancing signal anti-interference capabilities. Attached Figure Description

[0021] Figure 1 Block diagram of an AM signal simulation device;

[0022] Figure 2 This is the circuit diagram for the keyboard.

[0023] Figure 3 This is a circuit diagram of the display device;

[0024] Figure 4 This is a circuit diagram of a microprocessor.

[0025] Figure 5 This is a circuit diagram of the digital-to-analog converter chip side in a digital-to-analog converter circuit;

[0026] Figure 6 This is a circuit diagram of the RF transformer side in a digital-to-analog converter circuit.

[0027] Figure 7 This is a circuit diagram of the DDS chip side in a dual-channel DDS circuit.

[0028] Figure 8 This is a circuit diagram of the emitter follower circuit side in a dual-channel DDS circuit;

[0029] Figure 9 The circuit diagram is for a multiplication circuit.

[0030] Figure 10 This is the circuit diagram for the combiner. Detailed Implementation

[0031] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0032] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components described in these embodiments do not limit the scope of this disclosure.

[0033] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0034] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0035] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0036] It should be noted that similar symbols and letters in the following figures represent similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0037] Furthermore, in the description of the embodiments of this application, the terms "first," "second," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance. Therefore, features defined with "first" or "second" may explicitly or implicitly include one or more features.

[0038] To address the problems of traditional AM signal simulation devices, this disclosure proposes an AM signal simulation device that uses manual input to set the signal parameters to be generated and simultaneously generates two AM signals.

[0039] See Figure 1 , Figure 1 The diagram shows an AM signal analog device, which includes at least a data input circuit, a first digital-to-analog converter circuit, a second digital-to-analog converter circuit, a dual-channel DDS circuit, a first multiplication circuit, and a second multiplication circuit.

[0040] The aforementioned data input circuit inputs a first set of modulation signal parameters to the first digital-to-analog converter circuit, a second set of modulation signal parameters to the second digital-to-analog converter circuit, and a first set of carrier signal parameters and a second set of carrier signal parameters to the dual-channel DDS circuit.

[0041] It should be noted that the data input circuit can be a computer, a smart terminal, or any device that enables manual data input. To save costs, in some embodiments, the data input circuit mainly includes a keyboard and a microprocessor connected to the keyboard output. In addition, to view the input parameters, in some embodiments, the data input circuit also includes a display device connected to the microprocessor, which is used to display the modulation signal parameters and carrier signal parameters input from the keyboard.

[0042] The keyboard is used to input the first set of modulation signal parameters, the second set of modulation signal parameters, the first set of carrier signal parameters, and the second set of carrier signal parameters into the microprocessor.

[0043] It should be noted that the keyboard can be a matrix keyboard, such as... Figure 2 As shown, a 3×3 matrix keypad includes resistors R14~R19 and self-reset buttons SW1~SW9. One end of resistors R14~R16 is connected to the corresponding pin of the microprocessor. The other end of resistor R14 is connected to one end of resistor R17, one end of self-reset button SW1, one end of self-reset button SW4, and one end of self-reset button SW7, respectively. The other end of resistor R17 is connected to the power supply (3V). The other ends of self-reset buttons SW1, SW4, and SW7 are all connected to the corresponding pins of the microprocessor. The other end of resistor R15 is connected to one end of resistor R18, one end of self-reset button SW2, and one end of self-reset button SW9, respectively. One end of the self-reset button SW5 and one end of the self-reset button SW8, and the other end of the resistor R18 are connected to the power supply (3V). The other ends of the self-reset buttons SW2, SW5, and SW8 are all connected to the corresponding pins of the microprocessor. The other end of the resistor R16 is connected to one end of the resistor R19, one end of the self-reset button SW3, one end of the self-reset button SW6, and one end of the self-reset button SW9. The other end of the resistor R19 is connected to the power supply (3V). The other ends of the self-reset buttons SW3, SW6, and SW9 are all connected to the corresponding pins of the microprocessor.

[0044] Users can input signal parameters, such as carrier amplitude, phase and modulation, and AM wave delay, via the keyboard (specifically by pressing the self-reset button).

[0045] It should be noted that, see Figure 3The display device can be an OLED display, specifically the JLX12864, which is 1.3 inches in size, with a resolution of 128×64 pixels and a 132×64 dot matrix OLED display panel. It integrates a 132×64-bit SRAM display buffer and provides a human-computer interaction interface.

[0046] The microprocessor outputs a first set of modulation signal parameters to the first digital-to-analog converter circuit, a second set of modulation signal parameters to the second digital-to-analog converter circuit, and a first set of carrier signal parameters and a second set of carrier signal parameters to the dual-channel DDS circuit.

[0047] It should be noted that, see Figure 4 The microprocessor is an FPGA, specifically the Altera Cyclone IV series EP4CE6F17C8N high-speed FPGA, used to help the OLED display show signal parameters. It sends the user-input signal parameters to the digital-to-analog converter circuit and the dual-channel DDS circuit, which then generate the modulation signal and carrier signal required by the user.

[0048] The first digital-to-analog converter circuit generates a first modulation signal based on a first set of modulation signal parameters, and the second digital-to-analog converter circuit generates a second modulation signal based on a second set of modulation signal parameters.

[0049] It should be noted that the first set of modulation signal parameters and the second set of modulation signal parameters can be the same or different. If they are the same, the generated modulation signal will also be the same; if they are different, the generated modulation signal will also be different. The specific choice depends on the actual situation.

[0050] It should be noted that the first and second digital-to-analog converter circuits use the same structure and have the same function, employing an integrated filter circuit (i.e., Figure 5 The high-precision digital-to-analog converter circuit (composed of resistors R33~R42, capacitors C11~C13, and inductors L5~L8) can filter out messy signals and generate higher precision signals, effectively improving signal stability and enhancing signal anti-interference ability.

[0051] See Figure 5 and 6 The digital-to-analog converter (DAC) circuit includes a DAC chip and an RF transformer. The DAC chip is connected to the microprocessor. The DAC chip can be a DAC904 chip, used to generate the modulation signal required by the user. This chip is a 14-bit high-precision DAC chip; its extremely high precision ensures stable signal transmission and amplification in subsequent circuits. The 50MHz clock ensures signal quality and accuracy, guaranteeing smooth subsequent processing. The peripheral circuit of the DAC chip includes capacitors C4-C5 and resistor R20. For the connection of the peripheral circuit, please refer to [link to peripheral circuit diagram]. Figure 5 Details will not be provided here.

[0052] The RF transformer can be an ADT1-1WT, with an operating frequency range of 0.4 to 800 MHz. The two input terminals of the RF transformer are connected to the corresponding pins of the digital-to-analog converter chip through capacitors C7 and C8. Capacitors C7 and C8 are decoupling capacitors, which can isolate subsequent signals and the digital-to-analog converter chip, making the modulation signal more stable. The first pin of the RF transformer is output through capacitor C9.

[0053] The aforementioned dual-channel DDS circuit generates the first set of carrier signals and the second set of carrier signals based on the first set of carrier signal parameters and the second set of carrier signal parameters, respectively.

[0054] It should be noted that the parameters of the first set of carrier signals and the parameters of the second set of carrier signals can be the same or different. If they are the same, the generated carrier signals will also be the same; if they are different, the generated carrier signals will also be different. The specific method can be determined according to the actual situation.

[0055] The dual-channel DDS circuit generates two independent high-frequency carrier signals and precisely controls the frequency, phase, and amplitude of each signal. Users can input the required parameters via the keyboard, and the dual-channel DDS circuit will generate two adjustable-frequency sinusoidal carrier signals. These signals will serve as the carriers for the modulation signal, providing high-precision and stable frequency output to meet the high-frequency stability requirements of wireless transmission.

[0056] See Figure 7 and 8 The dual-channel DDS circuit mainly includes a DDS chip, a first emitter follower circuit, and a second emitter follower circuit. The DDS chip outputs a first current carrier signal and a second current carrier signal according to the first set of carrier signal parameters and the second set of carrier signal parameters, respectively. The first emitter follower circuit and the second emitter follower circuit convert the first current carrier signal and the second current carrier signal into a first voltage carrier signal and a second voltage carrier signal, respectively.

[0057] It should be noted that the DDS chip can be the AD9958. The AD9958 has dual-channel high-frequency output, up to 200MHz, meeting the requirements of high-frequency carrier waves. Furthermore, the frequency, phase, and amplitude of the two outputs can be independently adjusted, adding more modes for signal analog debugging. The peripheral circuit of the AD9958 mainly includes resistors R21~R24 and capacitor C10; see [link to documentation] for details. Figure 7 Details will not be provided here.

[0058] The DDS chip outputs two parallel emitter follower circuits (i.e., the first emitter follower circuit and the second emitter follower circuit), which ensures high quality and low distortion of dual-channel signal transmission. The two emitter follower circuits have the same structure and function, and can include resistors R1~R13, inductors L1~L4, capacitors C1~C3, and amplifier D1. The positive input terminal of the emitter follower circuit, inductors L1, L2, resistor R9, and the positive input terminal of amplifier D1 are connected in series. The negative input terminal of the emitter follower circuit, inductors L3, L4, resistor R10, and the negative input terminal of amplifier D1 are connected in series. Resistor R1 is placed between the power supply (3.3V) and the positive input terminal of the emitter follower circuit, resistor R3 is placed between ground and the positive input terminal of the emitter follower circuit, resistor R2 is placed between the power supply (3.3V) and the negative input terminal of the emitter follower circuit, resistor R4 is placed between ground and the negative input terminal of the emitter follower circuit, capacitor C1 is placed between the positive and negative input terminals of the emitter follower circuit, and one end of capacitor C2 is connected to... Between inductors L1 and L2, the other end of capacitor C2 is connected between inductors L3 and L4, one end of capacitor C3 is connected between inductor L2 and resistor R9, the other end of capacitor C3 is connected between inductor L4 and resistor R10, one end of resistor R5 is connected between inductor L2 and resistor R9, and the other end of resistor R5 is connected to the power supply (3.3V), one end of resistor R6 is connected between inductor L4 and resistor R10, and the other end of resistor R6 is connected to the power supply (3.3V), one end of resistor R7 is connected between inductor L2 and resistor R9, and the other end of resistor R7 is grounded, one end of resistor R8 is connected between inductor L4 and resistor R10, and the other end of resistor R8 is grounded, one end of resistor R11 is connected between resistor R9 and the positive input terminal of amplifier D1, and the other end of resistor R11 is grounded, resistor R13 is connected between the negative input terminal and the output terminal of amplifier D1, and the output terminal of amplifier D1 is output through resistor R12.

[0059] The emitter follower circuit uses an OPA695 amplifier D1, which has a speed of up to 1.6GHz, sufficient to ensure high quality and low distortion of dual-channel signal transmission. The emitter follower circuit uses an amplifier D1 with an amplification ratio of 1. By leveraging the principle that the input impedance of amplifier D1 is close to infinite, the current signal is converted into a voltage signal. Output impedance matching is designed to facilitate connection to the subsequent stage using signal lines.

[0060] The first multiplication circuit generates a first AM signal based on the first modulation signal and the first carrier signal; the second multiplication circuit generates a second AM signal based on the second modulation signal and the second carrier signal.

[0061] It should be noted that the first and second multiplication circuits have the same structure and function. The multiplication circuit is used to implement the AM modulation process, generating the final AM signal through amplitude modulation of the input signal. The high-precision multiplication operation of this circuit can ensure the amplitude and frequency stability of the output signal and has low nonlinear distortion.

[0062] See Figure 9 The multiplication circuit mainly includes a multiplication chip and resistors R25~R29. The multiplication chip in the figure is the AD835. The AD835 chip has many advantages as an AM mixer. Its high bandwidth performance of 250 MHz enables it to process high-frequency signals, ensuring accurate modulation and demodulation of signals. Its high precision and low distortion characteristics ensure that the signal does not generate unnecessary distortion during the mixing process. The high differential input impedance reduces the load effect on the signal source and maintains signal integrity. The four-quadrant operation mode supports linear mixing of positive and negative signals, ensuring signal quality. Its low power consumption and high efficiency make it very suitable for long-term operation applications.

[0063] The first pin of the multiplier chip is connected to the emitter follower circuit via resistor R25, the fourth pin is connected to the emitter follower circuit via resistor R26, the fourth pin is grounded via resistor R27, the eighth pin is connected to the digital-to-analog converter circuit (i.e., Xin) via resistor R28, the fifth pin is the output (i.e., OUT) via resistor R29, the second pin is grounded, and the third and sixth pins are connected to -5V and +5V respectively. To adapt to the multiplier chip, the output of the emitter follower circuit is connected to a three-way SMA adapter to convert the signal into two paths, which are then input to the multiplier chip (i.e., Yin and Zin).

[0064] It should be noted that in some embodiments, all circuits of the device are connected using SMA wires, which can further enhance the signal's anti-interference capability.

[0065] It should be noted that the delay can be obtained by directly inputting the first AM signal and the second AM signal into a device such as an oscilloscope and comparing the relative phase of the two signals. However, in some embodiments, in order to quickly determine the relative phase of the two signals, the AM signal simulation device also includes a combiner. The combiner generates a combined signal based on the first AM signal and the second AM signal. By generating the combined signal, the relative phase and delay of the two AM signals can be detected.

[0066] Set the delay for the comparison signal lines and send two AM waves with the same frequency. Connect them to a combiner and then to an oscilloscope. When the waveforms are approximately a straight line, the relative phase between the two waveforms is 180 degrees. When the waveform amplitude is at its maximum, the relative phase is 0 degrees. As the relative phase gradually increases from 0 degrees to 180 degrees, the waveform amplitude gradually decreases. As the relative phase gradually increases from 180 degrees to 360 degrees, the waveform amplitude range gradually increases. By comparing the relative phase Δθ of the two signals and based on the set carrier frequency f, the delay t can be calculated as: Delay t = Δθ * 360 * f.

[0067] See Figure 10 The combiner has a precise impedance matching resistor design, namely R30~R32 in the figure, which can effectively reduce signal reflection and loss, ensure high-quality signal transmission, and is suitable for multi-signal source scenarios, such as signal combining processing in communication systems or synthesis of radio frequency signals. It can provide stable and distortion-free signal combining effect, ensuring the accuracy and reliability of the signal in subsequent processing stages.

[0068] The input and output impedances of the above combiner module, i.e., R30~R32, are designed to be 50Ω. 550Ω is a standard RF impedance value, which enables maximum power transmission of signals between transmission lines and devices, reduces reflections, and ensures efficient and stable operation of the system.

[0069] The working process of the AM signal simulation device is as follows:

[0070] The microprocessor sends the required signal parameters to the OLED display for display by inputting the required signal parameters via the keyboard, and sends the modulation signal parameters to the digital-to-analog converter circuit and the carrier signal parameters to the dual-channel DDS circuit. The digital-to-analog converter circuit outputs a modulation signal that matches the modulation signal parameters. The dual-channel DDS circuit outputs two carrier signals. One modulation signal and one carrier signal are input to a multiplier circuit, and the other modulation signal and the other carrier signal are input to another multiplier circuit. The multiplier circuit performs AM modulation and outputs an AM signal. It can also decide whether to combine the AM signals output from the two multipliers as needed.

[0071] The AM signal simulation device allows manual input of the signal parameters to be generated via a data input circuit. It can generate two AM signals using a first digital-to-analog converter circuit, a second digital-to-analog converter circuit, a dual-channel DDS circuit, a first multiplication circuit, and a second multiplication circuit. These signals can be used in various scenarios, and one AM signal can be used to compare and test the other AM signal, thereby determining whether the other AM signal is delayed due to signal line interference.

[0072] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. An AM signal simulation device, characterized in that, It includes a data input circuit, a first digital-to-analog converter circuit, a second digital-to-analog converter circuit, a dual-channel DDS circuit, a first multiplication circuit, and a second multiplication circuit; The data input circuit inputs a first set of modulation signal parameters to the first digital-to-analog converter circuit, inputs a second set of modulation signal parameters to the second digital-to-analog converter circuit, and inputs a first set of carrier signal parameters and a second set of carrier signal parameters to the dual-channel DDS circuit. The first digital-to-analog converter circuit generates the first modulation signal based on the first set of modulation signal parameters; The second digital-to-analog converter circuit generates a second modulation signal based on the second set of modulation signal parameters; The dual-channel DDS circuit generates the first set of carrier signals and the second set of carrier signal parameters, respectively, based on the first set of carrier signal parameters and the second set of carrier signal parameters. The first multiplication circuit generates a first AM signal based on the first modulation signal and the first carrier signal; The second multiplication circuit generates a second AM signal based on the second modulation signal and the second carrier signal.

2. The apparatus according to claim 1, characterized in that, The data input circuit includes a keyboard and a microprocessor connected to the keyboard output; the keyboard is used to input a first set of modulation signal parameters, a second set of modulation signal parameters, a first set of carrier signal parameters, and a second set of carrier signal parameters to the microprocessor. The microprocessor outputs a first set of modulation signal parameters to the first digital-to-analog converter circuit, a second set of modulation signal parameters to the second digital-to-analog converter circuit, and a first set of carrier signal parameters and a second set of carrier signal parameters to the dual-channel DDS circuit.

3. The apparatus according to claim 2, characterized in that, The data input circuit also includes a display device connected to the microprocessor, which displays the modulation signal parameters and carrier signal parameters input from the keyboard.

4. The apparatus according to claim 1, characterized in that, The dual-channel DDS circuit includes a DDS chip, a first emitter follower circuit, and a second emitter follower circuit. The DDS chip outputs a first current carrier signal and a second current carrier signal according to the first set of carrier signal parameters and the second set of carrier signal parameters, respectively. The first emitter follower circuit and the second emitter follower circuit convert the first current carrier signal and the second current carrier signal into a first voltage carrier signal and a second voltage carrier signal, respectively.

5. The apparatus according to claim 4, characterized in that, The first emitter follower circuit and the second emitter follower circuit have the same structure, including resistors R1~R13, inductors L1~L4, capacitors C1~C3 and amplifier D1; The positive input terminal of the emitter follower circuit, inductors L1 and L2, resistor R9, and the positive input terminal of amplifier D1 are connected in series. Similarly, the negative input terminal of the emitter follower circuit, inductors L3 and L4, resistor R10, and the negative input terminal of amplifier D1 are connected in series. Resistor R1 is connected between the power supply and the positive input terminal of the emitter follower circuit; resistor R3 is connected between ground and the positive input terminal of the emitter follower circuit; resistor R2 is connected between the power supply and the negative input terminal of the emitter follower circuit; resistor R4 is connected between ground and the negative input terminal of the emitter follower circuit; capacitor C1 is connected between the positive and negative input terminals of the emitter follower circuit; one end of capacitor C2 is connected between inductors L1 and L2, and the other end of capacitor C2 is connected between inductors L3 and L4; one end of capacitor C3 is connected between inductors L2 and L4. Between resistor R9, the other end of capacitor C3 is connected between inductor L4 and resistor R10. One end of resistor R5 is connected between inductor L2 and resistor R9, and the other end of resistor R5 is connected to the power supply. One end of resistor R6 is connected between inductor L4 and resistor R10, and the other end of resistor R6 is connected to the power supply. One end of resistor R7 is connected between inductor L2 and resistor R9, and the other end of resistor R7 is grounded. One end of resistor R8 is connected between inductor L4 and resistor R10, and the other end of resistor R8 is grounded. One end of resistor R11 is connected between resistor R9 and the positive input terminal of amplifier D1, and the other end of resistor R11 is grounded. Resistor R13 is connected between the negative input terminal and the output terminal of amplifier D1. The output terminal of amplifier D1 is output through resistor R12.

6. The apparatus according to claim 1, characterized in that, The device also includes a combiner that generates a combined signal based on the first AM signal and the second AM signal.

7. The apparatus according to claim 1 or 2, characterized in that, The digital-to-analog converter circuit uses a high-precision digital-to-analog converter circuit with built-in filtering circuit.

8. The apparatus according to claim 1, characterized in that, In the device, the circuits are connected by SMA wires.