Printed circuit board

Abstract

The utility model discloses a printed circuit board. The printed circuit board comprises a base material layer and a conductive layer which are laminated. The base material layer comprises a first surface and a second surface which are oppositely arranged. The conductive layer is arranged on the first surface of the base material layer, the conductive layer comprises an insulating bearing body with a groove and a conductive circuit formed by a conductive material filled in the groove, the groove is formed in one side, far away from the first surface, of the insulating bearing body through imprinting, and the groove comprises a bottom wall and side walls located on the two sides of the bottom wall; the distance between the bottom wall and the first surface is larger than or equal to 2 micrometers, and the depth-to-width ratio of the depth and the width of the conductive circuit in the groove is larger than 1: 1. Depth-to-width ratio limitation of an existing etching process is broken through, manufacturing of a superfine circuit with the depth-to-width ratio being 1: 1 or above is achieved, and the integration level and performance of a semiconductor device are improved.

Description

Technical Field

[0001] This utility model relates to the field of printed circuit board technology, and in particular to a printed circuit board. Background Technology

[0002] In the fields of semiconductor manufacturing, microelectronics engineering, and nanotechnology, printed circuit boards (PCBs) are crucial electronic components. They provide a way to interconnect various electronic components and transmit electrical signals. A PCB consists of a substrate and conductive lines fabricated on it. Current PCB manufacturing processes primarily involve etching. This process first coats a layer of photoresist onto a substrate with copper foil, then forms the circuit pattern through exposure and development. Next, excess copper is etched away using chemical or electrochemical methods, leaving the copper lines. Finally, the protective photoresist is chemically removed. However, existing etching processes have several limitations. First, etching is restricted by aspect ratio, making it impossible to achieve both small linewidths and high copper thickness, thus failing to meet the requirements for fine circuitry. Aspect ratio refers to the ratio of the line's depth (height) to its width. In etching, the aspect ratio typically cannot exceed 1:1; otherwise, insufficient copper thickness or circuit breakage may occur. Therefore, achieving small linewidths requires sacrificing copper thickness, reducing current carrying capacity and affecting transmission. Secondly, etching processes are costly, complex, and inefficient, making them unsuitable for large-scale production and posing a risk of environmental pollution, which is detrimental to environmental protection. Utility Model Content

[0003] Therefore, it is necessary to provide a printed circuit board to solve the above-mentioned technical problems.

[0004] One technical solution of this utility model is: a printed circuit board, comprising:

[0005] A substrate layer, comprising a first surface and a second surface disposed opposite to each other;

[0006] A conductive layer is disposed on a first surface of the substrate layer. The conductive layer includes an insulating carrier having a trench and conductive lines formed by conductive material filling the trench. The trench is formed by embossing on the side of the insulating carrier away from the first surface. The trench includes a bottom wall and side walls located on both sides of the bottom wall. The distance from the bottom wall to the first surface is greater than or equal to 2 μm. The aspect ratio of the depth and width of the conductive lines in the trench is greater than 1:1.

[0007] In one embodiment, the aspect ratio of the conductive lines is greater than or equal to 2:1.

[0008] In one embodiment, the depth of the conductive line ranges from 6μm to 90μm, and the width ranges from 2μm to 20μm.

[0009] In one embodiment, the depth of the conductive line is less than, equal to, or greater than the depth of the trench.

[0010] In one embodiment, the sidewall is a vertical wall or an inclined wall, and when the sidewall is an inclined wall, its inclination angle is less than 30°.

[0011] In one embodiment, the conductive line is a copper wire or a silver wire; or the conductive line is a copper wire or a silver wire and a tin layer on the copper wire or silver wire, and the tin layer is disposed at the opening of the trench.

[0012] In one embodiment, the bottom or opening of the trench is filled with a blackened material to form an anti-reflective layer.

[0013] In one embodiment, the substrate layer is a transparent substrate layer, the insulating carrier is a transparent cured adhesive layer, and the transmittance of the printed circuit board is greater than 80%.

[0014] In one embodiment, the conductive layer is provided in two layers, located on the first surface and the second surface of the substrate layer, respectively.

[0015] In one embodiment, the conductive lines of the two conductive layers overlap on the projections of the first and second surfaces of the substrate layer, and the overlap is greater than 98%.

[0016] The beneficial effects of this invention are: the depth-to-width ratio of the conductive lines in the trench is greater than or equal to 2:1, which breaks through the depth-to-width ratio limitation of the existing etching process, realizes the fabrication of ultra-fine lines with a depth-to-width ratio of 2:1 or higher, and improves the integration and performance of semiconductor devices. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the cross-sectional structure of a printed circuit board according to the present invention;

[0018] Figure 2 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention;

[0019] Figure 3 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention;

[0020] Figure 4 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention;

[0021] Figure 5 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention;

[0022] Figure 6 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention;

[0023] Figure 7 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention;

[0024] Figure 8 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention.

[0025] Figure 9 This is a schematic diagram of another cross-sectional structure of a printed circuit board according to the present invention. Detailed Implementation

[0026] To facilitate understanding of this utility model, a more comprehensive description will be given below with reference to the accompanying drawings. The drawings illustrate preferred embodiments of this utility model. However, this utility model can be implemented in many different forms and is not limited to the embodiments described below. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this utility model.

[0027] It should be noted that when an element is referred to as being "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0029] This utility model discloses a printed circuit board, comprising a substrate layer and a conductive layer stacked together. The substrate layer includes a first surface and a second surface disposed opposite to each other. The conductive layer is disposed on the first surface of the substrate layer and includes an insulating carrier with trenches and conductive lines formed by conductive material filling the trenches. The insulating carrier is imprinted to form trenches on the side away from the first surface. The trenches include a bottom wall and sidewalls located on both sides of the bottom wall. The distance from the bottom wall to the first surface is greater than or equal to 2 μm. The aspect ratio of the depth and width of the conductive lines in the trenches is greater than 1:1. This invention breaks through the aspect ratio limitations of existing etching processes, enabling the fabrication of ultra-fine lines with an aspect ratio greater than 1:1, thereby improving the integration and performance of semiconductor devices. Furthermore, it allows for small line widths and spacing combined with high thickness, further improving the utilization of wiring space, thereby reducing the number of layers, lowering manufacturing costs, and improving the performance and reliability of electronic devices. It has broad application prospects and market demand in semiconductor manufacturing technology, microelectronics engineering, and nanotechnology.

[0030] Furthermore, when printed circuit boards (PCBs) are applied to transparent displays, they overcome the limitations of etching processes in terms of aspect ratio, achieving ratios of 1:1 or higher. While maintaining high conductive line thickness, smaller linewidths can be achieved, thereby increasing light transmittance. Moreover, due to the increased conductive line thickness, higher transmittance can be achieved for the same current carrying capacity compared to traditional etching processes. Alternatively, a larger current carrying capacity can be achieved for the same transmittance. This not only improves the performance of transparent displays but also broadens their applications in terms of power and size. Compared to existing etching processes, PCB imprinting has lower equipment costs and a simpler process flow. Imprinting does not require expensive photolithography machines and complex developing and etching steps, resulting in high production efficiency and facilitating large-scale production. PCB imprinting uses imprinting molds to create circuit patterns, allowing precise control over the shape and size of the lines, thus improving production accuracy. Furthermore, imprinting does not require the use of harmful chemical reagents such as acids and alkalis, reducing environmental pollution and demonstrating better environmental friendliness.

[0031] Furthermore, the aspect ratio of the conductive lines is greater than or equal to 2:1. By forming conductive lines through imprinting grooves and filling, the aspect ratio can be further increased, such as to 3:1, 4:1, or 5:1, expanding the application range and meeting the precision requirements of different electronic products. The depth range of the conductive lines is 6μm-90μm, and the width range is 2μm-20μm. As the trench depth increases, the thickness of the conductive lines also increases, reaching 50μm, 75μm, 90μm, etc. The depth of the conductive lines is less than, equal to, or greater than the depth of the trench. Conductive lines are formed by filling the trenches with conductive materials, such as silver or copper, and then sintering. The trenches can be partially filled, completely filled, or filled beyond the trench depth. The sidewalls are vertical or inclined, and when the sidewalls are inclined, the inclination angle is less than 30°. Inclined walls facilitate mold release during imprinting, improving yield.

[0032] In one embodiment, the conductive wire is a copper or silver wire, and the conductive material filling the trench is a silver or copper material, which, after sintering, forms a copper or silver wire with good conductivity. In another embodiment, the conductive wire is a copper or silver wire and a tin layer on the copper or silver wire, with the tin layer located at the trench opening. At the trench opening, the copper or silver wire is further filled or a tin layer is formed by plating, which can further improve the conductivity and solderability of the copper or silver wire.

[0033] In one embodiment, the bottom or opening of the trench is filled with a blackening material to form an anti-reflective layer, such as carbon powder, to reduce reflection and increase transmittance.

[0034] In one embodiment, the substrate layer is a transparent substrate layer, the insulating carrier is a transparent cured adhesive layer, and the transmittance of the printed circuit board is greater than 80%. The printed circuit board is used in transparent displays to improve transmittance and current carrying capacity.

[0035] In one embodiment, two conductive layers are provided, located on the first and second surfaces of the substrate layer, respectively. The conductive lines of the two conductive layers overlap on the projections of the first and second surfaces of the substrate layer, with an overlap greater than 98%. By using narrow linewidths, the utilization rate of the line layout and the transmittance of the transparent display can be improved.

[0036] Please refer to the following: Figures 1 to 9 The following describes the printed circuit board of this utility model by way of example.

[0037] Please refer to Figure 1This utility model discloses a printed circuit board 100, which includes a substrate layer 1 and a conductive layer 2 stacked together. The substrate layer 1 includes a first surface 11 and a second surface 12 disposed opposite to each other. The conductive layer 2 is disposed on the first surface 11 of the substrate layer 1, and includes an insulating carrier 21 and conductive lines 22. A trench 211 is formed by imprinting on the side of the insulating carrier 21 away from the first surface 11, and the trench 211 is filled with conductive material to form the conductive lines 22. The trench 211 includes a bottom wall 2111 and side walls 2112 located on both sides of the bottom wall 2111. The distance from the bottom wall 2111 to the first surface 11 is 5 μm, and the aspect ratio of the depth H and width W of the conductive lines 22 is H / W = 3:1. This invention breaks through the aspect ratio limitation of existing etching processes, realizes the fabrication of ultra-fine lines with an aspect ratio greater than 1:1, improves the integration and performance of semiconductor devices, further improves the utilization of wiring space, and can also reduce the number of layers and reduce manufacturing costs.

[0038] The printed circuit board 100 is manufactured as follows:

[0039] Step 1: Provide a substrate layer 1 of PET. Coat the PET surface, i.e., the first surface 11, with a layer of UV structural adhesive, the thickness of which is 35μm. Use a mold with an engraved circuit pattern to imprint circuit grooves onto the UV structural adhesive. Step 2: Quickly UV cure the imprinted UV structural adhesive. The cured structural adhesive forms an insulating carrier 21 with grooves 211, the depth of which is 30μm and the width of which is 10μm. Step 3: Fill the grooves 211 with copper material, the filling thickness of which is equal to that of the grooves 211. Then, place the UV structural adhesive filled with copper material into a sintering furnace for sintering and curing. After sintering and curing, the copper material in the grooves 211 forms copper wires, and the copper wires form the required conductive circuits 22. The copper wires produced by the imprinting process are deeper and narrower, improving current carrying capacity and facilitating wiring. They also reduce the number of layers and are suitable for small electronic devices. Furthermore, the production cost is low, the process is simple, and production efficiency is improved. In other embodiments, the substrate layer 1 is made of materials such as PC, PI, PMMA, or glass. The insulating carrier 21 may also be made of thermosetting adhesive.

[0040] In this embodiment, the conductive material completely fills the trench 211, and the height of the formed conductive line 22 is consistent with the depth of the trench 211. For other embodiments, please refer to... Figure 2 The conductive material did not completely fill the trench 211, resulting in a conductive line 22 with a height less than the depth of the trench 211; please refer to... Figure 3 The conductive material fills beyond the trench 211, forming a conductive line 22 whose height is greater than the depth of the trench 211. The sidewalls 2112 of the trench 211 can be vertically arranged, such as... Figure 1 In other embodiments, the sidewalls 2112 of the trench 211 may be inclined, such as... Figure 4The inclination angle α of the sidewall 2112 is 87°, which is beneficial for demolding during stamping. The groove 211 is filled with a conductive material such as silver or copper. Figure 1 As shown in Figure 5, in other embodiments, the trench 211 can also be filled with two materials, such as silver or copper, forming silver or copper wires, and then tin, forming a tin layer 221 to improve conductivity.

[0041] Please refer to Figure 6 This utility model discloses another printed circuit board 200, which includes a substrate layer 3 and a conductive layer 4 stacked together. The substrate layer 31 includes a first surface 31 and a second surface 32 disposed opposite to each other. The conductive layer 4 is disposed on the first surface 31 of the substrate layer 3, and includes an insulating carrier 41 and conductive lines 42. A trench 411 is formed by imprinting on the side of the insulating carrier 41 away from the first surface 31, and the trench 411 is filled with conductive material to form the conductive lines 42. The trench 411 includes a bottom wall 4111 and side walls 4112 located on both sides of the bottom wall 4111. The distance from the bottom wall 4111 to the first surface 31 is 5 μm, and the aspect ratio H / W of the depth H and width W of the conductive lines 42 is 2.5:1. This breaks through the aspect ratio limitation of existing etching processes and realizes the fabrication of ultra-fine lines with an aspect ratio of 2.5:1. In this embodiment, the substrate layer 3 is a transparent substrate layer, the insulating carrier 41 is a transparent curing adhesive, such as a UV adhesive, and the printed circuit board 200 is used for transparent display. While maintaining the high thickness of the conductive lines 42, a smaller line width can be achieved, thereby improving the light transmittance. The transmittance of the printed circuit board is greater than 80%.

[0042] The conductive line 42 is made of silver or copper wire. For other embodiments, please refer to... Figure 7 A tin layer 421 is provided on the silver or copper wire to improve conductivity and facilitate electrical connection to light-emitting modules such as miniLED beads.

[0043] In another embodiment, please refer to Figure 8 The bottom wall 4111 of the groove 411 is filled with a blackening material to form an anti-reflective layer 422, such as carbon powder, to reduce reflection and increase transmittance.

[0044] In another embodiment, please refer to Figure 9 A conductive layer 4 is also provided on the second surface 32. The conductive lines 42 of the two conductive layers 4 overlap on the projection of the first surface 31 and the second surface 32 of the substrate layer 3, and the overlap is greater than 98%. By setting the narrow line width, the utilization rate of the line layout and the transmittance of the transparent display can be improved.

[0045] To make the above-mentioned objectives, features, and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model are described in detail above with reference to the accompanying drawings. Many specific details are set forth in the above description to provide a full understanding of this utility model. However, this utility model can be implemented in many other ways different from those described above, and those skilled in the art can make similar improvements without departing from the spirit of this utility model. Therefore, this utility model is not limited to the specific embodiments disclosed above. Furthermore, the technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described; however, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.

[0046] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.

Claims

1. A printed circuit board, characterized by, It comprises: a substrate layer comprising a first surface and a second surface arranged oppositely; a conductive layer arranged on the first surface of the substrate layer, the conductive layer comprising an insulating carrier with a groove and a conductive line formed by a conductive material filled in the groove, the groove is formed by imprinting on the side of the insulating carrier away from the first surface, the groove comprises a bottom wall and side walls on both sides of the bottom wall, the distance from the bottom wall to the first surface is greater than or equal to 2μm, the depth and width of the conductive line in the groove have an aspect ratio greater than 1:

1.

2. A printed circuit board as claimed in claim 1, characterized in that The aspect ratio of the conductive line is greater than or equal to 2:

1.

3. A printed circuit board as claimed in claim 1, characterized in that The depth of the conductive line ranges from 6μm to 90μm, and the width ranges from 2μm to 20μm.

4. A printed circuit board as claimed in claim 1, characterized in that The depth of the conductive line is less than, equal to, or greater than the depth of the groove.

5. A printed circuit board as claimed in claim 1, wherein, The side wall is a vertical wall or an inclined wall, and when the side wall is an inclined wall, the inclination angle is less than 30°.

6. A printed circuit board as claimed in claim 1, characterized in that The conductive line is a copper wire or a silver wire; or the conductive line is a copper wire or a silver wire and a tin layer on the copper wire or the silver wire, and the tin layer is arranged on the groove of the groove.

7. A printed circuit board as claimed in claim 1, characterized in that The groove bottom or the groove opening is filled with blackening material to form an anti-reflection layer.

8. A printed circuit board as claimed in claim 1, characterized in that The substrate layer is a transparent substrate layer, the insulating carrier is a transparent cured glue layer, and the transmittance of the printed circuit board is greater than 80%.

9. A printed circuit board as claimed in claim 1, characterized in that The conductive layer is arranged in two layers, respectively on the first surface and the second surface of the substrate layer.

10. A printed circuit board as claimed in claim 9, characterized in that The conductive lines of the two layers of the conductive layer are arranged in overlapping projection on the first surface and the second surface of the substrate layer, and the overlapping amount is greater than 98%.

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