Power supply chip packaging structure capable of reducing heat dissipation interference

Abstract

The utility model relates to the technical field of chip manufacturing, in particular to a power supply chip packaging structure capable of reducing heat dissipation interference, which comprises a substrate, the substrate is composed of a lower layer plate and an upper layer plate, a resin plate is arranged in the substrate, a core body is fixedly arranged on the resin plate, one side of the core body is connected with a pin through a bonding wire, the pin extends to the outer side of the substrate, and the upper layer plate is fixedly connected with the lower layer plate. The core body, the bonding wires and the pins are all packaged in the substrate, and a heat dissipation assembly is fixedly arranged on the substrate; the heat dissipation assembly comprises a shell attached to the substrate, a plurality of heat dissipation fins distributed at equal intervals are arranged at the top of the shell, the heat dissipation fins and the shell are integrally formed, a heat conduction plate attached to the surface of the substrate is fixedly arranged at the bottom of the shell, a cavity is formed in the shell, and phase change liquid is arranged in the cavity; according to the power supply chip packaging structure capable of reducing the heat dissipation interference, an active heat dissipation effect can be formed, the chip can be maintained at a normal working temperature, and the problem that the performance of the chip is influenced and interfered due to high-temperature operation of the chip is avoided.

Description

TECHNICAL FIELD

[0001] The utility model relates to chip manufacturing technical field, concretely is a kind of power supply chip packaging structure for reducing heat dissipation interference. BACKGROUND

[0002] Power supply chip packaging structure refers to the physical structure of packaging power integrated circuit (IC) and its related elements together. This packaging not only protects the chip from external environment, but also provides electrical connection and heat dissipation management. In modern electronic devices, heat dissipation management is a key factor in design, especially in power-intensive applications. With the development of electronic devices towards higher performance and smaller size, the heat dissipation problem of power supply chip is increasingly prominent. Heat dissipation interference not only affects the working stability and life of power supply chip itself, but also has negative impact on surrounding circuits, leading to overall performance degradation of the system. SUMMARY

[0003] In view of the deficiencies of the prior art, the utility model provides a power supply chip packaging structure for reducing heat dissipation interference, which solves the technical problem of poor heat dissipation of existing power supply chip.

[0004] To solve the above technical problems, the utility model provides the following technical scheme: a power supply chip packaging structure for reducing heat dissipation interference, comprising a substrate, the substrate is composed of a lower layer and an upper layer, a resin plate is provided in the substrate, a core body is fixedly provided on the resin plate, a pin is connected to one side of the core body by a bonding wire, the pin extends to the outside of the substrate, the core body, the bonding wire and the pin are all encapsulated in the substrate, and a heat dissipation assembly is fixedly provided on the substrate.

[0005] The heat dissipation assembly comprises a shell which is attached to the substrate, a plurality of equidistantly distributed heat dissipation fins are provided on the top of the shell, the heat dissipation fins are integrally formed with the shell, a heat conduction plate which is attached to the surface of the substrate is fixedly provided at the bottom of the shell, a cavity is provided in the shell, a phase change liquid is provided in the cavity, the area of the cavity close to the bottom of the shell is an evaporation cavity, and the area of the cavity close to the inside of the heat dissipation fins is a heat dissipation cavity.

[0006] Preferably, a sealing ring is provided on the substrate, and an annular groove is formed between the position of the sealing ring protruding from the surface of the substrate.

[0007] Preferably, a protrusion is provided on the inner wall of the heat dissipation fin.

[0008] Preferably, air guide grooves are formed between the plurality of heat dissipation fins.

[0009] Preferably, a liquid adding port is provided on the side wall of the shell close to the bottom, and a sealing cover is provided at the liquid adding port.

[0010] Preferably, a metal cover is fixedly provided at the position close to the outer edge of the surface of the substrate, and a direction marker is provided on the metal cover.

[0011] By the above technical scheme, the utility model provides a power chip packaging structure of reducing heat dissipation interference, at least has the following beneficial effects:

[0012] 1、 this power chip packaging structure of reducing heat dissipation interference, through setting heat dissipation subassembly, the heat generated by chip operation is transferred to the phase change liquid in the evaporation cavity by the heat conduction plate, the phase change liquid is evaporated to gaseous state by heating, and the gaseous phase change liquid moves upward to the heat dissipation cavity, is cooled by the heat dissipation fin and makes it re-liquid, and the liquid phase change liquid reflows into the evaporation cavity under the action of gravity, and this circulates repeatedly, can form active heat dissipation effect, can maintain chip in normal working temperature, avoid the problem that chip high temperature operation influences and interferes with its performance.

[0013] 2、 this power chip packaging structure of reducing heat dissipation interference, by setting sealing ring, since annular groove is formed between the position of sealing ring and the surface of substrate protruding, when the shell and substrate are pasted, can ensure that the glue does not overflow, make the glue can be more evenly distributed, ensure the tightness of the pasting of both. BRIEF DESCRIPTION OF DRAWINGS

[0014] The drawings described herein are used to provide further understanding of the utility model and form part of the present application:

[0015] Figure 1 It is the three-dimensional structure schematic diagram of the utility model as a whole;

[0016] Figure 2 It is the structure schematic diagram of the utility model after substrate and heat dissipation subassembly are split;

[0017] Figure 3 It is the cross-sectional structure schematic diagram of the utility model of half cut;

[0018] Figure 4 It is the structure schematic diagram of the utility model of A place in; Figure 3

[0019] Reference signs:

[0020] 1, substrate; 101, lower layer plate; 102, upper layer plate; 2, resin plate; 3, core; 4, bonding wire; 5, pin; 6, heat dissipation subassembly; 601, shell; 602, heat conduction plate; 603, heat dissipation fin; 604, evaporation cavity; 605, heat dissipation cavity; 606, protrusion; 607, air guide groove; 608, liquid inlet; 7, sealing ring; 8, annular groove; 9, metal cover; 10, direction mark. DETAILED DESCRIPTION

[0021] ​Clearly and completely describe the technical scheme in the embodiments of the utility model with reference to the drawings in the embodiments of the utility model, obviously, the described embodiments are only a part of the embodiments of the utility model, not all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by the ordinary skill in the art without creative labor belong to the scope of the utility model protection.

[0022] The existing power chip packaging structure usually adopts traditional plastic packaging or ceramic packaging, which can provide heat dissipation performance to a certain extent, but still has some deficiencies. For example, the thermal conductivity of plastic packaging is relatively low, which may cause heat accumulation; and although the thermal conductivity of ceramic packaging is high, the cost is high and the processing is complex, which limits its universal application in some markets.

[0023] Based on the poor heat dissipation of the prior art, please refer to Figures 1-4 The utility model provides a power chip packaging structure of reducing heat dissipation interference can form active heat dissipation effect, can maintain chip in normal working temperature, avoid the problem that chip high temperature operation influences and interference to its performance, the packaging structure includes base plate 1, base plate 1 is composed of lower layer board 101 and upper layer board 102, resin plate 2 is equipped in base plate 1, resin plate 2 is fixed with core body 3, the one side of core body 3 is connected with pin 5 through bonding wire 4, pin 5 extends to the outside of base plate 1, core body 3, bonding wire 4 and pin 5 are all encapsulated in base plate 1, and heat dissipation assembly 6 is fixed on base plate 1;Further, the packaging of core body 3, bonding wire 4 and pin 5 are all prior art, and heat dissipation assembly 6 is added on base plate 1, which can realize rapid heat dissipation for the heat generated during the operation of the power chip, thereby ensuring the normal operation of the power chip.

[0024] To realize active heat dissipation effect, please refer to Figure 2 And Figure 3 Heat dissipation assembly 6 includes shell 601 arranged on base plate 1, a plurality of equidistantly distributed heat dissipation fins 603 are arranged on the top of shell 601, heat dissipation fins 603 are integrally formed with shell 601, heat conduction plate 602 is fixed on the bottom of shell 601 and is attached to the surface of base plate 1, cavity is arranged in shell 601, phase change liquid is arranged in the cavity, the area close to the bottom of shell 601 in the cavity is evaporation cavity 604, and the area close to the inside of heat dissipation fin 603 in the cavity is heat dissipation cavity 605;The heat generated by the operation of the chip is transmitted to the phase change liquid in the evaporation cavity 604 through heat conduction plate 602, the phase change liquid is evaporated into gas state by heating, the gaseous phase change liquid moves upward to the heat dissipation cavity 605, is cooled by heat dissipation fin 603 and is changed into liquid state again, and the liquid phase change liquid flows back to evaporation cavity 604 under the action of gravity, so as to realize active heat dissipation effect.

[0025] In order to improve the firmness of the heat dissipation assembly 6 and the substrate 1, a sealing ring 7 is arranged on the substrate 1, and an annular groove 8 is formed between the sealing ring 7 and the position protruding from the surface of the substrate 1; under the action of the annular groove 8, when the shell 601 is attached to the substrate 1, it can ensure that the glue does not overflow, so that the glue can be distributed more uniformly, and the tightness of the attachment of the two is ensured.

[0026] In order to improve the heat dissipation effect of the heat dissipation fins 603, protrusions 606 are arranged on the inner walls of the heat dissipation fins 603; the arrangement of the protrusions 606 can increase the contact area between the gaseous phase change liquid and the inner walls of the heat dissipation fins 603, so that the heat conduction effect is better.

[0027] In order to facilitate heat dissipation, air guide grooves 607 are formed between the plurality of heat dissipation fins 603; air flow can flow along the air guide grooves 607, thereby taking away the heat on the heat dissipation fins 603.

[0028] In order to facilitate the filling of the phase change liquid, a liquid filling port 608 is arranged on the side wall of the shell 601 close to the bottom, and a sealing cover is arranged at the liquid filling port 608; the phase change liquid can be added to the inside of the shell 601 through the liquid filling port 608.

[0029] In order to improve the pressure resistance of the chip, a metal cover 9 is fixedly arranged on the surface of the substrate 1 close to the outer edge, and a direction mark 10 is arranged on the metal cover 9; the metal cover 9 is used to protect the chip around, so that the pressure resistance and shock resistance are increased, and the arrangement of the direction mark 10 can ensure that the installation direction of the chip is not wrong.

[0030] As can be seen from the above embodiment, the heat generated by the chip operation is transmitted to the phase change liquid in the evaporation cavity 604 through the heat conduction plate 602, the phase change liquid is evaporated into a gaseous state by heat, the gaseous phase change liquid moves upward to the heat dissipation cavity 605, and is cooled by the heat dissipation fins 603 and becomes a liquid state again, and the liquid phase change liquid flows back to the evaporation cavity 604 under the action of gravity, thereby forming a complete heat dissipation cycle.

[0031] It should be noted that the terms "comprising", "including", or any other variant thereof are intended to cover non-exclusive inclusions, so that processes, methods, articles or devices including a series of elements not only include those elements, but also include other elements not explicitly listed, or inherent to such processes, methods, articles or devices.

[0032] Although the embodiments of the present application have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and variations can be made to the embodiments without departing from the principles and spirit of the present application, and the scope of the present application is defined by the appended claims and their equivalents.

Claims

1. A power chip package structure for reducing heat dissipation interference, comprising a substrate (1), characterized in that: The substrate (1) is composed of a lower layer plate (101) and an upper layer plate (102), a resin plate (2) is arranged in the substrate (1), a core (3) is fixedly arranged on the resin plate (2), a pin (5) is connected to one side of the core (3) through a bonding wire (4), the pin (5) extends to the outside of the substrate (1), the core (3), the bonding wire (4) and the pin (5) are all encapsulated in the substrate (1), and a heat dissipation assembly (6) is fixedly arranged on the substrate (1); The heat dissipation assembly (6) comprises a shell (601) arranged on the substrate (1), a plurality of equidistantly distributed heat dissipation fins (603) are arranged on the top of the shell (601), the heat dissipation fins (603) are integrally formed with the shell (601), a heat conduction plate (602) is fixedly arranged on the bottom of the shell (601) and is attached to the surface of the substrate (1), a cavity is arranged in the shell (601), a phase change liquid is arranged in the cavity, an evaporation cavity (604) is formed in the area close to the bottom of the shell (601), and a heat dissipation cavity (605) is formed in the area close to the inside of the heat dissipation fins (603).

2. The power chip package structure for reducing heat dissipation interference of claim 1, wherein: The substrate (1) is provided with a sealing ring (7), and an annular groove (8) is formed between the sealing ring (7) and the position protruding from the surface of the substrate (1).

3. The power chip package structure for reducing heat dissipation interference of claim 1, wherein: The inner wall of the heat dissipation fin (603) is provided with a protrusion (606).

4. The power chip package structure for reducing heat dissipation interference of claim 1, wherein: Air guide grooves (607) are formed between the plurality of heat dissipation fins (603).

5. The power chip package structure for reducing heat dissipation interference of claim 1, wherein: A liquid adding port (608) is arranged on the side wall close to the bottom of the shell (601), and a sealing cover is arranged at the liquid adding port (608).

6. The power chip package structure with reduced thermal interference of claim 1, wherein: A metal cover (9) is fixedly arranged on the position close to the outer edge of the surface of the substrate (1), and a direction mark (10) is arranged on the metal cover (9).

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