Multilayer ceramic capacitor
By introducing a floating electrode into a multilayer ceramic capacitor, the deformation problem caused by the inverse piezoelectric effect in high-voltage, high-capacitance capacitors is solved, the deformation resistance of the central region is enhanced, the failure risk is reduced, and the stability is improved.
Patent Information
- Application Number
- CN202520146302.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-22
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2035-01-22
AI Technical Summary
High-voltage and high-capacitance multilayer ceramic capacitors are prone to deformation due to the inverse piezoelectric effect during use, posing a risk of failure.
In multilayer ceramic capacitors, floating electrodes are introduced. By setting several layers of floating electrodes stacked between the dielectric layers, the toughness and strength of the central region are enhanced. The floating electrodes are made of the same material as the electrode layers, are alternately set and distributed at the center of the cross-section of the dielectric layer, and ensure that the shrinkage coefficient difference is less than 5%.
This reduces the probability of capacitor failure due to the inverse piezoelectric effect, improves the deformation resistance of the central region, and enhances the stability of the capacitor.
Smart Images

Figure CN223842775U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of ceramic capacitor technology, specifically to a multilayer ceramic capacitor. Background Technology
[0002] Currently, multilayer ceramic capacitors generally use substances such as barium titanate as the dielectric layer, such as... Figure 1 As shown, substances such as barium titanate have the inverse piezoelectric effect, that is, when an electric field is applied in the polarization direction of the dielectric, the dielectric will produce a certain mechanical deformation in a certain direction. Furthermore, multilayer ceramic capacitors can usually be regarded as multiple parallel plate capacitors connected in parallel. When a voltage is applied across the capacitor, the capacitor will also deform under the action of the inverse piezoelectric effect of the dielectric layer material.
[0003] Therefore, multilayer ceramic capacitors with high voltage and high capacitance are characterized by high operating voltage and a large number of electrode layers. This makes the inverse piezoelectric effect of high-voltage, high-capacitance multilayer ceramic capacitors more severe. In conventionally designed products, due to the inverse piezoelectric effect of the dielectric layer (barium titanate), the dielectric layer deforms during use. The deformation of multiple dielectric layers is superimposed, making the central area of the capacitor the area of maximum stress. This makes the product prone to failure during use. Summary of the Invention
[0004] To address the shortcomings of existing technologies, this invention provides a multilayer ceramic capacitor that solves the problem of deformation that easily occurs during the use of high-voltage and high-capacitance multilayer ceramic capacitors.
[0005] To achieve the above objectives, this utility model provides the following technical solution:
[0006] A multilayer ceramic capacitor includes several dielectric layers, a protective cover for protection on the outside of the dielectric layers, a conductive layer between the ends of the dielectric layers, a protective layer on the conductive layer, an electrode layer between adjacent dielectric layers, and several stacked floating electrodes for resisting deformation between several adjacent dielectric layers.
[0007] Preferably, the difference in the shrinkage coefficient between the suspended electrode and the dielectric layer material is less than or equal to 5%.
[0008] Preferably, the floating electrodes, which are stacked in several layers, are disposed between several dielectric layers located in the middle layer.
[0009] Preferably, the suspended electrode and the dielectric layer are alternately arranged.
[0010] Preferably, the suspended electrode is disposed at the center of the cross-section of the dielectric layer.
[0011] Preferably, the boundary of the suspended electrode does not intersect with the boundary of the cross section where the dielectric layer is located.
[0012] Preferably, the suspended electrode is made of the same material as the electrode layer.
[0013] Preferably, the thickness of the suspended electrode is the same as the thickness of the electrode layer.
[0014] Compared with the prior art, the present invention provides a multilayer ceramic capacitor with the following advantages:
[0015] 1. By setting several layers of floating electrodes stacked between several adjacent dielectric layers to resist deformation, the toughness and strength of the floating electrodes enhance the ability of the central region of the capacitor to resist the reverse piezoelectric effect, thereby greatly reducing the probability of capacitor failure due to the reverse piezoelectric effect during use.
[0016] 2. By setting the floating electrode in the middle region of the capacitor height direction, the deformation resistance of the area with the greatest deformation can be greatly improved, unnecessary waste of the floating electrode can be reduced, and the stability of the capacitor can be improved during use. Attached Figure Description
[0017] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0018] Figure 1 This is a schematic diagram of a conventional multilayer ceramic capacitor according to the present invention;
[0019] Figure 2 This is a schematic diagram of the multilayer ceramic capacitor of this utility model.
[0020] In the diagram: 1. Dielectric layer; 2. Protective cap; 3. Conductive layer; 4. Protective layer; 5. Electrode layer; 6. Floating electrode. Detailed Implementation
[0021] The following will describe in detail the implementation of this application with reference to the accompanying drawings and embodiments, so that the implementation process of how this application uses technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.
[0022] To address the problem of deformation that easily occurs during the use of current high-voltage and high-capacitance multilayer ceramic capacitors, this invention provides a multilayer ceramic capacitor, such as... Figure 2As shown, L and W represent the length direction, and T represents the height direction of the capacitor, i.e., the stacking direction of the electrode layer 5. By adding a certain number of floating electrodes 6 in the middle of the capacitor, the toughness and strength of the central area of the capacitor are increased, thereby reducing the risk of product failure caused by deformation due to the inverse piezoelectric effect during use. The multilayer ceramic capacitor includes several dielectric layers 1, a protective cover 2 for protection is provided outside the several dielectric layers 1, a conductive layer 3 is provided between the ends of the several dielectric layers 1, a protective layer 4 is provided on the conductive layer 3, an electrode layer 5 is provided between adjacent dielectric layers 1, and several stacked floating electrodes 6 are provided between several adjacent dielectric layers 1 to resist deformation. The toughness and strength of the floating electrodes 6 enhance the ability of the central area of the capacitor to resist the inverse piezoelectric effect.
[0023] To prevent cracking of the levitation electrode 6 and dielectric layer 1 during sintering or other environmental changes due to poor bonding and different thermal shrinkage coefficients, the difference in shrinkage coefficients between the levitation electrode 6 and dielectric layer 1 should be less than or equal to 5%. Experiments have shown that this can effectively guarantee the pass rate of the finished product. To facilitate the selection of materials for the levitation electrode 6, it is generally sufficient to directly select the same material as the electrode layer 5. For example, the electrode layer 5 of the current mainstream ceramic capacitor is made of nickel, so the levitation electrode 6 can also be made of nickel, because the material of the electrode layer 5 has been verified by a large number of experiments to be a good material.
[0024] Since the capacitor is prone to deformation in the central region along the height direction, several layers of dielectric layer 1 are arranged between several layers of dielectric layer 1 in the middle layer to improve the deformation resistance of this region and reduce unnecessary waste of floating electrodes 6, so that the floating electrodes 6 are not evenly distributed throughout the capacitor. This improves the deformation resistance of the location that is prone to product failure. The number of floating electrode layers 6 is determined according to the number of capacitor electrode layers 5. For example, for a capacitor with 70 electrode layers 5, 4-6 layers of floating electrodes 6 can be inserted.
[0025] The floating electrodes 6 can be stacked one after another or with gaps between them. To facilitate the processing of the capacitor and reduce the cumbersome process of stacking several floating electrodes 6 one after another, the floating electrodes 6 and the dielectric layer 1 are arranged alternately, thus setting them up in a stacked form with gaps between them. Although the floating electrodes 6 are not electrically led out, that is, the floating electrodes 6 are not connected to the conductive terminals of the capacitor (i.e., the conductive layer 3), they themselves will generate induced charges, and a potential difference will still be generated between the floating electrodes 6. Therefore, the dielectric layer 1 between the floating electrodes 6 needs to have a certain thickness to ensure that the floating electrodes 6 will not be broken down. Therefore, the floating electrodes 6 and the dielectric layer 1 are arranged alternately.
[0026] Since the deformation area is mainly distributed in the dielectric layer 1 of the capacitor's middle layer, and the deformation is greatest at the center of the cross-section of the dielectric layer 1, the position of the floating electrode 6 is further adjusted so that the floating electrode 6 is located at the center of the cross-section of the dielectric layer 1.
[0027] Regarding the length and width of the floating electrode 6, since the floating electrode 6 itself also generates induced charges, the floating electrode 6 should also have sufficient length and width margins to ensure that the capacitor does not fail. The boundary of the floating electrode 6 does not intersect with the boundary of the cross-section where the dielectric layer 1 is located, that is, there is a margin in the horizontal direction between the floating electrode 6 and the edge of the capacitor cross-section, i.e., a certain distance is maintained.
[0028] The thermal shrinkage coefficient of the suspended electrode 6 needs to be within a certain range as that of the electrode layer 5. Therefore, in order to facilitate the unified processing of the electrode layer 5 and the suspended electrode 6, the materials of the suspended electrode 6 and the electrode layer 5 are the same, so that only the size needs to be different.
[0029] Regarding the thickness of the suspended electrode 6, the suspended electrode 6 cannot be too thin. If the suspended electrode 6 is too thin, it will not have enough toughness and strength to resist the stress generated by the inverse piezoelectric effect. If the suspended electrode 6 is too thick, even if the thermal shrinkage coefficients of the suspended electrode 6 and the dielectric layer 1 are similar, the larger thickness will increase the shrinkage difference between the suspended electrode 6 and the dielectric layer 1, which may lead to phenomena such as sintering cracking. Therefore, in order to facilitate processing and uniformity, the thickness of the suspended electrode 6 is the same as the thickness of the electrode layer 5.
[0030] It should be noted that, in this document, the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.
[0031] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A multilayer ceramic capacitor, comprising a plurality of dielectric layers (1), a protective cover (2) for protection disposed outside the plurality of dielectric layers (1), a conductive layer (3) disposed between the ends of the plurality of dielectric layers (1), a protective layer (4) disposed on the conductive layer (3), and an electrode layer (5) disposed between adjacent dielectric layers (1), characterized in that, A series of floating electrodes (6) are disposed between several adjacent dielectric layers (1) to resist deformation.
2. A multilayer ceramic capacitor according to claim 1, characterized in that, The difference in the shrinkage coefficient between the suspended electrode (6) and the dielectric layer (1) is less than or equal to 5%.
3. A multilayer ceramic capacitor according to claim 1, characterized in that, The floating electrodes (6) are stacked in several layers and disposed between several dielectric layers (1) located in the middle layer.
4. A multilayer ceramic capacitor according to claim 3, characterized in that, The suspended electrode (6) and the dielectric layer (1) are alternately arranged.
5. A multilayer ceramic capacitor according to claim 1, characterized in that, The suspended electrode (6) is located at the center of the cross-section of the dielectric layer (1).
6. A multilayer ceramic capacitor according to claim 4, characterized in that, The boundary of the suspended electrode (6) does not intersect with the boundary of the cross section where the dielectric layer (1) is located.
7. A multilayer ceramic capacitor according to claim 1, characterized in that, The suspended electrode (6) is made of the same material as the electrode layer (5).
8. A multilayer ceramic capacitor according to claim 1, characterized in that, The thickness of the suspended electrode (6) is the same as the thickness of the electrode layer (5).