Display panel and display device

Abstract

The utility model provides a display panel and a display device, relates to the technical field of display, and is used for solving the problem that the display effect of a display product is affected due to the fact that signal lines for transmitting different types of signals are prone to mutual crosstalk near a hole area. The display panel comprises a hole area, a winding area and a display area. The winding area is located between the hole area and the display area and surrounds the hole area. The display panel further comprises a plurality of first signal lines, a plurality of second signal lines and a shielding layer, each first signal line comprises a first winding part located in the winding area, and the first winding parts are arranged around at least part of the edge of the hole area; the second signal line comprises a second winding part located in the winding area, and the second winding part is arranged around at least part of the edge of the hole area; the shielding layer is arranged around at least part of the edge of the hole area, and at least part of the orthographic projection of the shielding layer on a substrate of the display panel is located between the orthographic projection of the first winding part on the substrate and the orthographic projection of the second winding part on the substrate.

Description

TECHNICAL FIELD

[0001] The utility model relates to display technical field especially relates to a display panel and display device. BACKGROUND

[0002] With the continuous development of display technology, consumers are increasingly demanding on the display quality and appearance design of display products. In order to improve the appearance design of display products, reduce the frame width of display products, the camera and other sensing components included in the display products are integrated in the hole area of the display products, and the hole area is generally surrounded by the display area, so part of the wiring in the display area needs to bypass the hole area, however, this part of the wiring is usually used to transmit different kinds of signals, which leads to the problem that mutual crosstalk between signal lines transmitting different kinds of signals near the hole area, affecting the display effect of the display product. SUMMARY

[0003] The utility model discloses a display panel and display device, which can solve the problem of mutual crosstalk between signal lines transmitting different kinds of signals near the hole area, affecting the display effect of the display product.

[0004] To achieve the above object, the utility model provides the following technical scheme:

[0005] The utility model discloses a display panel, comprising: hole area, winding area and display area, the winding area is located between the hole area and the display area, and the winding area surrounds the hole area.

[0006] A plurality of first signal lines, the first signal line includes the first winding part in the winding area, and the first winding part is arranged around at least part of the edge of the hole area.

[0007] A plurality of second signal lines, the second signal line includes the second winding part in the winding area, and the second winding part is arranged around at least part of the edge of the hole area.

[0008] A shielding layer is arranged around at least part of the edge of the hole area, and at least part of the shielding layer on the substrate of the display panel is located between the first winding part on the substrate and the second winding part on the substrate.

[0009] Optionally, the display panel further comprises a light shielding layer and a plurality of display sub-pixels; the light shielding layer comprises a plurality of light shielding patterns and a plurality of first connection lines arranged in an array, the light shielding patterns in the same row in the first direction are coupled by the corresponding first connection lines, and the orthographic projection of the light shielding pattern on the substrate substrate at least partially overlaps with the orthographic projection of the transistor structure in the corresponding display sub-pixel on the substrate substrate; the shielding layer is coupled with at least part of the first connection line.

[0010] Optionally, the shielding layer and the light shielding layer are arranged in the same layer and the same material.

[0011] Optionally, the display panel further comprises a power signal line, and the light shielding layer is coupled with the power signal line.

[0012] Optionally, the orthographic projection of the first winding portion on the substrate substrate does not overlap with the orthographic projection of the second winding portion on the substrate substrate.

[0013] Optionally, the orthographic projection of the first winding portion on the substrate substrate is located between the orthographic projection of the second winding portion on the substrate substrate and the orthographic projection of the hole region on the substrate substrate.

[0014] Optionally, the orthographic projection of the second winding portion on the substrate substrate is located between the orthographic projection of the first winding portion on the substrate substrate and the orthographic projection of the hole region on the substrate substrate.

[0015] Optionally, the first signal line further comprises two first lead portions arranged in the second direction, the first lead portion extends in the second direction, the first winding portion is located between the two first lead portions, the first end of the first winding portion is coupled with one of the first lead portions, and the second end of the first winding portion is coupled with the other first lead portion.

[0016] The second signal line further comprises two second lead portions arranged in the first direction, the second lead portion extends in the first direction, the second winding portion is located between the two second lead portions, the first end of the second winding portion is coupled with one of the second lead portions, and the second end of the second winding portion is coupled with the other second lead portion; the second direction intersects with the first direction.

[0017] Optionally, the plurality of first signal lines are divided into a first group of first signal line groups and a second group of first signal line groups, the first group of first signal line groups comprises n1 first signal lines, and the second group of first signal line groups comprises n2 first signal lines.

[0018] Along the first direction, the first winding portions included in the n1 first signal lines are located at a first side of the aperture region, and the first winding portions included in the n2 first signal lines are located at a second side of the aperture region, wherein n1 is equal to or different from n2.

[0019] Optionally, the display region further includes a plurality of virtual sub-pixels, and a projection of the first winding portions included in the n2 first signal lines on the substrate substrate is located between a projection of the virtual sub-pixels on the substrate substrate and a projection of the aperture region on the substrate substrate; n2 is greater than n1.

[0020] Optionally, the winding region includes a first sub-region and a second sub-region opposite to each other along the first direction, the first winding portions included in the n1 first signal lines are arranged in the first sub-region, and the first winding portions included in the n2 first signal lines are arranged in the second sub-region, wherein a width of the first sub-region is less than a width of the second sub-region in an extension direction of a diameter of the aperture region parallel to the first direction.

[0021] Optionally, the plurality of second signal lines are divided into a first group of second signal line groups and a second group of second signal line groups, the first group of second signal line groups includes m1 second signal lines, and the second group of second signal line groups includes m2 second signal lines.

[0022] Along the second direction, the second winding portions included in the m1 second signal lines are located at a third side of the aperture region, and the second winding portions included in the m2 second signal lines are located at a fourth side of the aperture region, wherein m1 is equal to or different from m2.

[0023] Optionally, the display region further includes a plurality of virtual sub-pixels, and a projection of the second winding portions included in the m2 second signal lines on the substrate substrate is located between a projection of the virtual sub-pixels on the substrate substrate and a projection of the aperture region on the substrate substrate; m2 is greater than m1.

[0024] Optionally, the winding region includes a third sub-region and a fourth sub-region opposite to each other along the second direction, the second winding portions included in the m1 second signal lines are arranged in the third sub-region, and the second winding portions included in the m2 second signal lines are arranged in the fourth sub-region, wherein a width of the third sub-region is equal to a width of the fourth sub-region in an extension direction of a diameter of the aperture region parallel to the second direction.

[0025] Optionally, the display panel includes at least two aperture regions, and the plurality of virtual sub-pixels are located between two adjacent aperture regions.

[0026] Optionally, the wiring manners of the wire winding regions around the periphery of each hole region are the same.

[0027] Optionally, the first wire winding portions included in the plurality of first signal lines have projections on the substrate substrate, and the projections are arranged in sequence in a direction close to the hole region, and adjacent first wire winding portions are arranged in different layers; and / or the second wire winding portions included in the plurality of second signal lines have projections on the substrate substrate, and the projections are arranged in sequence in a direction close to the hole region, and adjacent second wire winding portions are arranged in different layers.

[0028] Optionally, the display panel includes a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer arranged in sequence in a direction away from the substrate substrate.

[0029] In the plurality of first signal lines, a part of the first signal lines includes the first wire winding portion and the first source-drain metal layer arranged in the same layer and the same material, and another part of the first signal lines includes the first wire winding portion and the second source-drain metal layer arranged in the same layer and the same material.

[0030] In the plurality of second signal lines, a part of the second signal lines includes the second wire winding portion and the first gate metal layer arranged in the same layer and the same material, and another part of the second signal lines includes the second wire winding portion and the second gate metal layer arranged in the same layer and the same material.

[0031] Optionally, the first signal line includes a data line, and the second signal line includes a scan line.

[0032] Based on the above-mentioned display panel technical scheme, the utility model provides a kind of display device, comprising above-mentioned display panel.

[0033] In the technical scheme provided by the utility model, the first wire winding portion included in the first signal line and the second wire winding portion included in the second signal line are arranged around at least part of the edge of the hole region;At the same time, the shielding layer included in the display panel is also arranged around at least part of the edge of the hole region, and at least part of the projection of the shielding layer on the substrate substrate of the display panel is located between the projection of the first wire winding portion on the substrate substrate and the projection of the second wire winding portion on the substrate substrate;So the shielding layer can effectively shield the crosstalk between the signal transmitted by the first signal line and the second signal transmitted by the second signal line, and ensure the display effect of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0034] The accompanying drawings, which are included to provide a further understanding of the present application and are incorporated in and constitute a part of this application, illustrate embodiments of the present application and together with the description serve to explain the present application. In the drawings:

[0035] Figure 1 A layout schematic diagram of a hole region and a winding region in a display panel provided by an embodiment of the present application;

[0036] Figure 2 A layout schematic diagram of a first signal line in a left upper portion of a hole region; Figure 1

[0037] A layout schematic diagram of a second signal line in a left upper portion of a hole region; Figure 3 Figure 1 A layout schematic diagram of a first signal line and a second signal line in a left upper portion of a hole region;

[0038] Figure 4 Figure 1 A layout schematic diagram of a first signal line and a second signal line and a shielding layer in a left upper portion of a hole region;

[0039] Figure 5 A layout schematic diagram of a first signal line and a second signal line and a shielding layer in a right upper portion of a hole region; Figure 1

[0040] A layout schematic diagram of a first signal line and a second signal line and a shielding layer in a right lower portion of a hole region; Figure 6 Figure 1 A layout schematic diagram of a first signal line in a hole region provided by an embodiment of the present application;

[0041] Figure 7 Figure 1 A layout schematic diagram of a second signal line in a hole region provided by an embodiment of the present application;

[0042] Figure 8 A layout schematic diagram of a first signal line in a hole region provided by an embodiment of the present application; Figure 1

[0043] A layout schematic diagram of a second signal line in a hole region provided by an embodiment of the present application; Figure 9

[0044] A layout schematic diagram of a first signal line in a hole region provided by an embodiment of the present application; Figure 10

[0045] A layout schematic diagram of a second signal line in a hole region provided by an embodiment of the present application; Figure 11 DETAILED DESCRIPTION

[0046] ​​​​​In order to further illustrate the display panel and the display device provided by the embodiments of the present application, the following will make a detailed description in combination with the drawings.

[0047] Please refer to Figures 1 to 8 The display panel provided by the embodiments of the present application comprises a hole region 10, a winding region 20 and a display region, the winding region 20 is located between the hole region 10 and the display region, and the winding region 20 surrounds the hole region 10; and the display panel further comprises:

[0048] A plurality of first signal lines 41, the first signal lines 41 comprise a first winding part 410 located in the winding region 20, and the first winding part 410 is arranged around at least a part of the edge of the hole region 10;

[0049] A plurality of second signal lines 42, the second signal lines 42 comprise a second winding part 420 located in the winding region 20, and the second winding part 420 is arranged around at least a part of the edge of the hole region 10;

[0050] A shielding layer 50, the shielding layer 50 is arranged around at least a part of the edge of the hole region 10, and at least a part of the orthogonal projection of the shielding layer 50 on the substrate of the display panel is located between the orthogonal projection of the first winding part 410 on the substrate and the orthogonal projection of the second winding part 420 on the substrate.

[0051] For example, the display panel comprises at least one hole region 10, at least one winding region 20 and a display region, the winding region 20 surrounds the corresponding hole region 10, and the display region surrounds each winding region 20. The hole region 10 is used for arranging a camera and other sensing components, the winding region 20 is used for arranging signal lines in the display panel, and the display region comprises sub-pixels arranged in an array.

[0052] For example, the first signal lines 41 comprise a first winding part 410 located in the winding region 20, and the first winding part 410 extends along at least a part of the boundary of the hole region 10. The second signal lines 42 comprise a second winding part 420 located in the winding region 20, and the second winding part 420 extends along at least a part of the boundary of the hole region 10. The first signal lines 41 and the second signal lines 42 are used for transmitting different signals.

[0053] For example, the shielding layer 50 extends along at least a part of the boundary of the hole region 10, and the shielding layer 50 has a stable electric potential. For example, the shielding layer 50 can surround the hole region 10, but is not limited thereto.

[0054] For example, the width of the shielding layer 50 around the hole area 10 may be uniform or non-uniform, which is not limited here.

[0055] As can be seen from the specific structure of the display panel described above, in the display panel provided by this utility model embodiment, the first winding portion 410 of the first signal line 41 and the second winding portion 420 of the second signal line 42 are both arranged around at least a portion of the edge of the hole area 10; at the same time, the shielding layer 50 included in the display panel is also arranged around at least a portion of the edge of the hole area 10, and at least a portion of the orthographic projection of the shielding layer 50 on the substrate of the display panel is located between the orthographic projection of the first winding portion 410 on the substrate and the orthographic projection of the second winding portion 420 on the substrate; in this way, the shielding layer 50 can effectively shield the crosstalk between the signal transmitted by the first signal line 41 and the second signal transmitted by the second signal line 42, ensuring the display effect of the display panel.

[0056] like Figures 1 to 8 As shown, in some embodiments, the display panel further includes a light-shielding layer 51 and a plurality of display sub-pixels (located in the display sub-pixel layout area Q5); the light-shielding layer 51 includes a plurality of light-shielding patterns 511 arranged in an array and a plurality of first connecting lines 512, the light-shielding patterns 511 located in the same row along a first direction are coupled to each other by corresponding first connecting lines 512, the orthographic projection of the light-shielding pattern 511 on the substrate overlaps at least partially with the orthographic projection of the transistor structure in the corresponding display sub-pixel on the substrate; the shielding layer 50 is coupled to at least a portion of the first connecting lines 512.

[0057] For example, the display substrate includes a plurality of display sub-pixels, and the plurality of sub-pixel driving circuits included in the plurality of display sub-pixels are arranged in an array. The plurality of sub-pixel driving circuits are divided into multiple rows of sub-pixel driving circuits and multiple columns of sub-pixel driving circuits. The multiple rows of sub-pixel driving circuits are arranged along a second direction, and each row of sub-pixel driving circuits includes a plurality of sub-pixel driving circuits arranged along a first direction. The multiple columns of sub-pixel driving circuits are arranged along the first direction, and each column of sub-pixel driving circuits includes a plurality of sub-pixel driving circuits arranged along a second direction. For example, the first direction includes a horizontal direction, and the second direction includes a vertical direction.

[0058] For example, the display sub-pixel includes a sub-pixel driving circuit and a light-emitting element. The sub-pixel driving circuit is coupled to the anode of the light-emitting element and is used to provide a driving signal to the light-emitting element to drive it to emit light.

[0059] Exemplarily, the sub-pixel driving circuit comprises a plurality of transistor structures and a storage capacitor, for example, the sub-pixel driving circuit adopts a 7T1C (i.e., 7 transistors and 1 capacitor) circuit structure, an 8T1C (i.e., 8 transistors and 1 capacitor) circuit structure, a 9T1C (i.e., 9 transistors and 1 capacitor) circuit structure, but is not limited thereto.

[0060] Exemplarily, the light shielding layer 51 comprises a plurality of light shielding patterns 511 distributed in an array, a plurality of first connection lines 512 and a plurality of second connection lines, the light shielding patterns 511 located in the same row along a first direction are coupled through the corresponding first connection lines 512, and the light shielding patterns 511 located in the same column along a second direction are coupled through the corresponding second connection lines, so that the light shielding layer 51 is formed in a grid structure.

[0061] Exemplarily, a projection of the light shielding pattern 511 on the substrate substrate at least partially overlaps a projection of a driving transistor in the corresponding sub-pixel driving circuit on the substrate substrate; and / or, a projection of the light shielding pattern 511 on the substrate substrate at least partially overlaps a projection of a compensation transistor in the corresponding sub-pixel driving circuit on the substrate substrate; and / or, a projection of the light shielding pattern 511 on the substrate substrate at least partially overlaps a projection of a data writing transistor in the corresponding sub-pixel driving circuit on the substrate substrate, but is not limited thereto.

[0062] Exemplarily, the light shielding layer 51 is located on a side of the sub-pixel driving circuit facing the substrate substrate, and the light shielding layer 51 has a stable potential.

[0063] Exemplarily, the shielding layer 50 and the light shielding layer 51 are provided in the same layer and of the same material, so that the shielding layer 50 and the first connection line 512 are formed in an integrated structure, but are not limited thereto. This arrangement enables the shielding layer 50 and the light shielding layer 51 to be formed simultaneously in the same patterning process, which is beneficial to simplify the manufacturing process flow of the display panel and reduce the manufacturing cost of the display panel.

[0064] In the display panel provided by the above embodiment, the shielding layer 50 and the light shielding layer 51 are coupled, so that the shielding layer 50 has the same stable potential as the light shielding layer 51, thereby ensuring the effective shielding effect of the shielding layer 50.

[0065] In some embodiments, the display panel further comprises a power signal line, and the light shielding layer 51 is coupled with the power signal line.

[0066] Exemplarily, the power signal line is used to transmit a power signal with a stable potential. The light shielding layer 51 is coupled with the power signal line, so that the light shielding layer 51 has the same stable potential as the power signal. Further, the shielding layer 50 is coupled with the light shielding layer 51, so that the shielding layer 50 has the same stable potential as the power signal, thereby ensuring the shielding effect of the shielding layer 50.

[0067] Exemplarily, the power signal line can be arranged in a display area of the display panel or a peripheral area located at a periphery of the display area, which is not limited herein.

[0068] As shown in Figures 1 to 8 In some embodiments, the first wire-wound portion 410 has a non-overlapping orthographic projection on the substrate with the orthographic projection of the second wire-wound portion 420 on the substrate.

[0069] Exemplarily, the first signal line 41 includes a data line for transmitting a data signal, and the second signal line 42 includes a scan line for transmitting a scan signal.

[0070] Exemplarily, the scan line includes at least one of a gate line, a reset signal line, and a light-emitting control signal line, but is not limited thereto.

[0071] The second signal line 42 has various layout modes. For example, a first gate line and a third reset signal line that need to be wire-wound in the hole area 10 are connected together and reuse the same second signal line 42 to bypass the hole area 10. The first gate line is coupled with a first row of sub-pixel drive circuits arranged in a first direction along the hole area 10. The third reset signal line is coupled with a third row of sub-pixel drive circuits arranged in the first direction along the hole area 10.

[0072] For example, a first light-emitting control signal line and a second light-emitting control signal line that need to be wire-wound in the hole area 10 are connected together and reuse the same second signal line 42 to bypass the hole area 10. The first light-emitting control signal line is coupled with a first row of sub-pixel drive circuits arranged in a first direction along the hole area 10. The second light-emitting control signal line is coupled with a second row of sub-pixel drive circuits arranged in the first direction along the hole area 10.

[0073] For example, the first gate line and the second reset signal line that need to be wound in the aperture region 10 are connected together and the same second signal line 42 is reused to bypass the aperture region 10. The first gate line is coupled to the first row of sub-pixel driving circuits, which are arranged along the first direction with the aperture region 10. The second reset signal line is coupled to the second row of sub-pixel driving circuits, which are arranged along the first direction with the aperture region 10.

[0074] For example, each light-emitting control signal line that needs to be wound in the aperture area 10 bypasses the aperture area 10 through an independent second signal line 42.

[0075] like Figure 4 and Figure 5 As shown, exemplarily, the orthographic projection of the first winding portion 410 on the substrate is located between the orthographic projection of the second winding portion 420 on the substrate and the orthographic projection of the hole region 10 on the substrate.

[0076] For example, the orthographic projection of the second winding portion 420 on the substrate is located between the orthographic projection of the first winding portion 410 on the substrate and the orthographic projection of the hole region 10 on the substrate.

[0077] The above-mentioned arrangement ensures that the orthographic projection of the first winding portion 410 on the substrate does not overlap with the orthographic projection of the second winding portion 420 on the substrate. This allows the first signal line 41 and the second signal line 42 to be wound in separate areas within the winding region, reducing the overlap area between the first signal line and the second signal line. This effectively reduces the impact of the second signal transition transmitted by the second signal line 42 on the first signal transmitted by the first signal line 41, thereby significantly improving the display quality of the display panel.

[0078] like Figures 1 to 8 As shown, in some embodiments, the first signal line 41 further includes two first lead portions 411 arranged along a second direction, the first lead portions 411 extending along the second direction, the first winding portion 410 located between the two first lead portions 411, a first end of the first winding portion 410 coupled to one of the first lead portions 411, and a second end of the first winding portion 410 coupled to the other first lead portion 411;

[0079] The second signal line 42 further comprises two second lead portions 421 arranged along the first direction, the second lead portions 421 extend along the first direction, the second winding portion 420 is located between the two second lead portions 421, the first end of the second winding portion 420 is coupled with one of the second lead portions 421, and the second end of the second winding portion 420 is coupled with the other second lead portion 421; the second direction intersects the first direction.

[0080] For example, the first lead portion 411 and the first winding portion 410 are formed as an integral structure, and the second lead portion 421 and the second winding portion 420 are formed as an integral structure, but not limited thereto.

[0081] For example, the first lead portion 411 and the second lead portion 421 are both located in the winding area 20.

[0082] For example, the first signal line 41 further comprises two data transmission portions located in the display area, the two data transmission portions are coupled with the two first lead portions 411 one by one, and the two first lead portions 411 and the first winding portion 410 are both located between the two data transmission portions.

[0083] For example, the second signal line 42 further comprises at least two scan transmission portions located in the display area, and the second lead portion 421 is coupled with the corresponding at least one scan transmission portion. For example, the second signal line 42 comprises two scan transmission portions, the two scan transmission portions are coupled with the two second lead portions 421 one by one, and the two second lead portions 421 and the second winding portion 420 are both located between the two scan transmission portions. For another example, the second signal line 42 comprises four scan transmission portions, the four scan transmission portions are divided into two groups of transmission groups, each group of transmission groups comprises two scan transmission portions, the two second lead portions 421 correspond to the two groups of transmission groups one by one, the second lead portion 421 is coupled with the two scan transmission portions in the corresponding group of transmission groups, and the two second lead portions 421 and the second winding portion 420 are both located between the two groups of transmission groups.

[0084] For example, each group of transmission groups comprises two scan transmission portions, which can comprise a gate line and a reset signal line, or two light-emitting control signal lines, but not limited thereto.

[0085] It is worth noting that the orthographic projection of the first lead portion 411 on the substrate cannot avoid overlapping with the orthographic projection of the second winding portion 420 on the substrate, but the overlapping area is small, and compared with the prior art, the orthographic projection of the first signal line 41 and the second signal line 42 on the substrate is greatly reduced, thereby effectively improving the crosstalk problem between the first signal transmitted by the first signal line 41 and the second signal transmitted by the second signal line 42.

[0086] In the display panel provided by the above embodiment, by arranging the first signal line 41 to include the first winding portion 410 and the first lead portion 411, not only is it ensured that the first signal line 41 can bypass the hole region 10, but also good connection between the part of the first signal line 41 located in the winding region 20 and the part of the first signal line 41 located in the display region is ensured.

[0087] In the display panel provided by the above embodiment, by arranging the second signal line 42 to include the second winding portion 420 and the second lead portion 421, not only is it ensured that the second signal line 42 can bypass the hole region 10, but also good connection between the part of the second signal line 42 located in the winding region 20 and the part of the second signal line 42 located in the display region is ensured.

[0088] As shown in Figure 1 , Figure 9 and Figure 11 In some embodiments, the plurality of first signal lines 41 are divided into a first group of first signal line groups Z1 and a second group of first signal line groups Z2, the first group of first signal line groups Z1 includes n1 first signal lines 41, and the second group of first signal line groups Z2 includes n2 first signal lines 41.

[0089] In the first direction, the first winding portion 410 included in the n1 first signal lines 41 is located on the first side of the hole region 10, and the first winding portion 410 included in the n2 first signal lines 41 is located on the second side of the hole region 10, and n1 and n2 are equal or not equal.

[0090] It should be noted that Figures 9 to 11 the position indicated by the arrow represents the boundary position between adjacent signal line groups. Figure 9 and Figure 10 The outer isolation column 91 and the inner isolation column 92 are also shown in The number of outer isolation columns 91 and inner isolation columns 92 is not specifically limited, for example, the number of outer isolation columns 91 is greater than the number of inner isolation columns 92, but is not limited thereto. Figures 9 to 11The structure inside the middle hole area 10 will eventually be removed, and the area between the outer isolation column 91 and the inner isolation column 92 can be provided with a blocking structure.

[0091] For example, n1 and n2 are both greater than 0.

[0092] The above setting of n1 equal to or not equal to n2 can flexibly layout the first signal line 41 according to the actual layout space of the winding area 20. For example, when n1 is equal to n2, the first winding part 410 of the plurality of first signal lines 41 can be symmetrically arranged in the winding area 20; when n1 is greater than n2, the first winding part 410 of the first signal line 41 arranged in the winding area 20 on the first side of the hole area 10 is more, and the first winding part 410 of the first signal line 41 arranged in the winding area 20 on the second side of the hole area 10 is less; when n1 is less than n2, the first winding part 410 of the first signal line 41 arranged in the winding area 20 on the first side of the hole area 10 is less, and the first winding part 410 of the first signal line 41 arranged in the winding area 20 on the second side of the hole area 10 is more.

[0093] As shown in Figure 1 , Figure 9 and Figure 11 In some embodiments, the display area further includes a plurality of virtual sub-pixels (located in a virtual sub-pixel layout area Q6), and the first winding part 410 included in the n2 first signal lines 41 has a projection on the substrate, which is located between the projection of the virtual sub-pixel on the substrate and the projection of the hole area 10 on the substrate; n2 is greater than n1.

[0094] For example, the display area further includes a plurality of display sub-pixels (located in a display sub-pixel layout area Q5), and the first winding part 410 included in the n1 first signal lines 41 has a projection on the substrate, which is located between the projection of the display sub-pixel on the substrate and the projection of the hole area 10 on the substrate.

[0095] For example, the display panel includes at least two hole areas 10, and the plurality of virtual sub-pixels are located between the two adjacent hole areas 10. Taking a display panel including two hole areas 10 as an example, the plurality of virtual sub-pixels are located between the two hole areas 10. It is worth noting that the display sub-pixel in the display panel can emit light to realize the display function of the display panel. The virtual sub-pixel included in the display panel has the same film layer below the anode layer as the display sub-pixel, but the virtual sub-pixel does not include the anode layer and the light-emitting functional layer above the anode layer, that is, the virtual sub-pixel does not emit light.

[0096] Exemplarily, the wiring manners of the winding regions 20 at the peripheries of the hole regions 10 are the same, that is, in the winding region 20 at the periphery of each hole region 10, the first winding portions 410 included in the n2 first signal lines 41 are located between the normal projection of the virtual sub-pixel on the substrate and the normal projection of the hole region 10 on the substrate. For example, as shown in Figure 11 The wiring manners of the winding regions 20 at the peripheries of the two hole regions 10 are symmetrically arranged.

[0097] The above arrangement manner makes the first winding portions 410 more arranged in the region close to the virtual sub-pixel and less arranged in the region close to the display sub-pixel in the winding region 20, that is, the first winding portions 410 included in the plurality of first signal lines 41 are asymmetrically designed, which is beneficial to reducing the width of the region close to the display sub-pixel in the winding region 20.

[0098] As shown in Figure 1 , Figure 9 and Figure 11 In some embodiments, the winding region 20 includes a first sub-region Q1 and a second sub-region Q2 opposite in the first direction, the first winding portions 410 included in the n1 first signal lines 41 are arranged in the first sub-region Q1, and the first winding portions 410 included in the n2 first signal lines 41 are arranged in the second sub-region Q2. In the extension direction of the hole region diameter parallel to the first direction, the width of the first sub-region Q1 is smaller than the width of the second sub-region Q2.

[0099] Exemplarily, the first sub-region Q1 is located between the hole region 10 and the display sub-pixel, and the second sub-region Q2 is located between the hole region 10 and the virtual sub-pixel.

[0100] Exemplarily, a larger layout space can be provided for the second sub-region Q2 by reducing the number of virtual sub-pixels.

[0101] Exemplarily, the first lead portions 411 included in the plurality of first signal lines 41 are connected away from the edge of the hole region to form a regular circle, and the first winding portions 410 closest to the hole region 10 can surround a regular circle, and the area between the two circles has a fixed area. By fixing the position of the circle close to the hole region 10, the width of the region close to the display sub-pixel in the winding region 20 can be effectively reduced. Figure 11 For example, taking the left hole region 10 in the middle as an example, the distance between the left two circles on the central axis is less than the distance between the right two circles on the central axis, which can effectively reduce the width of the region close to the display sub-pixel in the winding region 20.

[0102] The above arrangement makes the width of the first sub-region Q1 close to the display sub-pixel in the winding area 20 along the radial direction of the hole area 10 smaller, and the first winding part 410 included in the n1 first signal lines 41 is arranged in a smaller number; the width of the second sub-region Q2 close to the virtual sub-pixel in the winding area 20 along the radial direction of the hole area 10 is larger, and the first winding part 410 included in the n2 first signal lines 41 is arranged in a larger number; and the above arrangement effectively reduces the width of the region close to the display sub-pixel on one side of the winding area 20.

[0103] As shown in Figure 1 , Figure 10 and Figure 11 in some embodiments, the plurality of second signal lines 42 is divided into a first group of second signal line groups Z3 and a second group of second signal line groups Z4, the first group of second signal line groups Z3 includes m1 second signal lines 42, and the second group of second signal line groups Z4 includes m2 second signal lines 42.

[0104] Along the second direction, the second winding part 420 included in the m1 second signal lines 42 is located on the third side of the hole area 10, and the second winding part 420 included in the m2 second signal lines 42 is located on the fourth side of the hole area 10, and m1 and m2 are equal or not equal.

[0105] For example, m1 and m2 are both greater than 0.

[0106] The above arrangement of m1 and m2 being equal or not equal can flexibly arrange the second signal lines 42 according to the actual layout space of the winding area 20, for example: when m1 is equal to m2, the second winding part 420 of the plurality of second signal lines 42 can be symmetrically arranged in the winding area 20; when m1 is greater than m2, the second winding part 420 of the second signal lines 42 arranged in the winding area 20 on the third side of the hole area 10 is more, and the second winding part 420 of the second signal lines 42 arranged in the winding area 20 on the fourth side of the hole area 10 is less; when m1 is less than m2, the second winding part 420 of the second signal lines 42 arranged in the winding area 20 on the third side of the hole area 10 is less, and the second winding part 420 of the second signal lines 42 arranged in the winding area 20 on the fourth side of the hole area 10 is more.

[0107] As shown in Figure 1 , Figure 10 and Figure 11In some embodiments, as shown, in the case where m1 is equal to m2, the winding area 20 includes a third sub-area Q3 and a fourth sub-area Q4 opposite in the second direction, the m1 second signal lines 42 include the second winding portions 420 arranged in the third sub-area Q3, and the m2 second signal lines 42 include the second winding portions 420 arranged in the fourth sub-area Q4. In the extension direction of the hole area diameter parallel to the second direction, the width of the third sub-area Q3 is equal to the width of the fourth sub-area Q4.

[0108] In some embodiments, the display panel includes at least two hole areas 10 arranged in the second direction, and the display area further includes a plurality of virtual sub-pixels between adjacent two hole areas 10. The second winding portions 420 included in the m2 second signal lines 42 have a projection on the substrate, which is between the projection of the virtual sub-pixels on the substrate and the projection of the hole area 10 on the substrate. m2 is greater than m1.

[0109] For example, the display area further includes a plurality of display sub-pixels, at least part of the display sub-pixels are located on one side of the hole area 10 in the second direction at the periphery of the hole area 10, and at least part of the virtual sub-pixels are located on the other side of the hole area 10 in the second direction. The second winding portions 420 included in the m1 second signal lines 42 have a projection on the substrate, which is between the projection of the display sub-pixels on the substrate and the projection of the hole area 10 on the substrate.

[0110] For example, the display panel includes at least two hole areas 10 arranged in the second direction, and the plurality of virtual sub-pixels are between adjacent two hole areas 10. For example, the display panel includes two hole areas 10 arranged in the second direction, and the plurality of virtual sub-pixels are between the two hole areas 10.

[0111] For example, the wiring mode of the winding area 20 at the periphery of each hole area 10 is the same, that is, in the winding area 20 at the periphery of each hole area 10, the second winding portions 420 included in the m2 second signal lines 42 have a projection on the substrate, which is between the projection of the virtual sub-pixels on the substrate and the projection of the hole area 10 on the substrate.

[0112] The above arrangement mode makes the second winding part 420 more arranged in the region close to the virtual sub-pixel and less arranged in the region close to the display sub-pixel in the winding area 20, that is, the plurality of second winding parts 420 included in the plurality of second signal lines 42 adopts an asymmetric design, which is conducive to reducing the width of the region close to the display sub-pixel in the winding area 20.

[0113] As shown in Figures 1 to 8 In some embodiments, the orthographic projection of the plurality of first winding parts 410 included in the plurality of first signal lines 41 on the substrate is arranged in sequence along the direction close to the aperture area 10, and adjacent first winding parts 410 are arranged in different layers; and / or the orthographic projection of the plurality of second winding parts 420 included in the plurality of second signal lines 42 on the substrate is arranged in sequence along the direction close to the aperture area 10, and adjacent second winding parts 420 are arranged in different layers.

[0114] For example, among the plurality of first winding parts 410 included in the plurality of first signal lines 41, the first winding parts 410 included in the odd-numbered first signal lines 41 are arranged in the same layer and material, and the first winding parts 410 included in the even-numbered first signal lines 41 are arranged in the same layer and material.

[0115] For example, among the plurality of second winding parts 420 included in the plurality of second signal lines 42, the second winding parts 420 included in the odd-numbered second signal lines 42 are arranged in the same layer and material, and the second winding parts 420 included in the even-numbered second signal lines 42 are arranged in the same layer and material.

[0116] For example, the orthographic projection of adjacent first winding parts 410 on the substrate and the orthographic projection of second winding parts 420 on the substrate do not overlap.

[0117] For example, the lengths of each first winding part 410 and each second winding part 420 are not the same.

[0118] The above arrangement of adjacent first winding parts 410 arranged in different layers effectively avoids the problem of short circuit between adjacent first winding parts 410, reduces the layout difficulty of the first signal lines 41 in the winding area 20, and ensures the working stability and production yield of the display panel.

[0119] The above arrangement of adjacent second winding parts 420 arranged in different layers effectively avoids the problem of short circuit between adjacent second winding parts 420, reduces the layout difficulty of the second signal lines 42 in the winding area 20, and ensures the working stability and production yield of the display panel.

[0120] In some embodiments, the display panel comprises, in sequence from the substrate baseboard, a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer.

[0121] Among the plurality of first signal lines 41, a part of the first signal lines 41 comprises the first wire portion 410 which is arranged in the same layer and material as the first source-drain metal layer, and another part of the first signal lines 41 comprises the first wire portion 410 which is arranged in the same layer and material as the second source-drain metal layer.

[0122] Among the plurality of second signal lines 42, a part of the second signal lines 42 comprises the second wire portion 420 which is arranged in the same layer and material as the first gate metal layer, and another part of the second signal lines 42 comprises the second wire portion 420 which is arranged in the same layer and material as the second gate metal layer.

[0123] For example, the display panel comprises, in sequence from the substrate baseboard, a light shielding layer 51, a first active layer, a first gate insulating layer, a first gate metal, a second gate insulating layer, a second gate metal layer, a third gate insulating layer, a second active layer, a fourth gate insulating layer, a third gate metal layer, an interlayer insulating layer, a first source-drain metal layer, a first planar layer, a second source-drain metal layer, a second planar layer, an anode layer, a light-emitting functional layer, a cathode layer, and an encapsulation layer. The encapsulation layer can comprise, in sequence, a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer.

[0124] It is worth noting that the display panel can further comprise at least one passivation layer, which can be located between the source-drain metal layer and the planar layer. The third gate insulating layer, the second active layer, the fourth gate insulating layer, and the third gate metal layer can be selected according to actual needs.

[0125] For example, the first wire portion 410 included in a part of the first signal lines 41 can include an odd number of first wire portions 410, and the first wire portion 410 included in another part of the first signal lines 41 can include an even number of first wire portions 410.

[0126] For example, the first wire portion 410 included in a part of the first signal lines 41 can include an even number of first wire portions 410, and the first wire portion 410 included in another part of the first signal lines 41 can include an odd number of first wire portions 410.

[0127] Part of the first signal line 41 includes the first winding part 410 is provided in the same layer and the same material as the first source-drain metal layer, and another part of the first signal line 41 includes the first winding part 410 is provided in the same layer and the same material as the second source-drain metal layer; so that part of the first signal line 41 includes the first winding part 410 can be formed at the same time in the same patterning process as the first source-drain metal layer, so that another part of the first signal line 41 includes the first winding part 410 can be formed at the same time in the same patterning process as the second source-drain metal layer, thereby effectively simplifying the manufacturing process of the display panel and reducing the manufacturing cost of the display panel.

[0128] Exemplarily, part of the second signal line 42 includes the second winding part 420 can include an odd number of second winding parts 420, and another part of the second signal line 42 includes the second winding part 420 can include an even number of second winding parts 420.

[0129] Exemplarily, part of the second signal line 42 includes the second winding part 420 can include an even number of second winding parts 420, and another part of the second signal line 42 includes the second winding part 420 can include an odd number of second winding parts 420.

[0130] Part of the second signal line 42 includes the second winding part 420 is provided in the same layer and the same material as the first gate metal layer, and another part of the second signal line 42 includes the second winding part 420 is provided in the same layer and the same material as the second gate metal layer; so that part of the second signal line 42 includes the second winding part 420 can be formed at the same time in the same patterning process as the first gate metal layer, so that another part of the second signal line 42 includes the second winding part 420 can be formed at the same time in the same patterning process as the second gate metal layer, thereby effectively simplifying the manufacturing process of the display panel and reducing the manufacturing cost of the display panel.

[0131] The display panel provided by the above embodiment does not need to increase an additional patterning process, and does not need to increase the thickness of the flat layer in the display panel, so that the problem of signal transmission crosstalk between the first signal line 41 and the second signal line 42 is well solved, and the display quality of the display panel is effectively improved.

[0132] The display device provided by the display panel provided by the above embodiment.

[0133] Exemplarily, the display panel comprises an organic light emitting diode display panel, and the display device comprises an organic light emitting diode display device, but is not limited thereto. It should be noted that the display device can be any product or component with a display function, such as a television, a display, a digital photo frame, a mobile phone, a tablet computer, and the like. The display device further comprises a flexible circuit board, a printed circuit board, a back plate, and the like.

[0134] In the display panel provided by the above embodiment, the first signal line 41 comprises a first winding portion 410, and the second signal line 42 comprises a second winding portion 420, both of which are arranged around at least part of the edge of the hole region 10. Meanwhile, the shielding layer 50 comprised in the display panel is also arranged around at least part of the edge of the hole region 10, and at least part of the orthogonal projection of the shielding layer 50 on the substrate of the display panel is located between the orthogonal projection of the first winding portion 410 on the substrate and the orthogonal projection of the second winding portion 420 on the substrate. In this way, the shielding layer 50 can effectively shield the crosstalk between the signal transmitted by the first signal line 41 and the second signal transmitted by the second signal line 42, thereby ensuring the display effect of the display panel.

[0135] The display device provided by the embodiments of the present application also has the beneficial effects described above when comprising the display panel described above, and thus will not be described again here.

[0136] It should be noted that the signal line extending in a certain direction refers to that the signal line comprises a main part and a secondary part connected to the main part, the main part is a line, a line segment or a strip-shaped body, the main part extends in a certain direction, and the length of the main part extending in the certain direction is greater than the length of the secondary part extending in other directions.

[0137] It should be noted that the "same layer" of the embodiments of the present application can refer to a film layer on the same structure layer. Alternatively, for example, the film layer on the same layer can be a layer structure formed by using the same film forming process to form a film layer for forming a specific pattern, and then patterning the film layer by using the same mask plate through a one-time patterning process. According to different specific patterns, the one-time patterning process can include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure can be continuous or discontinuous. These specific patterns can also be at different heights or have different thicknesses.

[0138] In the method embodiments of the present application, the serial numbers of the steps cannot be used to limit the sequence of the steps, and for those skilled in the art, the changes in the sequence of the steps without creative labor are also within the protection scope of the present application.

[0139] It should be noted that each of the embodiments in the present specification is described in a progressive manner, and the same or similar parts between each embodiment can be mutually referred to, and each embodiment focuses on the difference from other embodiments. In particular, for the method embodiments, since they are basically similar to the product embodiments, they are described more simply, and the relevant parts can be referred to the part of the description of the product embodiments.

[0140] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the ordinary meaning as understood by a person of ordinary skill in the art to which the present disclosure belongs. The terms "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are used to distinguish different components. The terms "comprise", "include" and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "connect", "couple" or "connected" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right" and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships may also change accordingly.

[0141] It can be understood that when an element such as a layer, a film, a region, or a substrate is referred to as being "on" or "under" another element, it can be "directly" on or under the other element, or an intermediate element can be present.

[0142] In the description of the above-described embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0143] The above description is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A display panel, characterized by, The display panel comprises: a hole region, a winding region and a display region, the winding region is located between the hole region and the display region, and the winding region surrounds the hole region; The display panel further comprises: a plurality of first signal lines, the first signal lines comprise a first winding part located in the winding region, and the first winding part is arranged around at least part of the edge of the hole region; a plurality of second signal lines, the second signal lines comprise a second winding part located in the winding region, and the second winding part is arranged around at least part of the edge of the hole region; a shielding layer, the shielding layer is arranged around at least part of the edge of the hole region, and at least part of the orthogonal projection of the shielding layer on the substrate of the display panel is located between the orthogonal projection of the first winding part on the substrate and the orthogonal projection of the second winding part on the substrate.

2. The display panel of claim 1, wherein, The display panel further comprises a light shielding layer and a plurality of display sub-pixels; the light shielding layer comprises a plurality of light shielding patterns and a plurality of first connection lines, the light shielding patterns in the same row are coupled by the corresponding first connection lines, and the orthogonal projection of the light shielding pattern on the substrate at least partially overlaps with the orthogonal projection of the transistor structure in the corresponding display sub-pixel on the substrate; The shielding layer is coupled with at least part of the first connection lines.

3. The display panel of claim 2, wherein, The shielding layer and the light shielding layer are arranged in the same layer and are made of the same material.

4. The display panel of claim 2, wherein, The display panel further comprises a power signal line, and the light shielding layer is coupled with the power signal line.

5. The display panel of claim 1, wherein, The orthogonal projection of the first winding part on the substrate does not overlap with the orthogonal projection of the second winding part on the substrate.

6. The display panel of claim 5, wherein, The orthogonal projection of the first winding part on the substrate is located between the orthogonal projection of the second winding part on the substrate and the orthogonal projection of the hole region on the substrate.

7. The display panel of claim 5, wherein, The orthogonal projection of the second winding part on the substrate is located between the orthogonal projection of the first winding part on the substrate and the orthogonal projection of the hole region on the substrate.

8. The display panel of claim 5, wherein The first signal lines further comprise two first lead parts arranged along a second direction, the first lead parts extend along the second direction, the first winding part is located between the two first lead parts, a first end of the first winding part is coupled with one of the first lead parts, and a second end of the first winding part is coupled with the other first lead part; The second signal lines further comprise two second lead parts arranged along a first direction, the second lead parts extend along the first direction, the second winding part is located between the two second lead parts, a first end of the second winding part is coupled with one of the second lead parts, and a second end of the second winding part is coupled with the other second lead part; and the second direction intersects the first direction.

9. The display panel of claim 8, wherein, The plurality of first signal lines are divided into a first group of first signal lines and a second group of first signal lines, the first group of first signal lines comprises n1 first signal lines, and the second group of first signal lines comprises n2 first signal lines; Along the first direction, the first winding portions included in the n1 first signal lines are located on a first side of the hole region, and the first winding portions included in the n2 first signal lines are located on a second side of the hole region, where n1 is equal to or different from n2.

10. The display panel of claim 9, wherein, The display region further includes a plurality of virtual sub-pixels, and a projection of the first winding portions included in the n2 first signal lines on the substrate substrate is located between a projection of the virtual sub-pixels on the substrate substrate and a projection of the hole region on the substrate substrate; n2 is greater than n1.

11. The display panel of claim 10, wherein, The winding region includes a first sub-region and a second sub-region opposite to each other along the first direction, the first winding portions included in the n1 first signal lines are arranged in the first sub-region, and the first winding portions included in the n2 first signal lines are arranged in the second sub-region; in an extension direction of a diameter of the hole region parallel to the first direction, a width of the first sub-region is smaller than a width of the second sub-region.

12. The display panel of claim 8, wherein, The plurality of second signal lines are divided into a first group of second signal lines and a second group of second signal lines, the first group of second signal lines includes m1 second signal lines, and the second group of second signal lines includes m2 second signal lines; Along the second direction, the second winding portions included in the m1 second signal lines are located on a third side of the hole region, and the second winding portions included in the m2 second signal lines are located on a fourth side of the hole region, where m1 is equal to or different from m2.

13. The display panel of claim 12, wherein, The display region further includes a plurality of virtual sub-pixels, and a projection of the second winding portions included in the m2 second signal lines on the substrate substrate is located between a projection of the virtual sub-pixels on the substrate substrate and a projection of the hole region on the substrate substrate; m2 is greater than m1.

14. The display panel of claim 12, wherein, The winding region includes a third sub-region and a fourth sub-region opposite to each other along the second direction, the second winding portions included in the m1 second signal lines are arranged in the third sub-region, and the second winding portions included in the m2 second signal lines are arranged in the fourth sub-region; in an extension direction of a diameter of the hole region parallel to the second direction, a width of the third sub-region is equal to a width of the fourth sub-region.

15. The display panel of claim 10 or 13, wherein, The display panel includes at least two hole regions, and the plurality of virtual sub-pixels are located between two adjacent hole regions.

16. The display panel of claim 15, wherein, The wiring manners of the winding regions around the peripheries of the hole regions are the same.

17. The display panel of claim 1, wherein Projections of the first winding portions included in the plurality of first signal lines on the substrate substrate are sequentially arranged in a direction close to the hole region, and adjacent first winding portions are arranged in different layers; And / or, Projections of the second winding portions included in the plurality of second signal lines on the substrate substrate are sequentially arranged in a direction close to the hole region, and adjacent second winding portions are arranged in different layers.

18. The display panel of claim 17, wherein, The display panel includes a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer sequentially and layerwisely arranged away from the substrate substrate. In the plurality of first signal lines, a part of the first signal lines comprises the first winding part which is arranged in the same layer and with the same material as the first source-drain metal layer, and another part of the first signal lines comprises the first winding part which is arranged in the same layer and with the same material as the second source-drain metal layer. In the plurality of second signal lines, a part of the second signal lines comprises the second winding part which is arranged in the same layer and with the same material as the first gate metal layer, and another part of the second signal lines comprises the second winding part which is arranged in the same layer and with the same material as the second gate metal layer.

19. The display panel of claim 1, wherein, The first signal line comprises a data line, and the second signal line comprises a scan line.

20. A display device comprising: The display panel comprises any one of the display panels according to claims 1-19.

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