Programmable controller
By introducing a combination of ARM and FPGA chips into the programmable controller and using multiple interfaces for communication and power management, the problem of insufficient expansion capability of traditional controller modules is solved, achieving efficient module expansion and fast application processing, thereby improving the production efficiency of mechanical equipment.
Patent Information
- Application Number
- CN202423319375.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2026-02-03
- Estimated Expiration
- 2034-12-31
AI Technical Summary
Traditional programmable logic controller (PLC) modules have limited expandability, weak versatility, insufficient interfaces, low communication efficiency, and cannot be applied to high-response devices. Their application processing speed is slow, resulting in low production efficiency of mechanical equipment.
Design a programmable controller comprising a control layer, an I/O signal layer, and a power layer. ARM chips and FPGA chips are used for control operations and I/O signal processing, respectively. Communication is achieved through SPI and SDIO interfaces, and the main control area and functional expansion area are connected through a serial peripheral interface. The power layer provides stable power and supports multiple module expansions and efficient communication.
It features multiple module expansion capabilities, high communication efficiency, fast application processing speed, and is suitable for high-response devices, significantly improving the production efficiency of mechanical equipment.
Smart Images
Figure CN223870979U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of automation equipment technology, and in particular to a programmable controller. Background Technology
[0002] A programmable logic controller (PLC) is a digital electronic system specifically designed for industrial applications. It employs a programmable memory to store instructions for performing logical operations, sequential control, timing, counting, and arithmetic operations. Through digital or analog inputs and outputs, it controls the production processes of various types of machinery. However, traditional controllers lack modular expansion capabilities, have limited versatility, and their expansion modules have insufficient interfaces and low communication efficiency. This restricts their application scenarios, making them unsuitable for high-response equipment. Furthermore, their application processing speed is slow, ultimately failing to improve the production efficiency of machinery. Utility Model Content
[0003] This utility model aims to solve at least one of the technical problems existing in the prior art. To this end, this utility model proposes a programmable controller. The controller of this application can realize the expansion of multiple modules, has strong versatility, can be applied to high-response devices, has fast application processing speed, and can improve the production efficiency of mechanical equipment.
[0004] This application provides a programmable controller, including a control layer, an I / O signal layer, and a power layer. The power layer provides power to the control layer and the I / O signal layer. The control layer has a main control area and a functional expansion area. The main control area is used for control operations and communication with external devices. The functional expansion area is used for outputting control signals to the I / O signal layer and for low-voltage differential signal communication with external expansion modules. The main control area and the functional expansion area communicate with each other using a serial peripheral interface.
[0005] Furthermore, the main control area is provided with a control module, and the function expansion area is provided with a function expansion module; the control module is an ARM chip, and the function expansion module is an FPGA chip.
[0006] Furthermore, the control module and the functional expansion module communicate using SPI and SDIO interfaces.
[0007] Furthermore, the control layer, the I / O signal layer, and the power layer are stacked sequentially and connected as a whole by inter-board connectors in the form of pin headers and female headers.
[0008] Furthermore, the IO signal layer is provided with an IO input module and an IO output module; the IO input module and the IO output module are connected to the functional expansion module; the power layer provides power to the control layer and the IO signal layer through the power module.
[0009] Furthermore, the control layer, the power layer, and the I / O signal layer are stacked sequentially and connected as a whole by inter-board connectors in the form of pin headers and female headers.
[0010] Furthermore, the power layer is provided with an IO input module and a power module, and the IO signal layer is provided with an IO output module; or, the power layer is provided with an IO output module and a power module, the IO signal layer is provided with an IO input module, and the power module provides power to the IO input module, the IO output module and the control layer.
[0011] Furthermore, the main control area also includes a power management chip, which is connected to the ARM chip and the FPGA chip. The power management chip processes the power from the power module and outputs it to the ARM chip and the FPGA chip. Alternatively, the power module includes a multi-stage filtering circuit, an energy storage circuit, and a step-down and shunt circuit connected in sequence. The multi-stage filtering circuit is used to eliminate external interference, the energy storage circuit is used to store the current passing through the multi-stage filtering circuit, and the step-down and shunt circuit is used to step down and shunt the current from the energy storage circuit to supply the control layer and the I / O signal layer.
[0012] Furthermore, the functional expansion area is provided with a functional expansion module, a first clock module, and a flash memory module; the main control area is provided with a control module, a second clock module, a storage module, a serial port circuit, and a reset circuit; the first clock module and the flash memory module are connected to the functional expansion module; the second clock module, the storage module, the serial port circuit, and the reset circuit are connected to the control module; the storage module includes an SD card storage circuit, a Type-C interface circuit, a flash memory circuit, and a DDR storage circuit.
[0013] Furthermore, the programmable controller also includes a housing, and the control layer, the I / O signal layer, and the power supply layer are all disposed inside the housing.
[0014] This application proposes a programmable controller, which has the following advantages compared with the prior art:
[0015] The programmable controller of this application includes a control layer, an I / O signal layer, and a power supply layer. The power supply layer provides power to the control layer and the I / O signal layer. The control layer has a main control area and a function expansion area. The main control area is used for control operations and communication with external devices. The function expansion area is used to output control signals to the I / O signal layer and to communicate with external expansion modules via low-voltage differential signals. The main control area and the function expansion area communicate with each other through a serial peripheral interface. Compared with traditional controllers, this application can realize multiple module expansions, has strong versatility, and the communication efficiency of the function expansion area is high. This application can be applied to high-response devices, has fast application processing speed, and can greatly improve the production efficiency of mechanical equipment. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of a programmable controller according to an embodiment of the present utility model;
[0017] Figure 2 for Figure 1 The diagram shows the functional distribution of the controller's control layer.
[0018] Figure 3 for Figure 2 A schematic diagram of the internal communication interface of the controller's control layer is shown.
[0019] Figure 4 for Figure 1 A schematic diagram of the interlayer structure arrangement of one embodiment of the controller shown;
[0020] Figure 5 for Figure 4 The diagram shows the functional modules of the controller.
[0021] Figure 6 for Figure 4 The diagram shows the distribution of functional modules in the board structure of the controller.
[0022] Figure 7 for Figure 1 A schematic diagram of the functional modules of the interlayer structure of another embodiment of the controller is shown;
[0023] Figure 8 for Figure 7 A schematic diagram of the functional modules of another embodiment of the controller shown;
[0024] Figure 9 for Figure 7 The diagram shows the distribution of functional modules in the board structure of the controller.
[0025] Figure 10 for Figure 4The diagram shows the interface distribution of the controller.
[0026] The meanings of the reference numerals in the attached figures are as follows:
[0027] 1. Control Layer; 11. Main Control Area; 111. Control Module; 112. Second Clock Module; 113. Storage Module; 114. Power Management Chip; 12. Function Expansion Area; 121. Function Expansion Module; 122. First Clock Module; 123. Flash Module; 13. Serial Peripheral Interface; 2. I / O Signal Layer; 3. Power Layer; 31. Multi-stage Filtering Circuit; 32. Energy Storage Circuit; 33. Buck Converter Circuit; 34. Power Module; 4. Board Connector; 5. I / O Input Module; 6. I / O Output Module. Detailed Implementation
[0028] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this utility model, and should not be construed as limiting this utility model.
[0029] In the description of this utility model, it should be understood that the directional descriptions, such as up, down, front, back, up, down, etc., indicating the directional or positional relationship, are based on the directional or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0030] like Figures 1-6 As shown in the illustration, this application proposes a programmable controller, including a control layer 1, an I / O signal layer 2, and a power layer 3. The power layer 3 is used to provide power to the control layer 1 and the I / O signal layer 2. The control layer 1 has a main control area 11 and a functional expansion area 12. The main control area 11 is used for control operations and communication with external devices. The functional expansion area 12 is used to output control signals to the I / O signal layer 2 and to communicate with external expansion modules via low-voltage differential signals. The main control area 11 and the functional expansion area 12 communicate with each other through a serial peripheral interface 13.
[0031] Based on the above technical solution, this application can realize multiple module expansions, has strong versatility, and has high communication efficiency in the functional expansion area. This application can be applied to high-response devices, with fast application processing speed, improving the rate at which high-response devices control mechanical equipment to execute operation commands, and can greatly improve the production efficiency of mechanical equipment.
[0032] like Figures 2-3As shown, a control module 111 is provided in the main control area 11, and a function expansion module 121 is provided in the function expansion area 12. The control module 111 is an ARM chip, and the function expansion module 121 is an FPGA chip. In this embodiment, the control module 111 is the core processor of the programmable controller. The control module 111 includes a multi-core ARM chip, specifically a quad-core ARM A40I-C chip. The A40I-C chip is designed with a quad-core ARM Cortex-A7 processor, with each core having a main frequency of up to 1.2GHz. In this embodiment, the ARM chip and the FPGA chip are separated to form an independent control layer 1. The ARM chip 111 and the FPGA chip 121 communicate with each other through the SPI interface, thereby accommodating the advantages of both. The ARM chip 111 is mainly responsible for control operations and processing of external communication interfaces, while the FPGA chip 121 mainly controls the IO signal layer and outputs LVDS signals for communication with the expansion module, achieving hardware-level response; thus meeting the customer's requirement for high response efficiency of the expansion module and the customer's demand for fast program processing speed.
[0033] The control module 111 and the function expansion module 121 communicate using SPI and SDIO interfaces. The SPI interface is used for communication between the controller's local function interfaces, while the SDIO interface is used for communication between the expansion modules, which can improve the communication speed. In this embodiment, the ARM chip 111 and the FPGA chip 121 communicate with each other through SPI and SDIO interfaces. By using different interfaces for communication between the local function interfaces and the expansion modules, data is effectively isolated, data security is protected, and the transmission rate is improved.
[0034] like Figures 4-6 As shown, the control layer 1, I / O signal layer 2, and power layer 3 are stacked sequentially and connected as a whole by inter-board connectors 4 in the form of pin headers and female headers. The power layer 3 provides power to the control layer 1 and I / O signal layer 2 through a power module 34. Specifically, the power module 34 of the power layer 3 provides power to the control layer 1 and I / O signal layer 2 through the connection of pin headers and female headers. In this embodiment, the I / O signal layer 2 is provided with an I / O input module 5 and an I / O output module 6; the I / O input module 5 and the I / O output module 6 are connected to the function expansion module 121. Specifically, both the I / O input module 5 and the I / O output module 6 are connected to the FPGA chip.
[0035] The power module 34 includes a multi-stage filtering circuit 31, an energy storage circuit 32, and a step-down shunt circuit 33 connected in sequence. The multi-stage filtering circuit 31 is used to eliminate external interference. The energy storage circuit 32 is used to store the current passing through the multi-stage filtering circuit 31 and to retain data during power failure. The step-down shunt circuit 33 is used to step down and shunt the current of the energy storage circuit 32 to supply the control layer 1 and the IO signal layer 2. Specifically, the multi-stage filtering circuit 31 includes two stages of filtering circuits. The multi-stage filtering circuit 31 is connected to an external power supply. The first stage filtering circuit can eliminate most external interference, and the second stage filtering circuit can eliminate high-frequency interference. The energy storage circuit 32 is used to continue to provide power for the power failure data retention function when the device is powered off. The step-down shunt circuit 33 performs voltage conversion on the current of the energy storage circuit 32, thereby delivering different voltages according to different voltage requirements, such as 24V to 5V, 24V to 3.3V, etc.
[0036] In this embodiment, the multi-stage filtering circuit 31 and energy storage circuit 32 of the power module 34 are located on the power layer 3, and the step-down shunt circuit 33 is located on the I / O signal layer 2. The power layer 1 only contains the filtering circuit and energy storage circuit, which facilitates isolation from other layers and allows for miniaturization or irregular design to meet different housing requirements. Therefore, by modularizing the circuit design and rationally arranging the module positions according to different scenarios, the programmable controller can be made compact and meet customer needs.
[0037] The IO input module 5 is equipped with an input isolation circuit, which can accept external signals, isolate external signal interference, and transmit data to the control layer 1 for reading operations. The IO output module 6 is equipped with an output isolation circuit, which can output control signals through the application program to control the operation of external field devices.
[0038] like Figures 7-9 As shown, the control layer 1, power layer 3, and I / O signal layer 2 are stacked sequentially and connected as a whole by pin headers and female connectors. This programmable controller uses an M board, an I / O board, and a P board. Each board is connected to the other via pin headers and female connectors to form a whole. The P board is the power layer 3, the I / O board is the I / O signal layer 2, and the M board is the control layer 1. The M board uses an ARM chip (i.e., an A40I-C chip) and an FPGA chip as a dual-chip control mode. The ARM chip has a high clock frequency and high processing efficiency, which can greatly improve the production efficiency of equipment in practical applications. The logic gates of the FPGA chip work in parallel and have a faster calculation speed, so the operation efficiency of the I / O signal layer is higher and the control is better.
[0039] The power layer 3 may have an I / O input module 5 and a power module 34, and the I / O signal layer 2 may have an I / O output module 6; alternatively, the power layer 3 may have an I / O output module 6 and a power module 34, and the I / O signal layer 2 may have an I / O input module 5. Both the I / O input module 5 and the I / O output module 6 are connected to the FPGA chip.
[0040] In this embodiment, the multi-stage filtering circuit 31, energy storage circuit 32, and step-down shunt circuit 33 of the power module 34 are all located on the power layer 1. The input module 5 and the IO output module 6 are respectively located on the power layer 1 and the IO signal layer 2. That is, when the input module 5 is located on the power layer 1, the IO output module 6 is located on the IO signal layer 2, and vice versa. By modularizing the circuit and input / output modules, the positions of the modules can be reasonably arranged according to different application scenarios and structures, making the programmable controller compact and able to meet different user needs.
[0041] like Figure 10 As shown, the main control area 11 also includes a power management chip 114, which is connected to the ARM chip and FPGA chip. The power management chip 114 processes the power from the power module 34 and outputs it to the ARM chip and FPGA chip. The power module 34 includes a multi-stage filter circuit 31, an energy storage circuit 32, and a step-down shunt circuit 33 connected in sequence. The multi-stage filter circuit 31 is used to eliminate external interference. The energy storage circuit 32 is used to store the current passing through the multi-stage filter circuit 31 and retain data after power failure. The step-down shunt circuit 33 is used to step down and shunt the current of the energy storage circuit 32 to supply the control layer 1 and the IO signal layer 2. Specifically, the power management chip 114 is a PMIC chip, which is connected to the step-down shunt circuit 33 in the power module 34. The power management chip 114 is located on the main control board 1.
[0042] The functional expansion area 12 is equipped with a functional expansion module 121, a first clock module 122, and a flash memory module 123. The main control area 11 is equipped with a control module 111, a second clock module 112, a storage module 113, a serial port circuit, and a reset circuit. The first clock module 122 and the flash memory module 123 are connected to the functional expansion module 121. The second clock module 112, the storage module 113, the serial port circuit, and the reset circuit are connected to the control module 111. The serial port circuit includes multiple serial port circuits, all of which are connected to the control module 111. The storage module includes multiple or all of the following: SD card storage circuit, Type-C interface circuit, flash memory circuit, and DDR storage circuit. The SD card storage circuit, Type-C interface circuit, flash memory circuit, and DDR storage circuit are all connected to the control module 111. The SD card storage circuit can connect to an SD card, read the operation program code written in the SD card, and respond accordingly. The Type-C interface circuit can connect to a USB flash drive or mobile phone, read the operation program code written on the USB flash drive, and respond accordingly. Furthermore, new control program code can be written to this controller using a computer and stored in the DDR storage circuit (i.e., synchronous dynamic random access memory). When a program needs to be run, the control program code is directly read, which can quickly control the mechanical equipment to execute new operation instructions for production.
[0043] The programmable controller also includes a housing (not shown in the figures). The control layer 1, the I / O signal layer 2, and the power supply layer 3 are all located inside the housing and protected by the housing, which can isolate external interference. Specifically, the housing of this application can be configured as a vertical housing or a horizontal housing depending on the specific arrangement of the control layer 1, the I / O signal layer 2, and the power supply layer 3.
[0044] In the description of this utility model, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.
[0045] In the description of this utility model, unless otherwise explicitly defined, terms such as "setting," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this utility model in conjunction with the specific content of the technical solution.
[0046] In the description of this utility model, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this utility model. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0047] The technical means disclosed in this utility model are not limited to those disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of this utility model, and these improvements and modifications are also considered within the scope of protection of this utility model.
Claims
1. A programmable controller, characterized in that, It includes a control layer, an I / O signal layer, and a power layer; wherein, the power layer is used to provide power to the control layer and the I / O signal layer, the control layer has a main control area and a functional expansion area, the main control area is used for control operations and communication with external devices, the functional expansion area is used for outputting control signals to the I / O signal layer and communicating with external expansion modules via low-voltage differential signals, and the main control area and the functional expansion area communicate with each other through a serial peripheral interface.
2. The programmable controller according to claim 1, characterized in that, The main control area is equipped with a control module, and the function expansion area is equipped with a function expansion module; the control module is an ARM chip, and the function expansion module is an FPGA chip.
3. The programmable controller according to claim 2, characterized in that, The control module and the functional expansion module communicate using SPI and SDIO interfaces.
4. The programmable controller according to claim 2, characterized in that, The control layer, the I / O signal layer, and the power layer are stacked sequentially and connected as a whole by inter-board connectors in the form of pin headers and female headers.
5. The programmable controller according to claim 4, characterized in that, The IO signal layer is equipped with an IO input module and an IO output module; The IO input module and the IO output module are connected to the function expansion module; The power layer provides power to the control layer and the I / O signal layer through a power module.
6. The programmable controller according to claim 2, characterized in that, The control layer, the power layer, and the I / O signal layer are stacked sequentially and connected to form a whole by pin headers and female headers as inter-board connectors.
7. The programmable controller according to claim 6, characterized in that, The power layer is provided with an IO input module and a power module, and the IO signal layer is provided with an IO output module; or, the power layer is provided with an IO output module and a power module, the IO signal layer is provided with an IO input module, and the power module provides power to the IO input module, the IO output module and the control layer.
8. The programmable controller according to claim 5 or 7, characterized in that, The main control area also includes a power management chip, which is connected to the ARM chip and the FPGA chip. The power management chip processes the power of the power module and outputs it to the ARM chip and the FPGA chip. And / or, the power module includes a multi-stage filtering circuit, an energy storage circuit, and a step-down shunt circuit connected in sequence. The multi-stage filtering circuit is used to eliminate external interference, the energy storage circuit is used to store energy from the current passing through the multi-stage filtering circuit, and the step-down shunt circuit is used to step down and shunt the current from the energy storage circuit to supply the control layer and the I / O signal layer.
9. The programmable controller according to claim 1, characterized in that, The functional expansion area is equipped with a functional expansion module, a first clock module, and a flash memory module; the main control area is equipped with a control module, a second clock module, a storage module, a serial port circuit, and a reset circuit. The first clock module and the flash memory module are connected to the functional expansion module; The second clock module, the storage module, the serial port circuit, and the reset circuit are connected to the control module; The storage module includes an SD card storage circuit, a Type-C interface circuit, a flash memory circuit, and a DDR storage circuit.
10. The programmable controller according to claim 1, characterized in that, The programmable controller also includes a housing, and the control layer, the I / O signal layer and the power layer are all disposed inside the housing.