Functional fault diagnosis protection and self-reset circuit

Abstract

The utility model provides a function fault diagnosis protection and self-reset circuit, comprising a voltage stabilizing circuit, the power supply end of which is connected with a power supply, and the output end Vout of which is connected with a load; the capacitor C2 is connected between the output end Vout and the grounding end; one end of the soft restart circuit is connected with the power supply end, and the other end of the soft restart circuit is connected with the output end Vout; the power supply end of the fault detection circuit is connected with the power supply end, the detection end of the fault detection circuit is connected with the output end Vout, and the output end C of the fault detection circuit outputs a detection result; the input end of the fault control circuit is connected with the output end C, the output end D of the fault control circuit is connected with the control end of the voltage stabilizing circuit, and when the final detection result is load fault, the fault control circuit controls the voltage stabilizing circuit not to work; and when the final detection result is that the load is normal, the fault control circuit controls the voltage stabilizing circuit to work. Compared with the prior art, the circuit provided by the utility model can detect the working state of the circuit in real time according to the state of the load, and can automatically start the reset circuit to work again after the failure fault of the load is removed.

Description

[Technical Field]

[0001] This utility model relates to the field of circuit design technology, and in particular to a functional fault diagnosis, protection and self-reset circuit. [Background Technology]

[0002] Existing multi-functional fault diagnosis, protection, and self-reset circuit solutions typically use sensors to collect data, which is then conditioned and transmitted to the main control chip for analysis and processing. Once a fault is detected, the protection mechanism is immediately activated, cutting off the relevant circuits. After the fault is cleared, the circuit automatically resets, restoring normal operation and ensuring stable and safe operation.

[0003] However, the existing technical solutions have the following problems and drawbacks:

[0004] ① Data is collected by a current sensor, which then needs to be processed by a microcontroller. Control is then performed based on threshold logic, which undoubtedly increases both hardware costs and software debugging.

[0005] ② When a failure occurs, the software response time is not as fast as the hardware response time.

[0006] Therefore, it is necessary to propose a new technical solution to address the above problems. [Utility Model Content]

[0007] One of the objectives of this utility model is to provide a functional fault diagnosis and protection and self-reset circuit, which can detect the working status of the circuit in real time according to the load status, and can automatically start the reset circuit to work again after the load failure fault is removed.

[0008] According to one aspect of this utility model, a functional fault diagnosis protection and self-reset circuit is provided, comprising: a voltage regulator circuit, whose power supply terminal Vcc is connected to a power supply V1, and whose output terminal Vout is connected to a load R4; the voltage regulator circuit outputs a stable voltage based on the voltage at the power supply terminal Vcc through its output terminal Vout; a capacitor C2 connected between the output terminal Vout and a ground terminal; and a soft-restart circuit, one end of which is connected to the power supply terminal Vcc, and the other end of which is connected to the output terminal Vout; when the voltage regulator circuit is working and the load is normal, the soft-restart circuit has no current output, thereby stopping the charging of the capacitor C2; when the voltage regulator circuit is not working and the load fault is removed, the soft-restart circuit generates a current flowing from the power supply terminal Vcc to the output terminal Vout, thereby charging the capacitor C2. The fault detection circuit has its power supply terminal A connected to the power supply terminal VCC, its detection terminal B connected to the output terminal Vout, and its output terminal C outputting the detection result. When a load fault is detected based on the output terminal Vout, the fault detection circuit outputs a final detection result indicating a load fault through its output terminal C; when a normal load is detected based on the output terminal Vout, the fault detection circuit outputs a final detection result indicating a normal load through its output terminal C. The fault control circuit has its input terminal connected to the output terminal C of the fault detection circuit, and its output terminal D connected to the control terminal of the voltage regulator circuit. When it receives a final detection result indicating a load fault, the fault control circuit controls the voltage regulator circuit to not operate; when it receives a final detection result indicating a normal load, the fault control circuit controls the voltage regulator circuit to operate.

[0009] Compared with the prior art, this utility model can detect the working status of the circuit in real time according to the load status, and can automatically start the reset circuit to work again after the load failure fault is removed. [Attached Image Description]

[0010] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0011] Figure 1 This is a circuit diagram of the functional fault diagnosis protection and self-reset circuit in one embodiment of the present invention.

Detailed Implementation Methods

[0012] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0013] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that excludes other embodiments. Unless otherwise specified, the terms coupling, connection, linking, and interconnection used herein to indicate electrical connection mean direct or indirect connection. For example, A being connected to B includes both a direct electrical connection between A and B and a connection between A and B via electrical components or circuits.

[0014] In the description of this utility model, it should be understood that the terms "upper", "lower", "front", "back", "positive", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0015] Please refer to Figure 1 As shown, it is a circuit diagram of the functional fault diagnosis protection and self-reset circuit of this utility model in one embodiment. Figure 1 The functional fault diagnosis, protection and self-reset circuit shown includes a voltage regulator circuit 110, a capacitor C2, a soft restart circuit 120, a fault detection circuit 130 and a fault control circuit 140.

[0016] In this circuit, the power supply terminal Vcc of the voltage regulator circuit 110 is connected to the power supply V1, and its output terminal is Vout. The voltage regulator circuit 110 outputs a stable voltage based on the voltage at the power supply terminal Vcc through its output terminal Vout. Specifically, the positive terminal of the power supply V1 is connected to the power supply terminal Vcc, and its negative terminal is grounded; one end of the load R4 is connected to the output terminal Vout, and the other end is grounded.

[0017] Capacitor C2 is connected between the output terminal Vout and the ground terminal; one end of the soft restart circuit 120 is connected to the power supply terminal Vcc, and the other end is connected to the output terminal Vout. When the voltage regulator circuit 110 is working and the load R4 is normal, the soft restart circuit 120 has no current output, thus stopping the charging of capacitor C2; when the voltage regulator circuit 110 is not working and the fault of the load R4 is removed, the soft restart circuit 120 generates current from the power supply terminal Vcc to the output terminal Vout, thus charging capacitor C2.

[0018] The power supply terminal A of the fault detection circuit 130 is connected to the power supply terminal VCC, its detection terminal B is connected to the output terminal Vout, and its output terminal C outputs the detection result. When a fault is detected in the load R4 based on the output terminal Vout (for example, a short circuit in the load R4), the fault detection circuit 130 outputs the final detection result indicating that the load is faulty through its output terminal C; when the load is normal based on the output terminal Vout, the fault detection circuit 130 outputs the final detection result indicating that the load is normal through its output terminal C.

[0019] The input terminal of the fault control circuit 140 is connected to the output terminal C of the fault detection circuit 130, and its output terminal D is connected to the control terminal of the voltage regulator circuit 110. When the final detection result indicating a load fault is received, the fault control circuit 140 controls the voltage regulator circuit 110 to not work; when the final detection result indicating a normal load is received, the fault control circuit 140 controls the voltage regulator circuit 110 to work.

[0020] exist Figure 1 In the illustrated embodiment, the fault detection circuit 130 includes a first detection circuit 132 and a second detection circuit (not labeled, which includes a diode D4, a switching device Q5, a resistor R15, a resistor R16, and a resistor R17). The power supply terminal of the first detection circuit 132 is connected to the power supply terminal A of the fault detection circuit 130, its detection terminal is connected to the output terminal Vout, and its output terminal E is connected to the output terminal C of the fault detection circuit 130. The power supply terminal of the second detection circuit (not labeled) is connected to the power supply terminal A of the fault detection circuit 130, its detection terminal is connected to the output terminal Vout, and its output terminal is also connected to the output terminal C of the fault detection circuit 130.

[0021] During the operation of the voltage regulator circuit 110, when the first detection circuit 132 detects that the load is normal based on the output terminal Vout, the output terminal E of the first detection circuit 132 outputs a first detection result indicating that the load is normal. When the second detection circuit (unlabeled) detects that the load is normal based on the output terminal Vout, the second detection result output by the output terminal of the second detection circuit (unlabeled) does not affect the first detection result. At this time, the output terminal C of the fault detection circuit 130 takes the first detection result output by the first detection circuit 132 as the final detection result. That is, the fault detection circuit 130 outputs a final detection result indicating that the load is normal through its output terminal C.

[0022] During the operation of the voltage regulator circuit 110, after the first detection circuit 132 detects a fault in the load R4 (e.g., a short circuit in the load R4) based on its output terminal Vout, the output terminal E of the first detection circuit 132 continuously outputs a first detection result indicating a load fault. When the second detection circuit (unlabeled) detects a fault in the load R4 (e.g., a short circuit in the load R4) based on its output terminal Vout, the second detection result output by the output terminal of the second detection circuit (unlabeled) does not affect the first detection result. At this time, the output terminal C of the fault detection circuit 130 takes the first detection result output by the first detection circuit 132 as the final detection result, that is, the fault detection circuit 130 outputs the final detection result indicating a load fault through its output terminal C.

[0023] During the period when the voltage regulator circuit 110 is not working, the output terminal E of the first detection circuit 132 continuously outputs the first detection result indicating a load fault. When the second detection circuit (unlabeled) detects that the load is normal based on the output terminal Vout, its output terminal outputs the second detection result indicating that the load is normal. At this time, the output terminal C of the fault detection circuit 130 takes the second detection result output by the second detection circuit (unlabeled) as the final detection result. That is, the fault detection circuit 130 outputs the final detection result indicating a load fault through its output terminal C.

[0024] exist Figure 1 In the illustrated embodiment, the voltage regulator circuit 110 includes a resistor R3, a Zener diode D2, and a power transistor Q1. The first terminal of the power transistor Q1 is connected to the power supply terminal VCC, its second terminal is connected to the output terminal Vout, and its control terminal is connected to node F. The negative terminal of the Zener diode D2 is connected to node F, and its positive terminal is grounded. One end of the resistor R3 is connected to the first terminal of the power transistor Q1, and the other end is connected to node F. Node F is connected to the output terminal D of the fault control circuit 140, and this node F can be referred to as the control terminal of the voltage regulator circuit 110. When the power transistor Q1 is turned on, the voltage regulator circuit 110 operates; when the power transistor Q1 is turned off, the voltage regulator circuit 110 does not operate.

[0025] exist Figure 1 In the specific embodiment shown, the voltage regulator circuit 110 further includes a capacitor C1 and a diode D1. The positive terminal of the diode D1 is connected to the power supply terminal VCC, and its negative terminal is connected to the first connection terminal of the power transistor Q1 and the power supply terminal A of the fault detection circuit 130. One end of the capacitor C1 is connected to the first connection terminal of the power transistor Q1, and the other end is grounded.

[0026] exist Figure 1 In the specific embodiment shown, the power transistor Q1 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the power transistor Q1 are the collector, emitter, and base of the NPN transistor, respectively.

[0027] The soft restart circuit 120 includes a resistor R13, a Zener diode D6, a resistor R14, and a diode D5. One end of the resistor R13 is connected to the power supply terminal A of the fault detection circuit 130, and the other end is connected to node G. One end of the resistor R14 is connected to node G, and the other end is connected to the positive terminal of the diode D5. The negative terminal of the diode D5 is connected to the output terminal Vout. The negative terminal of the Zener diode D6 is connected to node G, and its positive terminal is grounded.

[0028] exist Figure 1 In the specific embodiment shown, the first detection circuit 132 includes diode D3, diode D7, capacitor C3, switching devices Q2, Q4, and Q6, and resistors R1, R2, R6, R9, R10, R11, R12, R18, and R19. The anode of diode D7 is connected to the output terminal Vout (or the test terminal B), and its cathode is grounded via capacitor C3. The first connection terminal of switching device Q6 is connected to the cathode of diode D7, its control terminal is connected to the output terminal Vout via resistor R18, and its second connection terminal is connected to node H via resistor R10. One end of resistor R19 is connected to the output terminal Vout, and its other end is connected to the first connection terminal of switching device Q6. One end of resistor R12 is connected to node H, and its other end is grounded. The first connection terminal of switching device Q4 is connected to node I via resistor R6, and its second connection terminal is connected to the output terminal Vout via resistor R18. One end of the resistor is grounded, and its control end is connected to node H; the cathode of diode D3 is connected to node H via resistor R9, and its anode is connected to the output terminal E of the first detection circuit 132; one end of resistor R11 is connected to the output terminal E of the first detection circuit 132, and its other end is grounded; the first connection terminal of switching device Q2 is connected to the power supply terminal A of the fault detection circuit 130 via resistor R2, and its second connection terminal is connected to the output terminal E of the first detection circuit 132, and its control end is connected to node I; one end of resistor R1 is connected to the power supply terminal A of the fault detection circuit 130, and its other end is connected to node I.

[0029] exist Figure 1 In the specific embodiment shown, the second detection circuit (not labeled) includes a diode D4, a switching device Q5, resistors R15, R16, and R17. The positive terminal of diode D4 is connected to the output terminal C of the fault detection circuit 130, and its negative terminal is connected to the first connection terminal of the switching device Q5. The second connection terminal of the switching device Q5 is grounded, and its control terminal is connected to the output terminal Vout via resistor R16. One end of resistor R17 is connected to the control terminal of the switching device Q5, and the other end is grounded. One end of resistor R15 is connected to the first connection terminal of the switching device Q5, and the other end is connected to the power supply terminal A of the fault detection circuit 130.

[0030] exist Figure 1In the specific embodiment shown, the fault control circuit 140 includes resistors R7 and R8 and a switching device Q3. The first connection terminal of the switching device Q3 is connected to the output terminal D of the fault control circuit 140, and its second connection terminal is grounded. Its control terminal is connected to the output terminal C of the fault detection circuit 130 via resistor R7. One end of resistor R8 is connected to the control terminal of the switching device Q3, and its other end is grounded.

[0031] When the voltage regulator circuit 110 is working and the load R4 is normal, switching devices Q6, Q4, and Q2 are turned off, while switching device Q5 is turned on and diode Q4 is reverse-biased and cut off, thereby turning off switching device Q3 and keeping the voltage regulator circuit 110 working (or keeping switching device Q1 on). At this time, diode D5 is reverse-biased and the soft-restart circuit 120 has no current output, thus stopping the charging of capacitor C2.

[0032] When the voltage regulator circuit 110 is working and the load R4 is faulty (e.g., the load R4 is short-circuited), the switching device Q6 is turned on, the switching devices Q4 and Q2 are continuously turned on, the switching device Q5 is turned off, thereby turning on the switching device Q3, which in turn prevents the voltage regulator circuit 110 from working (or turns off the switching device Q1); at this time, the diode D5 is forward turned on, thereby the soft restart circuit 120 charges the capacitor C2.

[0033] When the voltage regulator circuit 110 is not working and the load R4 fault (e.g., load R4 short-circuited) is cleared, diode D5 conducts in the forward direction. The soft-restart circuit 120 generates a current flowing from the self-powered terminal Vcc to the output terminal Vout to charge capacitor C2, thereby turning on switching device Q5 and diode Q4, which in turn turns on switching device Q3, and then turns on the voltage regulator circuit 110 (or turns on switching device Q1). In this way, the present invention can automatically restart the reset circuit to work again after the load failure fault is cleared. Here, "load R4 fault cleared" can be interpreted as "load R4 changes from abnormal to normal".

[0034] exist Figure 1In the specific embodiment shown, switching device Q2 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of switching device Q2 are the emitter, collector, and base of the PNP transistor, respectively; switching device Q3 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of switching device Q3 are the collector, emitter, and base of the NPN transistor, respectively; switching device Q4 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of switching device Q4 are the collector, emitter, and base of the NPN transistor, respectively; switching device Q5 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of switching device Q5 are the collector, emitter, and base of the NPN transistor, respectively; switching device Q6 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of switching device Q6 are the emitter, collector, and base of the PNP transistor, respectively.

[0035] To facilitate understanding of this utility model, the following detailed description is provided. Figure 1 The working principle of the functional fault diagnosis, protection, and self-reset circuit shown.

[0036] ■ When the connected analog load R4 is normal, the product load is in normal working condition;

[0037] 1. The power supply V1 (or input voltage V1) passes through the anti-reverse diode D1, is filtered by capacitor C1, and is then converted into an output voltage V by a voltage regulator circuit 110 composed of resistor R3, Zener diode D2, and transistor Q1. out_Noma l, the voltage across Zener diode D2 is V D2_Ref The PN junction of transistor Q1 is V PN_Q1 Then V out_Nomal ≈V D2_Ref -V PN_Q1 ;

[0038] 2. The power supply V1, through resistor R13 and Zener diode D6, ensures a stable reference voltage of V. D6_Ref Design V out_Nomal >V D6_Ref The PN junction of diode D5 is V. PN_D5 V out_Nomal -V D6_Ref <V PN_D5 Then diode D5 operates in reverse cutoff state;

[0039] 3. Output voltage V out_Nomal The capacitor C3 is charged through diode D7, and the charging voltage is V. C3_Vol The PN junction of diode D7 is V. PN_D7 Then V C3_Vol ≈V out_Nomal -V PN_D7The PN junction of transistor Q6 is V. PN_Q6 Then (V C3_Vol -V PN_Q6 ) <V out_Nomal Therefore, transistor Q6 operates in the cutoff state (or off state); since transistor Q6 is cut off, resistor R12 is connected to GND, and the input voltage V of transistor Q4 is... Gnd_Q4 <V PN_Q4 V PN_Q4 If the voltage across the PN junction of transistor Q4 is V1, then transistor Q4 is operating in the cutoff state (or off state). Because transistor Q4 is operating in the cutoff state, the input voltage V1 becomes the input voltage V2 after passing through resistor R1, which leads to a change in the BE voltage V2 of transistor Q2. BE_Q2 Less than the PN junction voltage V of transistor Q2 PN_Q2 This causes transistor Q2 to operate in the cutoff state (or off state); since transistor Q2 is operating in the cutoff state, resistor R11 is connected to GND, so the input voltage V of transistor Q3 is... Gnd_Q3 <V PN_Q3 V PN_Q3 If the PN junction voltage of transistor Q3 is given, then transistor Q3 is operating in the cutoff state (or off state).

[0040] 4. The output voltage V of the other path out_Nomal After passing through resistors R16 and R17, because V out_Nomal >V PN_Q5 The PN junction voltage V of transistor Q5 PN_Q5 And the base current I of transistor Q5 base_Q5 ≈((V out_Nomal -V PN_Q5 ) / R16-(V PN_Q5 / R17)), the DC amplification factor βQ5 of transistor Q5, designed for transistor Q5 to operate in saturation (or conduction), then I c_Q5 ≈V1 / R15, Design I base_Q5 *β Q5 >>I c_Q5 Then, transistor Q5 operates in saturation (or conduction), and the saturation voltage is V. sat_Q5 Since transistor Q2 is operating in the cutoff state, then (V Gnd_Q3 -V sat_Q5 ) <V PN_D4 Then diode D4 operates in the off state;

[0041] 5. Based on the above analysis, under fault-free conditions, the output voltage is stable at V. out_Nomal ;

[0042] ■ When the connected simulated load R4 is abnormal, it means that the product load is in an abnormal short-circuit state;

[0043] 1. When load R4 is short-circuited, V out_Nomal It will be instantly pulled to GND, then V out_Nomal =V Gnd Because of V Gnd <V PN_D5 Then diode D5 is in the forward conduction state; because V Gnd <V PN_Q5 If so, transistor Q5 will operate in the cutoff state (or off state);

[0044] 2. The base of transistor Q6 is pulled low to V. Gnd Then (V C3_Vol -V Gnd )>V PN_Q6 Capacitor C3 will discharge instantaneously, I base_Q6 =(V C3_Vol -V Gnd ) / R18, DC amplification factor β of transistor Q6 Q6 The saturation voltage is V sat_Q6 If transistor Q6 is designed to operate in saturation, then I c_Q6 ≈(V C3_Vol -V sat_Q6 ) / R10, Design I base_Q6 *β Q6 >>I c_Q6 If so, transistor Q6 will operate in saturation (or conduction).

[0045] 3. Because transistor Q6 is saturated and conducting, (V C3_Vol -V sat_Q6 )>V PN_Q4 Then transistor Q4 is turned on, and the base current I of transistor Q4 is... base_Q4 ≈((V C3_Vol -V sat_Q6 -V PN_Q4 ) / R10-(V PN_Q4 / R17)), the DC amplification factor βQ4 of transistor Q4, designed for transistor Q4 to operate in saturation, then I c_Q4 ≈(V1-V PN_Q2 -V sat_Q4 ) / R6, Design I base_Q4 *β Q4 >>I c_Q4 Then transistor Q4 operates in saturation state, and the saturation voltage is V. sat_Q4 Because transistor Q4 is saturated and conducting, transistor Q2 is also turned on. Therefore, the input voltage V1 passes through resistor R2, the collector-emitter junction of transistor Q2, resistor R7, and the base-beta junction of transistor Q3, resulting in a base input voltage Vo of transistor Q3. inbase_Q3 >V PN_Q3 Meanwhile, Vinbase_Q3 The feedback from diode D3 and resistor R9 is sent to the base of transistor Q4, causing transistor Q4 to be in a conducting state. The conduction of transistor Q4 in turn causes transistor Q2 to be in a conducting state, forming a positive feedback, which keeps transistor Q4 in a conducting state, and in turn keeps transistor Q3 in a conducting state.

[0046] 4. The conduction of transistor Q3 pulls the anode of Zener diode D2 down to its saturation voltage of V. sat_Q2 This makes V sat_Q2 <V PN_Q1 Then the power path Q1 is cut off; when the circuit is in short-circuit fault failure mode, the transistor Q3 will always work in saturation state, stably making the power transistor Q1 work in the cut-off state.

[0047] ■ When the connected simulated load R4 changes from abnormal to normal, that is, when the product load fault disappears, the product will automatically reset and soft-start back to the working state.

[0048] 1. Before the simulated load R4 is removed from the short-circuit failure mode and returns to normal, transistor Q3 remains in saturation and power transistor Q1 remains in cutoff. At this time, the input voltage V1 is clamped at V through resistor R13 and Zener diode D6. D6_Ref This voltage charges capacitor C2 through resistor R14 and diode D5. When the charging voltage is V... C2_Vol >V PV_D5 Then transistor Q5 will conduct;

[0049] 2. Based on the above analysis, the input voltage of transistor Q3 under abnormal conditions is V. inbase_Q3 Due to the conduction of transistor Q5, and due to V inbase_Q3 >V D4 This causes diode D4 to conduct, which in turn causes the input voltage V of transistor Q3 to decrease. inbase_Q3 Clamped to (V) by diode D4 PV_D4 +V sat_Q5 );

[0050] 3. Clamping voltage of diode D4 (V) D4 +V sat_Q5 ) <V PN_Q3 Then, transistor Q3 operates in the off state, and the input voltage V1 passes through the anti-reverse diode D1, is filtered by capacitor C1, and is then converted into the output voltage V by the voltage regulator circuit 110 composed of resistor R3, Zener diode D2, and transistor Q1. out_Noma l, and V out_Nomal >(V D6_Ref +V PV_D5If the path for charging capacitor C2 via resistor R14 and diode D5 is interrupted, the self-starting reset circuit fails.

[0051] 4. Based on the above analysis, the circuit's self-reset restart was successful, and the circuit returned to normal operation.

[0052] It should be noted that in the voltage regulator circuit 110, diode D1 acts as a reverse current preventer; capacitors C1 and C2 act as filters; transistor Q1 operates in amplification mode, amplifying the current; resistor R3 limits the current; and Zener diode D2 provides the output voltage reference. In the soft-restart circuit 120, resistor R13 limits the current, and R14 is a current-limiting resistor; diode D5 prevents reverse current; and Zener diode D6 provides the reference voltage. In the fault control circuit 140, resistors R7 and R8 provide the base current to transistor Q3; transistor Q3 switches its switching state according to the fault condition. In the fault detection circuit 130, diodes D3, D4, and D7 are used to prevent reverse current flow; transistors Q2, Q4, Q5, and Q6 operate in switching mode; capacitor C3 stabilizes the collector voltage of transistor Q6; resistors R1, R2, R6, R9, R10, R11, R12, R15, R16, R17, R18, and R19 provide base current and prevent false triggering.

[0053] In summary, this invention can detect the operating status of the circuit in real time based on the load condition, and can automatically restart the reset circuit to resume operation after the load failure fault is cleared. This invention has the following features:

[0054] Beneficial effects:

[0055] 1) Strong anti-interference capability; as long as the failure exists, there will definitely be no output.

[0056] 2) As long as the load returns to normal, it will definitely restart through the hardware self-reset circuit.

[0057] It should be noted that any modifications made by those skilled in the art to the specific embodiments of this utility model do not depart from the scope of the claims of this utility model. Accordingly, the scope of the claims of this utility model is not limited to the foregoing specific embodiments.

Claims

1. A functional fault diagnosis, protection, and self-reset circuit, characterized in that, It includes: The voltage regulator circuit has its power supply terminal Vcc connected to the power supply V1 and its output terminal Vout connected to the load. The voltage regulator circuit outputs a stable voltage based on the voltage at the power supply terminal Vcc through its output terminal Vout. Capacitor C2 is connected between the output terminal Vout and the ground terminal; The soft-reboot circuit has one end connected to the power supply terminal Vcc and the other end connected to the output terminal Vout. When the voltage regulator circuit is working and the load is normal, the soft-reboot circuit has no current output, thus stopping the charging of the capacitor C2. When the voltage regulator circuit is not working and the load fault is removed, the soft-reboot circuit generates current from the power supply terminal Vcc to the output terminal Vout, thereby charging the capacitor C2. The fault detection circuit has its power supply terminal A connected to the power supply terminal VCC, its detection terminal B connected to the output terminal Vout, and its output terminal C outputting the detection result. When a load fault is detected based on the output terminal Vout, the fault detection circuit outputs the final detection result indicating the load fault through its output terminal C; when the load is detected to be normal based on the output terminal Vout, the fault detection circuit outputs the final detection result indicating the load is normal through its output terminal C. The fault control circuit has its input terminal connected to the output terminal C of the fault detection circuit and its output terminal D connected to the control terminal of the voltage regulator circuit. When it receives the final detection result indicating a load fault, the fault control circuit controls the voltage regulator circuit to not work; when it receives the final detection result indicating a normal load, the fault control circuit controls the voltage regulator circuit to work.

2. The functional fault diagnosis, protection, and self-reset circuit according to claim 1, characterized in that, The fault detection circuit includes a first detection circuit and a second detection circuit. The power supply terminal of the first detection circuit is connected to the power supply terminal A of the fault detection circuit, its detection terminal is connected to the output terminal Vout, and its output terminal E is connected to the output terminal C of the fault detection circuit. The power supply terminal of the second detection circuit is connected to the power supply terminal A of the fault detection circuit, its detection terminal is connected to the output terminal Vout, and its output terminal is also connected to the output terminal C of the fault detection circuit. During the operation of the voltage regulator circuit, when the first detection circuit detects that the load is normal based on the output terminal Vout, the output terminal E of the first detection circuit outputs a first detection result indicating that the load is normal. When the second detection circuit detects that the load is normal based on the output terminal Vout, the second detection result output by the output terminal of the second detection circuit does not affect the first detection result. At this time, the output terminal C of the fault detection circuit takes the first detection result output by the first detection circuit as the final detection result. During the operation of the voltage regulator circuit, after the first detection circuit detects a load fault based on the output terminal Vout, the output terminal E of the first detection circuit continuously outputs a first detection result indicating a load fault. When the second detection circuit detects a load fault based on the output terminal Vout, the second detection result output by the output terminal of the second detection circuit does not affect the first detection result. At this time, the output terminal C of the fault detection circuit takes the first detection result output by the first detection circuit as the final detection result. During the period when the voltage regulator circuit is not working, the output terminal E of the first detection circuit continuously outputs a first detection result indicating a load fault. When the second detection circuit detects that the load is normal based on the output terminal Vout, its output terminal outputs a second detection result indicating that the load is normal. At this time, the output terminal C of the fault detection circuit takes the second detection result output by the second detection circuit as the final detection result.

3. The functional fault diagnosis, protection, and self-reset circuit according to claim 2, characterized in that, The voltage regulator circuit includes a resistor R3, a Zener diode D2, and a power transistor Q1. The first connection terminal of the power transistor Q1 is connected to the power supply terminal VCC, its second connection terminal is connected to the output terminal Vout, and its control terminal is connected to node F; the negative terminal of the Zener diode D2 is connected to node F, and its positive terminal is grounded. One end of the resistor R3 is connected to the first connection terminal of the power transistor Q1, and the other end is connected to the node F; the node F is the control terminal of the voltage regulator circuit. When the power transistor Q1 is turned on, the voltage regulator circuit operates; when the power transistor Q1 is turned off, the voltage regulator circuit 110 operates.

4. The functional fault diagnosis, protection, and self-reset circuit according to claim 3, characterized in that, The voltage regulator circuit also includes capacitor C1 and diode D1. The positive terminal of diode D1 is connected to the power supply terminal VCC, and its negative terminal is connected to the first connection terminal of power transistor Q1 and the power supply terminal A of the fault detection circuit; one end of capacitor C1 is connected to the first connection terminal of power transistor Q1, and the other end is grounded.

5. The functional fault diagnosis, protection, and self-reset circuit according to claim 4, characterized in that, The power transistor Q1 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the power transistor Q1 are the collector, emitter, and base of the NPN transistor, respectively.

6. The functional fault diagnosis, protection, and self-reset circuit according to claim 2, characterized in that, The soft-reboot circuit includes resistor R13, Zener diode D6, resistor R14, and diode D5. One end of resistor R13 is connected to the power supply terminal A of the fault detection circuit, and the other end is connected to node G; one end of resistor R14 is connected to node G, and the other end is connected to the positive terminal of diode D5, and the negative terminal of diode D5 is connected to the output terminal Vout; the negative terminal of Zener diode D6 is connected to node G, and its positive terminal is grounded.

7. The functional fault diagnosis, protection, and self-reset circuit according to any one of claims 2-6, characterized in that, The first detection circuit includes diode D3, diode D7, capacitor C3, switching device Q2, switching device Q4, switching device Q6, resistors R1, R2, R6, R9, R10, R11, R12, R18, and R19. The positive terminal of diode D7 is connected to the output terminal Vout, and its negative terminal is grounded through capacitor C3; the first connection terminal of switching device Q6 is connected to the negative terminal of diode D7, its control terminal is connected to the output terminal Vout through resistor R18, and its second connection terminal is connected to node H through resistor R10; one end of resistor R19 is connected to the output terminal Vout, and its other end is connected to the first connection terminal of switching device Q6; one end of resistor R12 is connected to node H, and its other end is grounded; the first connection terminal of switching device Q4 is connected to node I through resistor R6, and its second connection terminal is connected to the output terminal Vout through resistor R18. The connection terminal is grounded, and its control terminal is connected to node H; the cathode of diode D3 is connected to node H via resistor R9, and its anode is connected to the output terminal E of the first detection circuit; one end of resistor R11 is connected to the output terminal E of the first detection circuit, and the other end is grounded; the first connection terminal of switching device Q2 is connected to the power supply terminal A of the fault detection circuit via resistor R2, its second connection terminal is connected to the output terminal E of the first detection circuit 132, and its control terminal is connected to node I; one end of resistor R1 is connected to the power supply terminal A of the fault detection circuit, and the other end is connected to node I.

8. The functional fault diagnosis, protection, and self-reset circuit according to claim 7, characterized in that, The second detection circuit includes a diode D4, a switching device Q5, resistors R15, R16, and R17. The anode of diode D4 is connected to the output terminal C of the fault detection circuit, and its cathode is connected to the first connection terminal of the switching device Q5. The second connection terminal of the switching device Q5 is grounded, and its control terminal is connected to the output terminal Vout via resistor R16. One end of resistor R17 is connected to the control terminal of the switching device Q5, and the other end is grounded. One end of resistor R15 is connected to the first connection terminal of the switching device Q5, and the other end is connected to the power supply terminal A of the fault detection circuit. The fault control circuit includes resistors R7 and R8 and a switching device Q3. The first connection terminal of the switching device Q3 is connected to the output terminal D of the fault control circuit, and its second connection terminal is grounded. Its control terminal is connected to the output terminal C of the fault detection circuit through the resistor R7. One end of the resistor R8 is connected to the control terminal of the switching device Q3, and the other end is grounded.

9. The functional fault diagnosis, protection, and self-reset circuit according to claim 8, characterized in that, When the voltage regulator circuit is working and the load is normal, the switching device Q6 is turned off, the switching device Q4 is turned off, the switching device Q2 is turned off, the switching device Q5 is turned on, and the diode Q4 is reverse-cut off, thereby turning off the switching device Q3, and thus keeping the voltage regulator circuit working. At this time, the diode D5 is reverse-cut off, and the soft restart circuit stops charging the capacitor C2. When the voltage regulator circuit is working and the load fails, the switching device Q6 is turned on, the switching devices Q4 and Q2 are continuously turned on, and the switching device Q5 is turned off, thereby turning on the switching device Q3, which in turn makes the voltage regulator circuit not work. At this time, the diode D5 is forward turned on, thereby the soft restart circuit charges the capacitor C2. When the voltage regulator circuit is not working and the load fault is removed, the diode D5 is forward-biased, and the soft-restart circuit charges the capacitor C2, so that the switching device Q5 is turned on and the diode Q4 is forward-biased, thereby turning on the switching device Q3, and thus making the voltage regulator circuit work.

10. The functional fault diagnosis, protection, and self-reset circuit according to claim 8, characterized in that, The switching device Q2 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q2 are the emitter, collector, and base of the PNP transistor, respectively. The switching device Q3 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q3 are the collector, emitter, and base of the NPN transistor, respectively. The switching device Q4 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q4 are the collector, emitter, and base of the NPN transistor, respectively. The switching device Q5 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q5 are the collector, emitter, and base of the NPN transistor, respectively. The switching device Q6 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q6 are the emitter, collector, and base of the PNP transistor, respectively.

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