Compensation circuit of PGA circuit and electronic equipment

Abstract

The utility model provides a compensation circuit of a PGA circuit and an electronic device, the change of ambient temperature is sensed through a voltage difference generation unit, the voltage difference applied to a current generation unit is linearly changed based on the temperature change, the current generation unit generates a reference current based on the voltage difference, and the reference current is applied to the PGA circuit. And the current is output to the feedback end of the PGA circuit through the current mirror unit, so that the problem that the compensation of the existing PGA circuit causes extra power consumption to the electronic equipment is solved.

Description

Technical Field

[0001] This utility model relates to the field of power electronics, and in particular to a compensation circuit and electronic device for a PGA circuit. Background Technology

[0002] In the fields of high-precision analog front-ends and signal conditioning, programmable gain amplifiers (PGAs) are widely used as adjustable gain modules in sensor readouts, voltage / current sensing, and analog-to-digital converter (ADC) front-end circuits. PGAs allow the system to dynamically adjust the amplification factor based on the strength of the input signal to optimize signal acquisition and processing. However, the gain characteristics of traditional PGAs are susceptible to changes in semiconductor device parameters with temperature. Specifically, as temperature increases, the mobility (μ) of the MOS device decreases, the threshold voltage (Vth) changes, and parasitic parameters drift. These factors can all lead to amplifier gain deviation and decreased linearity, thereby reducing the overall accuracy of the system.

[0003] To address this issue, existing technologies typically employ external temperature sensors, lookup tables (LUTs), or digital control calibration methods to compensate for the temperature of the PGA. While these methods can reduce the impact of temperature on gain to some extent, they significantly increase the complexity of circuit design and consequently increase system power consumption.

[0004] In view of the above, this application is hereby submitted. Utility Model Content

[0005] This utility model discloses a compensation circuit and electronic device for a PGA circuit, which aims to solve the problem that the compensation of existing PGA circuits will cause additional power consumption to electronic devices.

[0006] The first embodiment of this utility model provides a compensation circuit for a PGA circuit, including a PCB board, a PGA circuit disposed on the PCB board, and a PTAT compensation circuit, wherein the feedback terminal of the PGA circuit is electrically connected to the output terminal of the PTAT compensation circuit.

[0007] The PTAT compensation circuit includes a differential pressure generation unit, a current generation unit, and a current mirror unit.

[0008] The differential pressure generating unit is configured to linearly change the differential pressure applied to the current generating unit with the change of ambient temperature. The differential pressure can generate a current on the current generating unit and output the current to the feedback terminal of the PGA circuit through the current mirror unit.

[0009] Preferably, the differential pressure generating unit includes a first transistor and a second transistor;

[0010] The base (B) and collector (C) of the first transistor are electrically connected and grounded, the base (B) and collector (C) of the second transistor are electrically connected and grounded, the emitter (E) of the first transistor is electrically connected to the current mirror unit, and the emitter (E) of the second transistor is electrically connected to the current mirror unit through the current generating unit.

[0011] The area ratio of the first transistor to the second transistor is N:1.

[0012] Preferably, the fixed voltage difference generated by the first transistor and the second transistor is:

[0013] ΔV_BE=(kT / q)*ln(N),

[0014] Where T is the absolute temperature, k is the Boltzmann constant, and q is the electron charge.

[0015] Preferably, the current generating unit includes a first resistor;

[0016] The first end of the first resistor is electrically connected to the emitter (E) of the second transistor, and the second end of the first resistor is electrically connected to the current mirror unit.

[0017] Wherein, the current in the first resistor is: I_PTAT=ΔV_BE / R, where R is the resistance value of the first resistor, and ΔV_BE is the fixed voltage generated by the first transistor and the second transistor.

[0018] Preferably, the current mirror unit includes a first MOSFET, a second MOSFET, a third MOSFET, a fourth MOSFET, and a fifth MOSFET;

[0019] The first MOSFET, the second MOSFET, and the third MOSFET are connected in series and their tops are used to connect to the power supply. The bottom of the third MOSFET is used to output a temperature-varying current to the feedback terminal of the PGA circuit.

[0020] The fourth MOSFET and the fifth MOSFET are connected in parallel. The top of the fourth MOSFET is electrically connected to the bottom of the first MOSFET, and the bottom of the fourth MOSFET is electrically connected to the emitter (E) of the first MOSFET. The bottom of the fifth MOSFET is electrically connected to the emitter (E) of the second MOSFET through the first resistor.

[0021] The second embodiment of this utility model provides an electronic device, including a compensation circuit for a PGA circuit as described in any one of the above claims.

[0022] The present invention provides a compensation circuit and electronic device for a PGA circuit. The differential pressure generation unit senses the temperature change on the PCB board and linearly changes the differential pressure applied to the current generation unit based on the temperature change. The current generation unit generates a reference current based on the differential pressure and outputs it to the feedback terminal of the PGA circuit through a current mirror unit. This solves the problem that the compensation of the existing PGA circuit will cause additional power consumption to the electronic device. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the PGA circuit provided in an embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram of a compensation circuit for a PGA circuit provided in an embodiment of the present invention. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model. Therefore, the following detailed description of the embodiments of this utility model provided in the accompanying drawings is not intended to limit the scope of the claimed utility model, but merely represents selected embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model.

[0026] The specific embodiments of this utility model are described in detail below with reference to the accompanying drawings.

[0027] This utility model discloses a compensation circuit and electronic device for a PGA circuit, which aims to solve the problem that the compensation of existing PGA circuits will cause additional power consumption to electronic devices.

[0028] Please see Figure 1 and Figure 2 The first embodiment of this utility model provides a compensation circuit for a PGA circuit 4, including a PCB board, a PGA circuit 4 disposed on the PCB board, and a PTAT compensation circuit, wherein the feedback terminal of the PGA circuit 4 is electrically connected to the output terminal of the PTAT compensation circuit.

[0029] The PTAT compensation circuit includes a differential pressure generation unit 1, a current generation unit 3, and a current mirror unit 2.

[0030] The differential pressure generating unit 1 is configured to linearly change the differential pressure applied to the current generating unit 3 as the temperature on the PCB changes. The differential pressure can generate a current on the current generating unit 3 and output the current to the feedback terminal of the PGA circuit 4 through the current mirror unit 2.

[0031] It should be noted that the differential pressure generating unit 1 utilizes the physical characteristics of semiconductor devices to generate a differential pressure signal that is linearly related to temperature. This linear differential pressure signal is the foundation of the entire compensation mechanism, directly reflecting the impact of temperature changes. Subsequently, the current generating unit 3 converts the aforementioned differential pressure signal into a current signal. The generated temperature-related current signal is finally transmitted to the feedback terminal of the PGA circuit 4 by the current mirror unit 2. The main function of the current mirror unit 2 is to replicate the current generated by the current generating unit 3 and amplify or adjust it to the required level. Since the compensation circuit directly uses temperature-related physical quantities to generate the compensation signal, there is no need to introduce complex external sensors or digital control modules, thus simplifying the circuit design.

[0032] In one possible embodiment of this utility model, the differential pressure generating unit 1 includes a first transistor Q1 and a second transistor Q2;

[0033] The base (B) and collector (C) of the first transistor Q1 are electrically connected and grounded, the base (B) and collector (C) of the second transistor Q2 are electrically connected and grounded, the emitter (E) of the first transistor Q1 is electrically connected to the current mirror unit 2, and the emitter (E) of the second transistor Q2 is electrically connected to the current mirror unit 2 through the current generating unit 3.

[0034] The area ratio of the first transistor Q1 to the second transistor Q2 is N:1.

[0035] It should be noted that, through the cooperation of the first transistor Q1 and the second transistor Q2, a pressure difference signal that is linearly related to temperature is generated. In the circuit, the area ratio of the first transistor Q1 and the second transistor Q2 is N:1, which affects the magnitude of the pressure difference and its temperature dependence.

[0036] Specifically, the first transistor Q1 and the second transistor Q2 are used in a diode-like configuration, with their bases (B) and collectors (C) connected together, making the transistors resemble a large-area diode. They utilize the PN junction characteristics to generate a temperature-dependent voltage difference. Since the area ratio of Q1 to Q2 is N:1, they will generate a voltage difference ΔV_BE under the same bias conditions.

[0037] Furthermore, the fixed voltage difference generated by the first transistor Q1 and the second transistor Q2 is: ΔV_BE = (kT / q) * ln(N), where T is the absolute temperature, k is the Boltzmann constant, and q is the electron charge. Since ΔV_BE is linearly related to temperature T, it can provide a stable temperature characteristic output. It should be noted that the controllability of the area ratio allows the circuit to flexibly adjust the value of N according to specific application requirements to optimize the temperature compensation effect. On the other hand, using the temperature characteristics of the transistors themselves to generate the ΔV_BE signal eliminates the need for an additional temperature sensor module, simplifying circuit design and reducing system power consumption.

[0038] In one possible embodiment of this utility model, the current generating unit 3 includes a first resistor R;

[0039] The first end of the first resistor R is electrically connected to the emitter (E) of the second transistor Q2, and the second end of the first resistor R is electrically connected to the current mirror unit 2.

[0040] Wherein, the current in the first resistor R is: I_PTAT=ΔV_BE / R, where R is the resistance value of the first resistor R, and ΔV_BE is the fixed voltage generated by the first transistor Q1 and the second transistor Q2.

[0041] It should be noted that the voltage across the resistor, achieved through the aforementioned connection method, is generated by the voltage difference generating unit 1. According to the circuit's operating principle, the current flowing through the first resistor R is I_PTAT=(kT / q)*ln(N) / R, where R is the resistance of the first resistor. Since the voltage difference across the resistor is proportional to temperature, the generated current also exhibits temperature-dependent characteristics.

[0042] In one possible embodiment of this utility model, the current mirror unit 2 includes a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, a fourth MOSFET M4, and a fifth MOSFET M5;

[0043] The first MOSFET M1, the second MOSFET M2, and the third MOSFET M3 are connected in series and their tops are used to connect to the power supply. The bottom of the third MOSFET M3 is used to output the temperature-changing current to the feedback terminal of the PGA circuit 4.

[0044] The fourth MOSFET M4 and the fifth MOSFET M5 are connected in parallel. The top of the fourth MOSFET M4 is electrically connected to the bottom of the first MOSFET M1, and the bottom of the fourth MOSFET M4 is electrically connected to the emitter (E) of the first transistor Q1. The bottom of the fifth MOSFET M5 is electrically connected to the emitter (E) of the second transistor Q2 through the first resistor R.

[0045] The tops of the series-connected first MOSFET M1, second MOSFET M2, and third MOSFET M3 are connected to the power supply, providing the necessary operating voltage to ensure the normal operation of the entire circuit. The bottom of the third MOSFET M3 is used to output a current signal, representing the current caused by temperature changes, which is directly fed back to the PGA circuit 4 to adjust the gain. This allows the output current to efficiently transmit temperature information, thereby achieving dynamic gain compensation.

[0046] In the parallel section, the top of the fourth MOSFET M4 is electrically connected to the bottom of the first MOSFET M1, providing a stable current input path. Simultaneously, its bottom is connected to the emitter (E) of the first transistor Q1, directly transmitting the current signal from the differential voltage generation unit 1. The bottom of the fifth MOSFET M5 is connected to the emitter of the second transistor Q2 through a first resistor R, allowing the PTAT current to effectively participate in the replication process of the current mirror unit 2. Furthermore, leveraging the characteristics of the MOSFETs, the current mirror unit 2 can achieve precise replication of the input current. By adjusting the size ratio of the MOSFETs, the output current multiplier can be flexibly controlled to meet different compensation requirements.

[0047] The second embodiment of this utility model provides an electronic device, including a compensation circuit of a PGA circuit 4 as described in any one of the above claims.

[0048] Based on the compensation circuit and electronic device of the PGA circuit 4 provided by the present invention, the temperature change on the PCB board is sensed by the differential pressure generation unit 1, and the differential pressure applied to the current generation unit 3 is linearly changed based on the temperature change. The current generation generates a reference current based on the differential pressure, and outputs it to the feedback terminal of the PGA circuit 4 through the current mirror unit 2. This solves the problem that the compensation of the existing PGA circuit 4 will cause additional power consumption to the electronic device.

[0049] The above are merely preferred embodiments of this utility model. The protection scope of this utility model is not limited to the above embodiments. All technical solutions that fall within the scope of this utility model's concept are protected by this utility model.

Claims

1. A compensation circuit for a PGA circuit, characterized in that, It includes a PCB board, a PGA circuit configured on the PCB board, and a PTAT compensation circuit, wherein the feedback terminal of the PGA circuit is electrically connected to the output terminal of the PTAT compensation circuit. The PTAT compensation circuit includes a differential pressure generation unit, a current generation unit, and a current mirror unit. The differential pressure generating unit is configured to linearly change the differential pressure applied to the current generating unit with the change of ambient temperature. The differential pressure can generate a current on the current generating unit and output the current to the feedback terminal of the PGA circuit through the current mirror unit.

2. The compensation circuit for a PGA circuit according to claim 1, characterized in that, The differential pressure generating unit includes a first transistor and a second transistor; The base (B) and collector (C) of the first transistor are electrically connected and grounded, the base (B) and collector (C) of the second transistor are electrically connected and grounded, the emitter (E) of the first transistor is electrically connected to the current mirror unit, and the emitter (E) of the second transistor is electrically connected to the current mirror unit through the current generating unit. The area ratio of the first transistor to the second transistor is N:

1.

3. The compensation circuit for a PGA circuit according to claim 2, characterized in that, The fixed voltage difference generated by the first transistor and the second transistor is: ΔV_BE=(kT / q)*ln(N), Where T is the absolute temperature, k is the Boltzmann constant, and q is the electron charge.

4. The compensation circuit for a PGA circuit according to claim 2, characterized in that, The current generating unit includes a first resistor; The first end of the first resistor is electrically connected to the emitter (E) of the second transistor, and the second end of the first resistor is electrically connected to the current mirror unit. Wherein, the current in the first resistor is: I_PTAT=ΔV_BE / R, where R is the resistance value of the first resistor, and ΔV_BE is the fixed voltage generated by the first transistor and the second transistor.

5. The compensation circuit for a PGA circuit according to claim 4, characterized in that, The current mirror unit includes a first MOSFET, a second MOSFET, a third MOSFET, a fourth MOSFET, and a fifth MOSFET; The first MOSFET, the second MOSFET, and the third MOSFET are connected in series and their tops are used to connect to the power supply. The bottom of the third MOSFET is used to output a temperature-varying current to the feedback terminal of the PGA circuit. The fourth MOSFET and the fifth MOSFET are connected in parallel. The top of the fourth MOSFET is electrically connected to the bottom of the first MOSFET, and the bottom of the fourth MOSFET is electrically connected to the emitter (E) of the first MOSFET. The bottom of the fifth MOSFET is electrically connected to the emitter (E) of the second MOSFET through the first resistor.

6. An electronic device, characterized in that, It includes a compensation circuit for a PGA circuit as described in any one of claims 1 to 5.

Images