Chip system, master control device and processing equipment

Abstract

The utility model provides a chip system, a master control device and processing equipment, and relates to a control technology. The chip system is applied to equipment comprising at least two execution motors, and mechanical structures corresponding to the at least two execution motors are matched with each other and used for achieving at least two continuous machining processes. The chip system comprises a chip output end and a chip input end, the chip output end is connected with the motor input ends of the at least two execution motors, and the chip input end is connected with the motor output ends of the at least two execution motors; the chip system is used for receiving at least two first feedback signals output by the at least two execution motors through the chip input end and sending corresponding first control instructions to the at least two execution motors through the chip output end; the first control instruction of any execution motor is determined according to the at least two first feedback signals. The chip system is beneficial to improving the matching effect of the mechanical structures corresponding to the at least two execution motors, so that the product processing quality is ensured.

Description

Technical Field

[0001] This application relates to control technology, and more particularly to a chip system, a main control device, and processing equipment. Background Technology

[0002] In the field of industrial automation, control schemes based on master control devices are extremely common system architectures. Master control devices, due to their reliability and stability in logic operations and instruction scheduling, are widely used in various types of automated equipment. Master control devices can work collaboratively with various functional modules and execution units via control buses (such as EtherCAT) to achieve overall logical control of the equipment.

[0003] In the product manufacturing process, multiple control systems typically collaborate around a master control unit. The master control unit issues commands, driving input / output, drives, and special function modules via a control bus. These modules then combine with peripheral execution units to achieve comprehensive logical control of the automated equipment, thereby enabling continuous product manufacturing.

[0004] However, in actual operation, due to issues such as response differences, fluctuations in operational stability, and insufficient parameter control precision of the execution units (such as motors), unstable factors in the processing process can easily occur, leading to situations such as material deformation, positional deviation, and structural damage, which is detrimental to ensuring product quality. Utility Model Content

[0005] This application provides a chip system, a main control device, and processing equipment to ensure product quality.

[0006] On one hand, this application provides a chip system applied to a device including at least two actuators, wherein the mechanical structures corresponding to the at least two actuators cooperate with each other to realize at least two consecutive processing processes; the chip system includes a chip output terminal and a chip input terminal, wherein the chip output terminal of the chip system is connected to the motor input terminal of the at least two actuators, and the chip input terminal of the chip system is connected to the motor output terminal of the at least two actuators;

[0007] The chip system is used to receive at least two first feedback signals output by the at least two actuators through the chip input terminal, and when the at least two first feedback signals are received, to send corresponding first control commands to the at least two actuators through the chip output terminal respectively; the first control command of any actuator is determined based on the at least two first feedback signals.

[0008] In one possible implementation, the chip system includes a first microprocessor and a programmable logic device, the first microprocessor and the programmable logic device being interconnected at high speed; wherein, the first microprocessor includes a trajectory planning module, the internal input of the trajectory planning module being connected to the internal output of the programmable logic device, and the internal output of the trajectory planning module being connected to the internal input of the programmable logic device;

[0009] The programmable logic device is used to receive at least two first feedback signals output by the at least two actuators through the chip input terminal, and send the at least two first feedback signals to the trajectory planning module;

[0010] The trajectory planning module is used to send the at least two first control instructions to the programmable logic device when the at least two first feedback signals are obtained, so that the programmable logic device sends the corresponding first control instructions to the at least two actuators through the chip output terminal.

[0011] In one possible implementation, the programmable logic device includes an encoder feedback module, the internal output of which is connected to the internal input of the trajectory planning module; the encoder feedback module is used to receive at least two first feedback signals output by the at least two actuators through the chip input and transmit the at least two first feedback signals to the trajectory planning module.

[0012] In one possible implementation, the first feedback signal includes at least one of a current feedback signal, a position feedback signal, and a velocity feedback signal.

[0013] In one possible implementation, the chip system is further configured to send a second control command to the at least two actuator motors via the chip output; the second control command is determined based on path planning information from the host computer.

[0014] In one possible implementation, the chip system further includes a second microprocessor, which is interconnected at high speed with a programmable logic device; wherein the second microprocessor includes a first closed-loop control module, the internal input of which is connected to the internal output of the encoder feedback module;

[0015] The encoder feedback module is also used to receive at least two second feedback signals output by the at least two actuator motors through the chip input terminal, and transmit the second feedback signals to the first closed-loop control module.

[0016] In one possible implementation, the internal output of the first closed-loop control module is connected to the internal input of the programmable logic device. The first closed-loop control module is used to obtain at least two third control instructions upon receiving the at least two second feedback signals, and to send the at least two third control instructions to the programmable logic device. The third control instruction for any actuator is determined based on the second feedback signal of the actuator.

[0017] The programmable logic device is also used to send the at least two third control commands to the at least two actuator motors respectively through the chip output terminal.

[0018] In one possible implementation, the second feedback signal is a position feedback signal or a velocity feedback signal.

[0019] In one possible implementation, the programmable logic device further includes a second closed-loop control module and a current sampling module;

[0020] The internal output terminal of the current sampling module is connected to the internal input terminal of the second closed-loop control module. The current sampling module is used to receive at least two current feedback signals output by at least two actuators through the chip input terminal and transmit the at least two current feedback signals to the second closed-loop control module.

[0021] When the second closed-loop control module obtains at least two fourth control commands based on the at least two current feedback signals, it sends the at least two fourth control commands to the at least two actuators through the chip output terminal; the fourth control command for any actuator is determined based on the current feedback signal of the actuator.

[0022] In one possible implementation, the programmable logic device further includes an instruction driving module, the internal input of which is connected to the internal output of the first closed-loop control module, the second closed-loop control module, and the trajectory planning module.

[0023] The instruction driving module is used to convert the control instruction into a drive signal when a control instruction is received; the control instruction is any one of a first control instruction, a second control instruction, a third control instruction, and a fourth control instruction;

[0024] The instruction driving module is also used to send the driving signal to the at least two actuator motors through the chip output terminal.

[0025] In one possible implementation, the first microprocessor further includes a feedforward control module, the internal input of which is connected to the internal output of the encoder feedback module, and the internal output of which is connected to the internal input of the programmable logic device.

[0026] The feedforward control module is used to obtain at least two fifth control commands when it receives the at least two first feedback signals, and send the at least two fifth control commands to the programmable logic device;

[0027] The programmable logic device is used to send the at least two fifth control commands to the at least two actuator motors respectively through the chip output terminal.

[0028] In one possible implementation, the first microprocessor further includes a human-computer interaction module, which includes multiple external output terminals for connecting multiple human-computer interaction devices.

[0029] In one possible implementation, the high-speed interconnect is achieved via AXI interconnect.

[0030] Secondly, this application provides a main control device, which is applied to a device including at least two actuators, wherein the mechanical structures corresponding to the at least two actuators cooperate with each other to realize at least two continuous processing processes;

[0031] The device includes a chip system as described in any of the first aspects, and a driver; the input terminal of the driver is connected to the chip output terminal of the chip system for acquiring a first control command, converting the first control command into a high-voltage signal upon receiving the first control command, and sending the high-voltage signal to the at least two actuator motors.

[0032] Thirdly, this application provides a processing device, which includes at least two actuators and a chip system as described in any of the first aspects, or a main control device as described in any of the second aspects.

[0033] This application provides a chip system, a main control device, and a processing equipment. The chip system includes a chip output terminal and a chip input terminal. In this application, the chip system provides a chip input terminal capable of receiving first feedback signals from at least two actuators, and a chip output terminal capable of sending first control commands to at least two actuators respectively. The first control command sent to any actuator is determined based on at least two first feedback signals. This allows each actuator to reference the operating status of other actuators in real time while responding to the corresponding control command and performing actions. This achieves coordinated closed-loop control of at least two actuators, effectively ensuring the coordination of the mechanical mechanisms corresponding to the at least two actuators. This effectively avoids instability in the processing process caused by differences in response from the actuators, fluctuations in operational stability, and insufficient parameter control accuracy, thereby helping to ensure product quality. Attached Figure Description

[0034] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0035] Figure 1 This is a schematic diagram illustrating an application scenario of a chip system provided in an embodiment of this application;

[0036] Figure 2 A schematic diagram of the structure of a chip system provided in this application embodiment. Figure 1 ;

[0037] Figure 3 A schematic diagram of the structure of a chip system provided in this application embodiment. Figure 2 ;

[0038] Figure 4 This application provides a structural example diagram of a chip system according to an embodiment of the present application;

[0039] Figure 5 This is a schematic diagram of the structure of a main control device provided in an embodiment of this application;

[0040] Figure 6 This is a schematic diagram of a processing device provided in an embodiment of this application.

[0041] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0042] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0043] In the field of industrial automation control, control schemes based on master control devices are extremely common system architectures, such as those based on Programmable Logic Controllers (PLCs). These master control devices are widely used in numerous automated devices due to their reliability and stability. The master control device can work collaboratively with various modules and execution units via a control bus (such as EtherCAT) to complete the overall logic control of the equipment.

[0044] During product processing, multiple control systems collaborate with a master control unit at its core. The master control unit issues commands, driving input / output, servo motors, and special function modules via the EtherCAT control bus. These modules, in conjunction with peripheral execution units, achieve overall logical control of the automated equipment. For example, in a Z-type stacking machine, the PLC employs typical cam control, matching the positional relationships of the buffer, stacking platform (swing arm), and pressure knife to achieve the continuous product processing of high-speed stacking.

[0045] Understandably, processing procedures like those described above typically involve multiple servo motors. The mechanical structures of these servo motors work together to achieve continuous processing, such as matching buffers, stacking platforms, and the positional relationship of the pressure tool. However, due to differences in servo motor response, speed fluctuations, and tension control accuracy, diaphragm tension fluctuations can easily occur, leading to diaphragm wrinkles, misalignment, or even tearing, which is detrimental to ensuring product quality.

[0046] Therefore, this application provides a chip system, a main control device, and a processing equipment to solve the above-mentioned problems. Specifically, the chip system of this application is applied to a device including at least two actuators, the mechanical structures of which cooperate to realize at least two consecutive processing processes. The chip system of this application receives at least two first feedback signals output from the at least two actuators, obtains a first control command for each actuator based on the at least two first feedback signals, and sends the corresponding first control command to the at least two actuators respectively.

[0047] The chip system of this application enables the first control command for each actuator to refer to the state of other actuators, thereby realizing the coordinated closed-loop control of at least two actuators. This effectively ensures the coordination effect of the mechanical mechanisms corresponding to at least two actuators, and thus helps to ensure product quality.

[0048] It is understood that the chip system of this application is applicable to any device that includes at least two actuators, and the mechanical structures corresponding to the at least two actuators cooperate with each other to realize at least two consecutive processing processes. For example, a stacking device includes both actuators for driving the stacking table (swing arm) and actuators for driving the buffer structure.

[0049] For example, Figure 1 This is a schematic diagram illustrating an application scenario of a chip system provided in an embodiment of this application, such as... Figure 1 As shown, the chip system of this application can be used in a processing device comprising three actuators, wherein the mechanical structures corresponding to the three actuators cooperate with each other to realize three consecutive processing processes: processing process ①, processing process ②, and processing process ③. Figure 1 As shown, the chip system includes a chip input terminal and a chip output terminal. The chip system is connected to the motor output terminals of three actuator motors through the chip input terminal, and the chip system is connected to the motor input terminals of three actuator motors through the chip output terminal.

[0050] With the chip system of this application, the processing equipment can simultaneously control any one of the three actuators through the first feedback signals of the three actuators, which helps to ensure the coordination effect of the mechanical structures corresponding to the three actuators, and thus helps to ensure the quality of the processed products.

[0051] Understandably, in practical applications, there is no limit to the number of actuators, and correspondingly, there is no limit to the number of chip systems used in processing equipment.

[0052] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Where the embodiments do not conflict, the following embodiments and features thereof can be combined with each other.

[0053] This application provides a chip system applied to a device including at least two actuators, wherein the mechanical structures corresponding to the at least two actuators cooperate with each other to realize at least two consecutive processing processes. Figure 2 A schematic diagram of the structure of a chip system provided in this application embodiment. Figure 1 ,like Figure 2 As shown, the chip system in this embodiment includes a chip input terminal and a chip output terminal.

[0054] The chip system's output terminal is connected to the motor input terminals of at least two actuators, and its input terminals are connected to the output terminals of at least two actuators. Based on this, the chip system receives at least two first feedback signals output by the at least two actuators through its input terminals, and upon receiving the at least two first feedback signals, sends corresponding first control commands to each of the at least two actuators through its output terminals. Specifically, the first control command for any actuator is determined based on the at least two first feedback signals.

[0055] In this embodiment, the chip system may specifically include at least two chip output terminals for sending first control commands to at least two actuators, respectively. In practical applications, the chip system may also include only one chip output terminal. In this case, the chip system can encode at least two first control commands to obtain a composite command. Correspondingly, the at least two actuators are equipped with corresponding decoding circuits or modules, capable of parsing their own first control command from the received composite command. The chip system may also include other numbers of chip output terminals, as long as each actuator receives an accurate first control command; this embodiment does not limit this.

[0056] Similarly, in this embodiment, the chip system may specifically include at least two chip input terminals for receiving first feedback signals output by at least two actuators, respectively. In practical applications, the chip system may also include only one chip input terminal. The feedback signals output by at least two actuators are superimposed through a resistor network and then output to the chip input terminal. After receiving the superimposed feedback signals, the chip system decouples the superimposed feedback signals using a specific algorithm and circuit to obtain the first feedback signal for each actuator. The chip system may also include other numbers of chip input terminals, as long as they can accurately receive the first feedback signal for each actuator; this embodiment does not limit this.

[0057] In this embodiment, for any actuator motor, the chip system generates a first control signal corresponding to that actuator motor based on at least two first feedback signals using an analog circuit. Specifically, for any actuator motor, the chip system utilizes operational amplifiers to construct a summing circuit and a proportional-integral-derivative (PID) circuit. At least two first feedback signals serve as inputs to the summing circuit, and the weights of each first feedback signal are set by adjusting parameters such as resistor values, achieving a weighted summation of the at least two first feedback signals. Further, operational amplifiers are used to construct integrator and derivative circuits to perform proportional, integral, and derivative operations on the error values ​​of the at least two feedback signals, outputting a first control command to control the actuator motor.

[0058] In practical applications, when there is a nonlinear relationship between the first feedback signal and the first control command, the chip system can also use an analog multiplier circuit for any actuator motor. For example, in scenarios where the motor torque needs to be adjusted based on speed feedback and load feedback, the speed feedback signal and the load feedback signal are multiplied by an analog multiplier, and then combined with other linear operation circuits to obtain the final control command, thereby achieving more precise motor control.

[0059] In practical applications, for any actuator motor, the chip system can also utilize internally integrated specialized circuit modules for processing multiple feedback signals and generating control commands. For example, in some high-precision servo motor control systems, the chip system integrates dedicated position feedback signal processing modules, speed feedback signal processing circuits, and control command generation circuits based on specific algorithms to generate control commands from multiple feedback signals, thereby achieving high-performance motor control.

[0060] In this embodiment, the first feedback signal includes at least one of a current feedback signal, a position feedback signal, and a velocity feedback signal.

[0061] Understandably, the current feedback signal can reflect the current status of the actuator motor in real time. By monitoring the current feedback signal, the current of the actuator motor can be precisely adjusted, thereby controlling the torque output of the actuator motor and enabling the actuator motor to provide stable and accurate torque output under different load conditions.

[0062] Position feedback signals enable the chip system to monitor the position changes of the actuators in real time. By comparing the position feedback signals of each actuator, the chip system can adjust the running speed and position of each actuator, enabling multiple actuators to work together and ensuring that the actions of each part of the equipment are coordinated and consistent, avoiding interference or incoordination.

[0063] Speed ​​feedback signals enable the chip system to monitor the speed of the actuator motor in real time. When the actuator motor is affected by factors such as load changes and power fluctuations, the chip system adjusts the control parameters of the actuator motor in a timely manner based on the speed feedback signals.

[0064] As a preferred example, the first feedback signal includes a current feedback signal, a position feedback signal, and a speed feedback signal. This configuration can improve the performance of the motor control system from multiple dimensions, making the equipment operation more stable, precise, efficient, and safe.

[0065] In the chip system provided in this embodiment, the chip output terminal is connected to the motor input terminals of at least two actuators, and the chip input terminal is connected to the motor output terminals of at least two actuators, forming a complete feedback control loop. By receiving the first feedback signals from at least two actuators and outputting corresponding first control signals to each actuator based on these first feedback signals, precise control of the at least two actuators can be achieved. This ensures that the at least two actuators operate in the expected manner, thereby improving the coordination effect of the mechanical structures corresponding to the at least two actuators. This guarantees the accuracy and stability of the entire equipment processing process, and ultimately helps to improve the quality of the processed products.

[0066] Furthermore, in this embodiment, there is no limitation on the number of chip input terminals and chip output terminals. That is, at least two chip output terminals can send control commands to different actuators respectively, or a single chip output terminal can send a composite command which is then parsed by the decoding circuit at the actuator end. The same applies to the input terminals. This flexible configuration can adapt to multi-actuator device systems of varying sizes and complexities, improving the versatility and scalability of the chip system.

[0067] Optionally, the system is also used to send a second control command to at least two actuator motors via the chip output; the second control command is determined based on the path planning information from the host computer.

[0068] Specifically, the second control command is obtained based on the trajectory information issued by the host computer. The chip system has an integrated circuit that generates the second control command based on the path planning information of the host computer. The input terminal of the integrated circuit is connected to the output terminal of the host computer to obtain the path planning information and obtain the second control command based on the path planning information. Then, the second control command is sent to at least two actuator motors through the chip output terminal.

[0069] In practical applications, the chip system can also obtain the second control command based on the trajectory information by combining the communication interface module, the path planning and parsing module, and the control command generation module.

[0070] Specifically, the communication interface module is used to receive path planning information and convert it into raw data that the chip system can process. More specifically, the path planning information output by the host computer is usually in the form of digital signals, and its level standard may be incompatible with the chip system. Therefore, the communication interface module can be a level conversion circuit. The input of the level conversion circuit is connected to the output of the host computer, receives the path planning information sent by the host computer, and converts the path planning information into a level that the chip system can recognize, ensuring accurate information transmission.

[0071] As another design, the path planning information output by the host computer may also adopt a specific encoding format. Therefore, the communication interface module can also be an encoding and decoding circuit. The input of the encoding and decoding circuit is connected to the output of the host computer, receives the path planning information sent by the host computer, decodes the path planning information, and converts it into raw data that the chip system can process.

[0072] Furthermore, the input of the path planning and parsing module is connected to the output of the communication interface module. This allows it to receive raw data and extract key path parameters, such as path point coordinates, speed information, and turning speed. Specifically, the path planning and parsing module can utilize a dedicated digital signal processor or programmable logic device to implement these functions.

[0073] Furthermore, the input of the control instruction generation module is connected to the output of the path planning and parsing module. This allows it to receive key path parameters and, combined with the motion characteristics of the actuators, obtain the second control instruction required for each actuator. The second control instruction is then sent to the corresponding actuator through the chip's output. Specifically, the control instruction generation module can utilize a dedicated digital signal processor or programmable logic device to implement these functions.

[0074] With the above settings, the chip system can receive path planning information from the host computer and obtain a second control command based on the path planning information to the corresponding actuators, so that each actuator can work together and run precisely according to the preset path, thereby ensuring that the entire device completes the task accurately and reducing path deviation and error.

[0075] Figure 3 A schematic diagram of the structure of a chip system provided in this application embodiment. Figure 2 This embodiment further describes the chip system based on the foregoing embodiments. Specifically, this embodiment provides a detailed description of the chip system's configuration.

[0076] like Figure 3 As shown, in this embodiment, the chip system includes a first microprocessor and a programmable logic device, which are interconnected at high speed; wherein, the first microprocessor includes a trajectory planning module, the internal input terminal of the trajectory planning module is connected to the internal output terminal of the programmable logic device, and the internal output terminal of the trajectory planning module is connected to the internal input terminal of the programmable logic device.

[0077] Based on this, the programmable logic device is used to receive at least two first feedback signals output by at least two actuator motors through the chip input terminal, and send the at least two first feedback signals to the trajectory planning module; the trajectory planning module is used to send the at least two first control commands to the programmable logic device when it obtains at least two first control commands based on the at least two first feedback signals, so that the programmable logic device sends the corresponding first control commands to the at least two actuator motors through the chip output terminal.

[0078] In this embodiment, the chip system includes at least two chip output terminals for outputting first control commands to at least two motors, and at least two chip input terminals for receiving at least two first feedback signals.

[0079] Furthermore, in this embodiment, the first microprocessor is an ARM processor, and the programmable logic device is an FPGA. The ARM processor integrates a trajectory planning module, which is used to receive at least two first feedback signals received by the FPGA through the chip input terminal, and obtain the first control command for each actuator motor according to the at least two first feedback signals. Then, the first control command is sent to the internal input terminal of the FPGA through the internal output terminal, so that the FPGA sends at least two first control commands to at least two actuator motors.

[0080] Specifically, the chip input terminal is the external input terminal of the FPGA, and the chip output terminal is the external output terminal of the FPGA.

[0081] Specifically, the trajectory planning module uses internally integrated summation circuits, proportional-integral-differential circuits, etc., to obtain at least two first control commands based on at least two first feedback signals. For details, please refer to the aforementioned embodiments, which will not be repeated here.

[0082] It is understood that in this embodiment, the ARM processor is mainly responsible for obtaining the first control instruction, and the FPGA is mainly responsible for receiving the first feedback signal and outputting the first control instruction, and enabling high-speed interconnection between the ARM processor and the FPGA.

[0083] With the above setup, the FPGA can receive the first feedback signal in parallel, ensuring processing efficiency, while the ARM processor can handle complex logic and control tasks. The two work together to fully leverage the advantages of different types of processing modules, achieving higher performance, better flexibility, and lower cost and power consumption. Furthermore, the trajectory planning module and the FPGA can achieve high-speed interconnection communication at the microsecond level, further guaranteeing the real-time performance, efficiency, and stability of information transmission.

[0084] Furthermore, in this embodiment, high-speed interconnect is implemented via AXI interconnect. After receiving at least two first control instructions, the trajectory planning module transmits them to its internal output via the ARM processor's internal bus, and then sends them to the FPGA via the high-speed interconnect interface.

[0085] Understandably, the AXI protocol supports parallel transmission of multiple data channels, providing high data transmission bandwidth. Therefore, this embodiment achieves high-speed interconnection through AXI interconnection, enabling rapid interaction of large amounts of data, improving overall operating efficiency, and achieving low latency, thus enhancing system real-time performance and response speed, and making motor actions more precise and rapid. Furthermore, AXI interconnection supports a multi-master, multi-slave architecture, offering high configurability and allowing for flexible parameter adjustments to suit different application scenarios.

[0086] like Figure 3 As shown, in this embodiment, at least two actuators are equipped with encoders. Correspondingly, the programmable logic device includes an encoder feedback module, the internal output of which is connected to the internal input of the trajectory planning module. Specifically, the programmable logic device receives a first feedback signal through the encoder feedback module.

[0087] Specifically, the encoder feedback module is used to receive at least two first feedback signals from at least two actuator motors through the chip input terminal, and transmit the at least two first feedback signals to the trajectory planning module.

[0088] In this embodiment, the encoder feedback module includes a signal receiving unit, a signal processing unit, and a signal transmission unit. The signal receiving unit has at least two input terminals, which are directly connected to the motor output terminals of at least two actuator motors, serving as at least two chip input terminals for receiving the first feedback signal output by the encoders of the at least two actuator motors. The signal receiving unit also includes an internal output terminal connected to the internal input terminal of the signal processing unit to transmit the first feedback signal to the signal processing unit. The signal processing unit performs filtering, amplification, and decoding on the received first feedback signal to remove noise interference and convert the first feedback signal output by the actuator motors into a format that the chip system can recognize and process. The internal output terminal of the signal processing unit is connected to the internal input terminal of the signal transmission unit, and the internal output terminal of the signal transmission unit is connected to the internal input terminal of the trajectory planning module, for transmitting the processed first feedback signal to the trajectory planning module.

[0089] By setting up an encoder feedback module, the chip system can simultaneously receive and process the first feedback signals from at least two actuators to obtain a first feedback signal that the chip system can recognize and process.

[0090] like Figure 3As shown, in this embodiment, the chip system further includes a second microprocessor, which is interconnected with a programmable logic device at high speed; wherein, the second microprocessor includes a first closed-loop control module, the internal input terminal of the first closed-loop control module is connected to the internal output terminal of the encoder feedback module, and the internal output terminal of the first closed-loop control module is connected to the internal input terminal of the programmable logic device.

[0091] Similarly, in this embodiment, the second microprocessor is also an ARM processor, the programmable logic device is also an FPGA, and the high-speed interconnect between the second microprocessor and the programmable logic device is also achieved through AXI.

[0092] Based on this, the encoder feedback module is also used to receive at least two second feedback signals from at least two actuator motors through the chip input terminal, and transmit the second feedback signals to the first closed-loop control module.

[0093] The first closed-loop control module is used to obtain at least two third control instructions when receiving at least two second feedback signals, and to send the at least two third control instructions to the programmable logic device; any third control instruction of the actuator is determined based on the second feedback signal of the actuator.

[0094] Programmable logic devices are also used to send at least two third control commands to at least two actuator motors via chip outputs.

[0095] Specifically, in this embodiment, the second feedback signal is either a position feedback signal or a speed feedback signal. The first closed-loop control module implements position closed-loop control of any actuator motor based on the position feedback signal, and implements position closed-loop control of any actuator motor based on the speed feedback signal.

[0096] Based on this, in this embodiment, the chip system includes an operational amplifier. The internal input terminals of the operational amplifier are connected to the first closed-loop control module and the path planning module, respectively, to receive a first control command and / or a third control command. Upon receiving the first control command and / or the third control command, the two control commands are linearly superimposed to obtain the final control command. It should be understood that at this time, the internal output terminal of the operational amplifier is connected to the internal input terminal of the programmable logic device, so that the programmable logic device sends the final control command to at least two actuator motors.

[0097] As an alternative design, during the operation of the chip system, the first closed-loop control module is configured to obtain a third control command based on the current second feedback signal at a first preset time interval, and then send the command to the corresponding actuator motor via the FPGA. The path planning module is configured to obtain a first control command based on the current first feedback signal at a second preset time interval, and then send the command to the corresponding actuator motor via the FPGA. The first preset time interval is shorter than the second preset time interval.

[0098] Specifically, the above configuration is achieved by adding two timers to the chip system. The first timer sends a high-level signal to the first closed-loop control module at a first preset time interval, triggering the closed-loop control function of the first closed-loop module. The second timer sends a high-level signal to the path planning module at a second preset time interval, enabling the path planning module to receive the first control command.

[0099] The first timer is further configured to stop sending a high level to the first closed-loop control module when it reaches a second preset duration. At this time, the closed-loop control function of the first closed-loop control module is not triggered. The path planning module is only executed by the second timer, thereby avoiding the simultaneous receipt of the first control command and the third control command, which would prevent the motor from responding to the control command accurately.

[0100] With the above settings, when controlling at least two actuators of the device through the chip system, in addition to achieving closed-loop control of at least two actuators based on the first feedback signal, for each actuator, position closed-loop control and speed closed-loop control can be achieved based on its corresponding second feedback signal. This simultaneously achieves global and self-closed-loop control, which helps to further ensure the operational stability and accuracy of at least two actuators, and thus helps to further ensure the product processing quality of the equipment.

[0101] like Figure 3 As shown, in this embodiment, the programmable logic device further includes a second closed-loop control module and a current sampling module; the internal output terminal of the current sampling module is connected to the internal input terminal of the second closed-loop control module.

[0102] Based on this, the current sampling module is used to receive at least two current feedback signals from at least two actuator motors through the chip input terminal, and transmit the at least two current feedback signals to the second closed-loop control module.

[0103] When the second closed-loop control module obtains at least two fourth control commands based on at least two current feedback signals, it sends the at least two fourth control commands to at least two actuators through the chip output terminal; the fourth control command for any actuator is determined based on the current feedback signal of the actuator.

[0104] Specifically, in this embodiment, the internal output of the second closed-loop control module is also connected to the internal input of the operational amplifier. The operational amplifier combines the first control instruction and / or the third control instruction and / or the fourth control instruction to obtain the final control instruction. Finally, the operational amplifier sends the final control instruction to the corresponding actuator motor through the chip output.

[0105] Through the above configuration, the chip system can further achieve current closed-loop control for each actuator motor, building upon the global closed-loop control. Furthermore, since the second closed-loop control module and the current sampling module are located on the FPGA, the FPGA's high-efficiency parallel processing capability effectively ensures the response speed of the current closed-loop control.

[0106] like Figure 3 As shown, in this embodiment, the programmable logic device further includes an instruction driving module, the internal input of which is connected to the internal output of the first closed-loop control module, the second closed-loop control module, and the trajectory planning module.

[0107] Based on this, the instruction driving module is used to convert the control instruction into a drive signal when a control instruction is received; the control instruction is any one of the first control instruction, the second control instruction, the third control instruction, and the fourth control instruction.

[0108] The instruction drive module is also used to send drive signals to at least two actuator motors through the chip output.

[0109] It is understandable that the internal output terminal of the module used to output the first, second, third, or fourth control command is connected to the internal input terminal of the instruction driving module, such as the path planning module, the first closed-loop control module, the second closed-loop control module, or the operational amplifier.

[0110] In this embodiment, the instruction driving module is specifically an SVPWM generation module, which is used to convert control instructions into drive signals that conform to the SVPWM algorithm. These drive signals can be used to operate at least two actuator motors to achieve precise position control, speed control, and current control.

[0111] As can be seen from the above, the chip system integrates control planning and driving functions. The interaction between the two uses the internal bus of the chip system to achieve high-speed interconnection and communication, which avoids the bus delay that exists in the known technology of sending motion control trajectory command information to the driver through the control bus and the data transmission process according to different hardware configurations, thus ensuring the real-time performance, efficiency and stability of information transmission.

[0112] Furthermore, compared to the known technologies that use separate components to complete the control system integration, this application integrates the motion control planning function (path planning module, first closed-loop control module, second closed-loop control module) with the drive function (command drive module), effectively reducing the space required for electrical component layout and labor costs during assembly.

[0113] like Figure 3 As shown, in this embodiment, the first microprocessor further includes a feedforward control module. The internal input terminal of the feedforward control module is connected to the internal output terminal of the encoder feedback module, and the internal output terminal of the feedforward control module is connected to the internal input terminal of the programmable logic device.

[0114] Based on this, the feedforward control module is used to obtain at least two fifth control instructions when it receives at least two first feedback signals, and send the at least two fifth control instructions to the programmable logic device;

[0115] Programmable logic devices are used to send at least two fifth control commands to at least two actuator motors via chip outputs.

[0116] Specifically, in this embodiment, the internal output of the feedforward control module is connected to the internal input of the operational amplifier, and at least two fifth control commands are sent to at least two actuator motors through the internal output of the operational amplifier.

[0117] More specifically, the fifth control command is obtained by the feedforward control module based on the system's mechanical model and the known first feedback signal, which predicts the amount of disturbance or change. It is then superimposed with the preceding first control command, and / or the second control command, and / or the third control command, and / or the fourth control command, and input into the command drive module, which converts it into a drive signal that at least two actuators can understand.

[0118] The above settings enable the system to make corresponding adjustments before disturbances or changes occur, thereby reducing system errors and improving system response speed and control accuracy.

[0119] like Figure 3 As shown, in this embodiment, the first microprocessor further includes a human-computer interaction module, which includes multiple external output terminals for connecting multiple human-computer interaction devices.

[0120] Specifically, the multiple external outputs of the human-computer interaction module can be connected to displays, voice alarms, and other human-computer interaction modules; this embodiment does not limit this. This configuration enhances the flexibility of the chip system.

[0121] As an example, Figure 4 This application provides a structural example diagram of a chip system, as shown in the embodiment of the present application. Figure 4 As shown, the chip system includes two ARM processors and one FPGA. One ARM processor includes a first closed-loop control module and a feedforward control module, while the other ARM processor includes a human-machine interaction module and a trajectory planning module. The two ARM processors share memory and are interconnected with the FPGA at high speed, specifically through AXI interconnect. The FPGA includes an SVPWM generation module, a current sampling module, a second closed-loop control module, and an encoder feedback module.

[0122] Furthermore, in this example, the SVPWM generation module integrates an operational amplifier, which includes four internal input terminals that are respectively connected to the internal output terminals of the trajectory planning module, the first closed-loop control module, and the second closed-loop control module. These input terminals are used to receive the first control command, the second control command, the third control command, the fourth control command, and the fifth control command, and to obtain the total control command by linearly superimposing these control commands.

[0123] The SVPWM generation module further processes the overall control command, converts it into an overall drive signal, and then sends it to the corresponding actuator motors through its external output terminal, i.e., the chip output terminal.

[0124] Understandably, the external input terminal of the encoder feedback module serves as the chip input terminal, receiving feedback signals from at least two actuator motors. The internal output terminal of the encoder feedback module connects to the internal input terminals of the trajectory planning module, the first closed-loop control module, and the feedforward control module, for transmitting the corresponding feedback signals.

[0125] In addition, for the second closed-loop control module, its internal input terminal is connected to the internal output terminal of the current sampling module, and the external input terminal of the current sampling module is also used as a chip input terminal to receive the current feedback signals of at least two actuator motors and transmit them to the second closed-loop control module so as to realize current closed-loop control.

[0126] The chip system in this example enables rapid information exchange between multiple axes with an efficient processing cycle. It also achieves position loop adjustment, speed loop adjustment, current loop adjustment, and global external closed-loop control, perfecting the closed-loop adjustment of multi-axis components from the command end to the execution end, thereby realizing high-precision multi-axis synchronous and cooperative control.

[0127] In addition, because the chip system also integrates a feedforward control module, the chip system can make corresponding adjustments before interference or changes occur, thereby reducing system errors and improving system response speed and control accuracy.

[0128] In this example, the chip system is equipped with servo axes axis1...axis3. When the system requires the axis group to realize cam motion, the chip system can collect data from each axis in real time and perform overall collaborative planning. In the next cycle, the latest target position, target speed, and target torque are sent to the drive system through the on-chip bus AXI-Lite. In conjunction with the internal position loop, speed loop, and torque loop, the target data is executed. Through comprehensive global external closed-loop control, the acquisition, planning, sending, and execution are repeatedly executed until the motion task ends. Ultimately, the theoretical cam curve and the actual feedback cam curve have an infinitely close relationship in position and speed in the same cycle, which is suitable for high-cycle and high-precision applications.

[0129] This application also provides a master control device. Figure 5 This is a schematic diagram of the structure of a main control device provided in an embodiment of this application, as shown below. Figure 5 As shown, the main control device is applied to equipment including at least two actuators, and the mechanical structures corresponding to the at least two actuators cooperate with each other to realize at least two continuous processing processes;

[0130] Specifically, the main control device includes the chip system in any of the aforementioned embodiments, and a driver; the input terminal of the driver is connected to the chip output terminal of the chip system, used to acquire a first control command, convert the first control command into a high-voltage signal upon receiving the first control command, and send the high-voltage signal to at least two actuator motors. More specifically, the high-voltage signal is a drive signal with sufficient power.

[0131] In this embodiment, the driver is used to convert the first control command output by the chip system into a high-voltage signal suitable for at least two motors. It is understood that the driver can also specifically convert the second, third, fourth, and fifth control commands into corresponding high-voltage signals.

[0132] As one possible implementation, when the chip system includes an SVPWM generation module, the driver is a power board. Specifically, the driver is used to receive the first, second, third, fourth, or fifth drive signals generated by the SVPWM generation module and convert them into corresponding high-voltage signals.

[0133] In this embodiment, the main control device generates precise first control commands based on the feedback signals from each actuator motor according to the chip system. Then, it converts these commands into high-voltage signals through a driver to drive each actuator motor. This enables each actuator motor to work together more precisely according to a predetermined sequence and parameters, ensuring the smooth progress of the continuous processing.

[0134] In this embodiment, when the device is applied to a device including multiple actuators, at least one chip system is provided. This arrangement allows for the use of different numbers of chip systems to meet the specific requirements of the application scenario.

[0135] This application also provides a processing device. Figure 6 This is a schematic diagram of a processing device provided in an embodiment of this application. Figure 6 As shown, the processing equipment includes at least two actuators, and also includes the chip system in any of the foregoing embodiments, or the main control device in any of the foregoing embodiments.

[0136] In the processing equipment provided in this embodiment, due to the adoption of the above-mentioned chip system or main control device, when the processing equipment controls at least two actuators, it can control each actuator according to the first feedback signal of at least two actuators, thereby realizing full closed-loop control of at least two actuators, which is beneficial to improving the synchronization and real-time performance between multiple axes.

[0137] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as these combinations of technical features do not contradict each other, they should be considered within the scope of this specification.

[0138] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0139] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A chip system, characterized in that, The chip system is applied to a device including at least two actuators, the mechanical structures corresponding to the at least two actuators cooperating with each other to realize at least two consecutive processing processes; the chip system includes a chip output terminal and a chip input terminal, the chip output terminal of the chip system is connected to the motor input terminal of the at least two actuators, and the chip input terminal of the chip system is connected to the motor output terminal of the at least two actuators; The chip system is used to receive at least two first feedback signals output by the at least two actuators through the chip input terminal, and when the at least two first feedback signals are received, to send corresponding first control commands to the at least two actuators through the chip output terminal respectively; the first control command of any actuator is determined based on the at least two first feedback signals.

2. The chip system according to claim 1, characterized in that, The chip system includes a first microprocessor and a programmable logic device, which are interconnected at high speed. The first microprocessor includes a trajectory planning module, the internal input of which is connected to the internal output of the programmable logic device, and the internal output of which is connected to the internal input of the programmable logic device. The programmable logic device is used to receive at least two first feedback signals output by the at least two actuators through the chip input terminal, and send the at least two first feedback signals to the trajectory planning module; The trajectory planning module is used to send the at least two first control instructions to the programmable logic device when the at least two first feedback signals are obtained, so that the programmable logic device sends the corresponding first control instructions to the at least two actuators through the chip output terminal.

3. The chip system according to claim 2, characterized in that, The programmable logic device includes an encoder feedback module, the internal output of which is connected to the internal input of the trajectory planning module; the encoder feedback module is used to receive at least two first feedback signals output by the at least two actuators through the chip input and transmit the at least two first feedback signals to the trajectory planning module.

4. The chip system according to any one of claims 1-3, characterized in that, The first feedback signal includes at least one of a current feedback signal, a position feedback signal, and a velocity feedback signal.

5. The chip system according to any one of claims 1-3, characterized in that, The chip system is also used to send a second control command to the at least two actuators through the chip output terminal; the second control command is determined based on the path planning information of the host computer.

6. The chip system according to claim 2 or 3, characterized in that, The chip system further includes a second microprocessor, which is interconnected with a programmable logic device at high speed; wherein, the second microprocessor includes a first closed-loop control module, and the internal input of the first closed-loop control module is connected to the internal output of the encoder feedback module; The encoder feedback module is also used to receive at least two second feedback signals output by the at least two actuator motors through the chip input terminal, and transmit the second feedback signals to the first closed-loop control module.

7. The chip system according to claim 6, characterized in that, The internal output terminal of the first closed-loop control module is connected to the internal input terminal of the programmable logic device. The first closed-loop control module is used to obtain at least two third control instructions when it receives the at least two second feedback signals, and send the at least two third control instructions to the programmable logic device; any third control instruction of the actuator is determined based on the second feedback signal of the actuator. The programmable logic device is also used to send the at least two third control commands to the at least two actuator motors respectively through the chip output terminal.

8. The chip system according to claim 6, characterized in that, The second feedback signal is a position feedback signal or a velocity feedback signal.

9. The chip system according to claim 6, characterized in that, The programmable logic device further includes a second closed-loop control module and a current sampling module; The internal output terminal of the current sampling module is connected to the internal input terminal of the second closed-loop control module. The current sampling module is used to receive at least two current feedback signals output by at least two actuators through the chip input terminal and transmit the at least two current feedback signals to the second closed-loop control module. When the second closed-loop control module obtains at least two fourth control commands based on the at least two current feedback signals, it sends the at least two fourth control commands to the at least two actuators through the chip output terminal; the fourth control command for any actuator is determined based on the current feedback signal of the actuator.

10. The chip system according to claim 9, characterized in that, The programmable logic device further includes an instruction driving module, the internal input of which is connected to the internal output of the first closed-loop control module, the second closed-loop control module, and the trajectory planning module. The instruction driving module is used to convert the control instruction into a drive signal when a control instruction is received; the control instruction is any one of a first control instruction, a second control instruction, a third control instruction, and a fourth control instruction; The instruction driving module is also used to send the driving signal to the at least two actuator motors through the chip output terminal.

11. The chip system according to claim 3, characterized in that, The first microprocessor further includes a feedforward control module, the internal input of which is connected to the internal output of the encoder feedback module, and the internal output of which is connected to the internal input of the programmable logic device. The feedforward control module is used to obtain at least two fifth control commands when it receives the at least two first feedback signals, and send the at least two fifth control commands to the programmable logic device; The programmable logic device is used to send the at least two fifth control commands to the at least two actuator motors respectively through the chip output terminal.

12. The chip system according to any one of claims 2-3, characterized in that, The first microprocessor also includes a human-computer interaction module, which includes multiple external output terminals for connecting multiple human-computer interaction devices.

13. The chip system according to claim 6, characterized in that, The high-speed interconnect is achieved through AXI interconnect.

14. A master control device, characterized in that, The device is applied to equipment including at least two actuators, wherein the mechanical structures corresponding to the at least two actuators cooperate with each other to realize at least two consecutive processing processes; The device includes a chip system as described in any one of claims 1-13, and a driver; the input terminal of the driver is connected to the chip output terminal of the chip system, for acquiring a first control command, converting the first control command into a high-voltage signal upon receiving the first control command, and sending the high-voltage signal to the at least two actuator motors.

15. The apparatus according to claim 14, characterized in that, The driver is a power board.

16. The apparatus according to claim 14 or 15, characterized in that, When the device is applied to a device that includes multiple actuators, the chip system is provided with at least one.

17. A processing equipment, characterized in that, The processing equipment includes at least two actuators, and further includes the chip system according to any one of claims 1-13, or the main control device according to any one of claims 14-16.

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