Watchdog circuit device and electronic equipment
By using a level control circuit built with discrete components, and by disabling the hardware watchdog function with manual and contactless switches, the system reset problem caused by software failure during the program burning process of the watchdog circuit is solved, achieving a highly reliable and simple circuit design.
Patent Information
- Application Number
- CN202423282626.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2026-02-10
- Estimated Expiration
- 2034-12-30
AI Technical Summary
Existing watchdog circuits suffer from software failures during the programming process, causing the system to repeatedly reset and restart. Furthermore, the software control has low reliability, increasing code complexity and maintenance difficulty.
The level control circuit is built using discrete components. The hardware watchdog function is disabled by manual and contactless switches to avoid conflicts with the program burning process. The level is reversed by MOSFETs and control chips to clear the counter and ensure normal system operation.
The watchdog circuit does not rely on software instructions during the program burning process, which improves the reliability and simplicity of the watchdog circuit, reduces engineering maintenance costs, and simplifies circuit design.
Smart Images
Figure CN223897870U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of system reset technology, and in particular to a watchdog circuit device and electronic equipment. Background Technology
[0002] A watchdog timer (WDT) is a timer circuit used to monitor the execution of embedded software programs in a system, preventing the system from crashing due to software failures and entering an infinite loop. A watchdog chip (U1) typically has one input (WDI) to receive the feed signal sent periodically by the system, and one output (WDO) to output a low-level signal. The manual reset input (MR) triggers the reset (RST) pin to send a reset signal, causing the system to reset and restart.
[0003] When programming, debugging, or upgrading the program online, the system fails to send a watchdog signal at regular intervals. The input of the watchdog chip remains at a single level, causing the counter to overflow and send a reset signal. This results in the system constantly resetting and restarting, making it impossible to program normally.
[0004] In some common technical solutions, the watchdog timer function is temporarily disabled via software instructions during the program burning process to ensure that the watchdog timer does not interfere with the program burning. However, this is highly dependent on the software logic. If vulnerabilities or errors exist in the software, the watchdog timer may be accidentally disabled, preventing a system reset from being triggered when a failure occurs. Furthermore, disabling the watchdog timer via software instructions increases code requirements, enhances software complexity, and necessitates code maintenance and updates during later product maintenance, resulting in a significant workload in the long run.
[0005] Therefore, it is necessary to provide a watchdog circuit device to solve at least one of the above problems. Summary of the Invention
[0006] This utility model embodiment provides a watchdog circuit device, which uses discrete components to build a level control circuit to solve the problems of conflict between the watchdog device and the program burning process and the low reliability of software-controlled watchdog devices.
[0007] This utility model embodiment provides a watchdog circuit device, including a control module, a switch module, and a reset module, wherein: the control module includes a control chip, the output terminal of the control chip is connected to the reset input terminal of the control chip, the input terminal of the control chip is connected to the input terminal of a processor and simultaneously connected to a first power supply; the reset module is connected to the trigger reset terminal of the control chip; the switch module includes a manual switch and a contactless switch, the contactless switch is electrically connected to the reset input terminal of the control chip, and the manual switch is connected to the contactless switch and a second power supply.
[0008] In some embodiments, the control module further includes a first resistor, through which the output of the control chip is connected to the reset input of the control chip; the switch module further includes a second resistor and a third resistor, through which the contactless switch is grounded via the second resistor and connected to the manual switch via the third resistor.
[0009] In some embodiments, the control module further includes a MOS transistor, and the input terminal of the processor is connected to the input terminal of the control chip through the MOS transistor.
[0010] In some embodiments, the source of the MOS transistor is grounded, and the drain of the MOS transistor is connected to the first power supply.
[0011] In some embodiments, the contactless switch is an NPN transistor, the base of the contactless switch is connected to the manual switch, and the emitter of the contactless switch is electrically connected to the reset input terminal of the control chip.
[0012] In some embodiments, the switching module further includes a fourth resistor, through which the collector of the contactless switch is connected to a third power source.
[0013] In some embodiments, the switching module further includes a first capacitor, through which the first power supply is grounded.
[0014] In some embodiments, the reset module includes a second capacitor and a fifth resistor, and the processor's trigger reset terminal is grounded through the second capacitor and connected to the control chip's trigger reset terminal through the fifth resistor.
[0015] In some embodiments, the first resistor has a resistance of 1 kΩ, the second resistor has a resistance of 10 kΩ, the third resistor has a resistance of 0.1-20 kΩ, the fourth resistor has a resistance of 2 kΩ, and the fifth resistor has a resistance of no more than 10.43 kΩ.
[0016] An electronic device is also provided, which includes any of the watchdog circuit devices described above.
[0017] Compared with the watchdog circuit devices in related circuit designs, the watchdog circuit device provided by this utility model uses discrete components to build a level control circuit, which can disable the hardware watchdog function in the program burning state, without relying on software instructions or IO control, and has high reliability; the discrete components used are low cost, the circuit design is simple, and the construction is convenient. Attached Figure Description
[0018] Figure 1 A schematic circuit block diagram of a watchdog circuit device provided for an embodiment of this utility model.
[0019] Figure 2 for Figure 1 The circuit diagram of the watchdog circuit device shown is provided, wherein the manual switch in the circuit diagram is in the closed state.
[0020] Figure 3 for Figure 1 The circuit diagram of the watchdog circuit shown is shown, in which the manual switch is in the open state. Detailed Implementation
[0021] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only one embodiment of the present utility model, and not all embodiments.
[0022] Furthermore, if the embodiments of this utility model involve descriptions such as "first" or "second," such descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.
[0023] Please see Figure 1 , Figure 1 This is a schematic diagram of a watchdog circuit device provided in an embodiment of the present invention. The watchdog circuit device 100 includes a control module 110, a switch module 130, and a reset module 150, wherein the switch module 130 and the reset module 150 are respectively connected to the control module 110. When the system is not in the program burning state, the system processor will periodically send a watchdog signal. The control module 110 and the reset module 150 cooperate to implement the watchdog function, and when the system malfunctions, it will reset and restart the system in a timely manner to prevent the system from falling into an infinite loop due to software failure and crashing. When the system is in the program burning state, the switch module is provided with a manual switch. When the manual switch is closed, the switch module 130 will change the level state in the control module 110 to temporarily disable the watchdog function and ensure that the system can perform program burning normally.
[0024] Please see Figure 2 , Figure 2 for Figure 1The circuit diagram of the watchdog circuit shown is provided, in which the manual switch is in the closed state. The control module 110 includes a control chip U1, a MOSFET Q1, and a first resistor R1. The output terminal WDO of the control chip U1 is connected to the reset input terminal MR of the control chip U1 through the first resistor R1; the input terminal WDI of the control chip U1 is connected to the input terminal WDI of the processor through the MOSFET Q1; the drain of the MOSFET Q1 is connected to the input terminal WDI of the control chip U1, and the source of the MOSFET Q1 is grounded through any resistor. The input terminal WDI of the control chip U1 and the drain of the MOSFET Q1 are simultaneously connected to the first power supply VCC1 through another arbitrary resistor.
[0025] The switch module 130 includes a manual switch J1, a contactless switch Q2, a second resistor R2, a third resistor R3, a fourth resistor R4, and a first capacitor C1. The contactless switch Q2 includes a control terminal and two conducting terminals, one of which is electrically connected to the reset input terminal MR of the control chip. The control terminal is grounded through the second resistor R2 and simultaneously connected to the manual switch J1 through the third resistor R3. The second power supply VCC1 is grounded through the first capacitor C1.
[0026] In this embodiment, the contactless switch Q2 is an NPN transistor, wherein: the reset input terminal MR of the control chip U1 is connected to the emitter of the contactless switch Q2; the base of the contactless switch Q2 is grounded through the second resistor R2 and connected to the manual switch J1 through the third resistor R3; the base of the contactless switch Q2 is connected to the second power supply VCC2 through the manual switch J1; and the collector of the contactless switch Q2 is connected to the third power supply VCC3 through the fourth resistor R4.
[0027] The manual switch J1 includes a conductive part and switch pins S1 at both ends. The switch pins S1 are respectively connected to the second power supply VCC2 and the control terminal of the contactless switch. When the manual switch J1 is closed, the switch pins S1 are connected by the conductive part, and the switch module 130 is a fully connected and working circuit.
[0028] It should be noted that in this embodiment, the manual switch J1 can be a jumper cap. In other embodiments, it can also be a push-button switch, a single-pole toggle switch, or a rotary switch, etc., which can achieve the connection of the contactless switch Q2 with the second power supply VCC2 through simple operation.
[0029] The reset module 150 includes a second capacitor C2 and a fifth resistor R5. The processor's trigger reset terminal RESET is grounded through the second capacitor C2 and connected to the trigger reset terminal RESET of the control chip U1 through the fifth resistor R5. The fifth resistor R5 is a current-limiting resistor for current limiting during the reset output process. To ensure reliable system reset, the resistance value of the fifth resistor R5 is calculated to not exceed 10.43 kΩ based on the parameters of the control chip and the processor. In this embodiment, for example, the control chip is model MAX706SCSA, the processor is model GD32F303VCT6, and the resistance value of the fifth resistor R5 is selected as 4.7 kΩ.
[0030] The first capacitor C1 of the switching module 130 and the second capacitor C2 of the reset module 150 both serve as filters, smoothing voltage fluctuations on the wires, ensuring stable operating voltage of the watchdog circuit, preventing the watchdog circuit from being falsely triggered and reset due to power fluctuations, and improving the reliability of the watchdog circuit.
[0031] Please see Figure 3 , Figure 3 for Figure 1 The circuit diagram of the watchdog circuit device shown is provided, in which the manual switch is in the open state. When the system is not in the program-burning state and is running normally, the processor's input terminal WDI will periodically provide a PWM wave to the control chip U1's input terminal WDI as a watchdog signal. Utilizing the characteristics of the MOSFET Q1, the control chip U1's input terminal WDI will switch between high and low levels, achieving level inversion within a certain period of time. The level inversion of the control chip U1's input terminal WDI will cause the counter built into the control chip U1 to be reset to zero. The watchdog circuit device 100 realizes the watchdog monitoring function.
[0032] When the system is not in the program-burning state and a software fault occurs, the processor cannot periodically provide a watchdog signal to the input terminal WDI of the control chip U1. The input terminal WDI of the control chip U1 remains at a single level for a timeout, causing the built-in counter of the control chip U1 to overflow. When the counter of the control chip U1 overflows, the output terminal WDO of the control chip U1 will output a low level. Since the output terminal WDO of the control chip U1 is connected to the reset input terminal MR of the control chip U1 through the first resistor R1, the reset input terminal MR of the control chip U1 will also be input a low level. By consulting the parameters of the control chip U1, it can be seen that when the voltage at the reset input terminal MR of the control chip is less than a certain value, such as 0.8V, the trigger reset terminal MR of the control chip U1 will output a reset signal to the trigger reset terminal RESET of the processor, realizing a system restart reset. The watchdog circuit device 100 implements the watchdog reset function.
[0033] It should be noted that this embodiment uses the characteristics of the MOS transistor Q1 to achieve level inversion to ensure that the counter is cleared. In other embodiments, other components can be used to connect logic gate circuits, parallel diode circuits, or dedicated level conversion chips can be used to achieve the same result.
[0034] Please combine Figure 2 The working principle of the watchdog circuit device to avoid conflict with the system's program burning state is as follows:
[0035] When the system is about to enter the program burning and debugging state, the manual switch J1 is closed to turn on the contactless switch Q2. Since the reset input terminal MR of the control chip U1 is connected to the emitter of the contactless switch Q2, the contactless switch Q2 is turned on. The calculated voltage at the reset input terminal MR of the control chip U1 is 2.5V, which is much higher than the 0.8V parameter setting of the control chip U1, thus temporarily disabling the watchdog function. Even if the system is in the process of program burning and cannot periodically send a watchdog signal, the reset input terminal MR of the control chip U1 will not be in a low-level state, and the trigger reset terminal RESET of the control chip U1 will not output a reset signal to reset and restart the system. Therefore, the watchdog circuit device and the program burning process can avoid conflict.
[0036] In this embodiment, for example, the resistance of the first resistor R1 is 1 kΩ, the resistance of the second resistor R2 is 10 kΩ, the resistance of the third resistor R3 is 0.1-20 kΩ, and the resistance of the fourth resistor R4 is 2 kΩ. The first power supply VCC1, the second power supply VCC2, and the third power supply VCC3 are all 5 V power supply voltages. Based on the voltage divider circuit formed by the second resistor R2 and the third resistor R3, the driving current of the contactless switch Q2 is 0.417 mA, and the driving voltage is 4.17 V, which is greater than the standard saturation operating voltage of the contactless switch Q2 (0.75 V). Therefore, when the manual switch J1 is closed, the contactless switch Q2 is in the conducting state; when the manual switch J1 is not closed, the base of the contactless switch Q2 is disconnected from the second power supply VCC2, and the contactless switch Q2 is in the cut-off state.
[0037] This utility model embodiment also provides an electronic device, which includes the watchdog circuit device as described in any of the above embodiments.
[0038] In summary, compared with the watchdog circuit devices in related circuit designs, the watchdog circuit device provided by this utility model uses discrete components to build a level control circuit. By simply changing the conduction state of the contactless switch, the hardware watchdog function can be disabled in the program-burning state. It does not rely on software instructions or IO control and has high reliability. The discrete components used are low in cost, the circuit design is simple, and the construction is convenient.
[0039] The above-described embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.
Claims
1. A watchdog circuit device, characterized in that, It includes a control module, a switch module, and a reset module, wherein: The control module includes a control chip, the output terminal of which is connected to the reset input terminal of the control chip, and the input terminal of the control chip is connected to the input terminal of the processor and connected to a first power supply. The reset module is connected to the trigger reset terminal of the control chip; The switch module includes a manual switch and a contactless switch. The contactless switch is electrically connected to the reset input terminal of the control chip, and the manual switch is connected to the contactless switch and a second power supply.
2. The watchdog circuit device according to claim 1, characterized in that, The control module further includes a first resistor, and the output terminal of the control chip is connected to the reset input terminal of the control chip through the first resistor; the switch module further includes a second resistor and a third resistor, and the contactless switch is grounded through the second resistor and connected to the manual switch through the third resistor.
3. The watchdog circuit device according to claim 1, characterized in that, The control module also includes a MOSFET, and the input terminal of the processor is connected to the input terminal of the control chip through the MOSFET.
4. The watchdog circuit device according to claim 3, characterized in that, The source of the MOS transistor is grounded, and the drain of the MOS transistor is connected to the first power supply.
5. The watchdog circuit device according to claim 2, characterized in that, The contactless switch is an NPN transistor, and its base is connected to the manual switch; the emitter of the contactless switch is electrically connected to the reset input terminal of the control chip.
6. The watchdog circuit device according to claim 5, characterized in that, The switching module also includes a fourth resistor, through which the collector of the contactless switch is connected to a third power source.
7. The watchdog circuit device according to claim 1, characterized in that, The switching module also includes a first capacitor, through which the first power supply is grounded.
8. The watchdog circuit device according to claim 6, characterized in that, The reset module includes a second capacitor and a fifth resistor. The processor's trigger reset terminal is grounded through the second capacitor and connected to the control chip's trigger reset terminal through the fifth resistor.
9. The watchdog circuit device according to claim 8, characterized in that, The first resistor has a resistance of 1 kΩ, the second resistor has a resistance of 10 kΩ, the third resistor has a resistance of 0.1-20 kΩ, the fourth resistor has a resistance of 1 kΩ, and the fifth resistor has a resistance of no more than 10.43 kΩ.
10. An electronic device, characterized in that, Includes the watchdog circuit device as described in any one of claims 1 to 9.