Driving circuit and testing device

Abstract

The utility model discloses a driving circuit and a testing device, and relates to the technical field of testing. The driving circuit comprises a chip selection signal input end, a first switch, a delay module, a power output end and a power supply module, the control end of the first switch is connected with the gating signal input end, and the input end of the first switch is grounded; the input end of the delay module is connected with the output end of the first switch; the power supply output end is connected with the input end of the time delay module; the output end of the power supply module is connected with the input end of the time delay module and the power supply output end; the time delay module is grounded when the input end and the output end of the first switch are conducted, and the power supply output end sequentially provides voltage for the time delay module and the power supply output end; according to the driving circuit, secondary power-on of the driving circuit is achieved by arranging the time delay module, manual control over power-on and power-off is not needed, false operation of personnel is avoided, and the testing efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of testing technology, and in particular to a driving circuit and a testing device. Background Technology

[0002] Type-C is a USB interface that can be inserted in either direction. It measures approximately 8.3mm x 2.5mm and, like other interfaces, supports USB standard functions such as data transfer, charging, discharging, and display output. Type-C was developed by the USB Implementers Forum (USB standardization organization) and began to gain popularity after receiving support from manufacturers such as Apple, Google, Intel, and Microsoft in 2014. In the latest USB 3.2 specification, USB Type-C is the only officially recommended solution.

[0003] Furthermore, USB Type-C supports reversible insertion. When testing, both sides of the interface need to be tested separately to determine if there is a performance difference in the two directions. Repeated plugging and unplugging results in a huge manpower burden, is very easy to cause human error, and is inefficient. Utility Model Content

[0004] The purpose of this application is to provide a driving circuit and a testing device that, by setting a delay module, avoids human error and improves testing efficiency.

[0005] This application discloses a driving circuit applied to a testing device. The driving circuit includes a chip select signal input terminal, a first switch, a delay module, a power output terminal, and a power supply module. The control terminal of the first switch is connected to the chip select signal input terminal, and the input terminal of the first switch is grounded. The input terminal of the delay module is connected to the output terminal of the first switch. The power output terminal is connected to the input terminal of the delay module. The output terminal of the power supply module is connected to both the input terminal of the delay module and the power output terminal. The delay module is grounded when the input and output terminals of the first switch are connected, and the power output terminal provides voltage to both the delay module and the power output terminal in sequence.

[0006] Optionally, the delay module includes a first capacitor and a first resistor. The input terminal of the first capacitor is connected to the output terminal of the first switch and the output terminal of the power supply module. The output terminal of the first capacitor is connected to the input terminal of the first resistor and the power output terminal. The output terminal of the first resistor is grounded.

[0007] Optionally, a first unidirectional diode is provided between the delay module and the power supply module, and a second unidirectional diode is provided between the power output terminal and the power supply module; wherein the current conduction direction of the first unidirectional diode is from the power supply module to the output terminal of the delay module, and the current conduction direction of the second unidirectional diode is from the power supply module to the power output terminal.

[0008] Optionally, the driving circuit further includes a second capacitor, a second resistor, and a third unidirectional diode. The input terminal of the second capacitor is connected between the chip select signal input terminal and the control terminal of the first switch, and the output terminal of the second capacitor is connected to the power supply module. The third unidirectional diode is disposed between the second capacitor and the power supply module. The input terminal of the second resistor is connected between the output terminal of the second capacitor and the third unidirectional diode, and the output terminal of the second resistor is grounded. The current conduction direction of the third unidirectional diode is from the power supply module to the second capacitor.

[0009] Optionally, the driving circuit further includes a filter capacitor and a filter resistor. The input terminal of the filter resistor is connected to the power supply module, the output terminal of the filter resistor is connected to the input terminal of the filter capacitor, and the output terminal of the filter capacitor is connected between the power output terminal and the power supply module.

[0010] Optionally, the driving circuit further includes a first protection resistor and a second protection resistor. The input terminal of the first protection resistor is connected to the output terminal of the power supply module, the output terminal of the first protection resistor is connected to the input terminal of the delay module, the input terminal of the second protection resistor is connected to the output terminal of the power supply module, and the output terminal of the second protection resistor is connected to the power output terminal.

[0011] Optionally, the driving circuit further includes a voltage regulator resistor, the input terminal of which is connected to the chip select signal input terminal, and the output terminal of which is connected to the control terminal of the first switch.

[0012] Optionally, the resistance of the first resistor is between 90 and 110 kiloohms.

[0013] Optionally, the first switch is an N-type MOSFET.

[0014] This application also discloses a testing device, including a mechanical switch and a driving circuit as described above, wherein the driving circuit is used to drive the mechanical switch to work.

[0015] The driving circuit of this application achieves secondary power-on by setting a delay module, thereby meeting the secondary power-on requirement in the Type-C interface's one-time plug-in two-sided test, satisfying the PSSD test requirements, and eliminating the need for manual control of power on and off, avoiding human error and improving test efficiency. Attached Figure Description

[0016] The accompanying drawings, which form part of the specification, are used to provide a further understanding of the embodiments of this application and illustrate the implementation methods of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any creative effort. In the drawings:

[0017] Figure 1 This is a schematic diagram of the structure of a driving circuit according to the first embodiment of this application;

[0018] Figure 2 This is a schematic diagram of the structure of a driving circuit according to a second embodiment of this application;

[0019] Figure 3 This is a schematic diagram of the structure of a driving circuit according to the third embodiment of this application;

[0020] Figure 4 This is a schematic diagram of the structure of a testing device according to the fourth embodiment of this application.

[0021] Among them, 100 is the drive circuit; 110 is the delay module; 200 is the test device; chip select signal input terminal SEL; first switch Q1; first reserved switch Q2; power output terminal EN; power supply module JP5; first capacitor C1; second capacitor C2; filter capacitor C3; first resistor R1; second resistor R2; filter resistor R3; first protection resistor R4; second protection resistor R5; voltage regulator resistor R6; first unidirectional conducting diode D1; second unidirectional conducting diode D2; third unidirectional conducting diode D3; fourth unidirectional conducting diode D4; first reserved unidirectional conducting diode ZD1; second reserved unidirectional conducting diode ZD2; third reserved unidirectional conducting diode ZD3; fourth reserved unidirectional conducting diode ZD4. Detailed Implementation

[0022] It should be understood that the terminology, specific structural and functional details used herein are merely for describing particular embodiments and are representative. However, this application may be implemented in many alternative forms and should not be construed as being limited to the embodiments set forth herein.

[0023] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating relative importance or implying the number of technical features indicated. Therefore, unless otherwise stated, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "multiple" means two or more. The term "comprising" and any variations thereof mean non-exclusive inclusion, where one or more other features, integers, steps, operations, units, components, and / or combinations thereof may be present or added.

[0024] In addition, terms such as “center,” “horizontal,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer” that indicate orientation or positional relationship are based on the orientation or relative positional relationship shown in the accompanying drawings. They are only for the purpose of simplifying the description of this application and do not indicate that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0025] Furthermore, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium, or internal connections between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0026] The present application will now be described in detail with reference to the accompanying drawings and optional embodiments. It should be noted that, without conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0027] The inventors of this application designed a testing device for testing the Type-C interface of portable solid-state drives (PSSDs). This device includes a USB-A interface, a Type-C male connector, a Type-C female connector, a power supply module, a mechanical switch, and an MCU. During PSSD performance testing, it was discovered that by controlling the transmit and receive pins of the Type-C interface, a single plug-and-play test could be performed to determine the front and back sides. When the transmit pins are TX0+_A and TX0+_A, and the receive pins are RX0+_A and RX0_A, the Type-C interface is on the front side. Conversely, when the transmit pins are TX1+_A and TX1+_A... When the receive pins are RX1+_A and RX1_A, the Type-C interface is reversed. By switching the transmit and receive pins as described above, a single plug-in / plug-out test can be achieved. However, this requires a second power-on: one when the Type-C interface is on the front and another when it is reversed. The inventors of this application found that although this test can reduce the number of PSSD plug-ins / plugs, it still requires manual control of the second power-on. Under this premise, the inventors of this application designed a driving circuit to achieve a second power-on during Type-C interface testing, the details of which are as follows.

[0028] like Figure 1 As shown, as a first embodiment of this application, a driving circuit 100 is disclosed. The driving circuit 100 is applied to a test device. The driving circuit 100 includes a chip select signal input terminal SEL, a first switch Q1, an extension module 110, a power output terminal EN, and a power supply module JP5. The control terminal of the first switch Q1 is connected to the chip select signal input terminal SEL, and the input terminal of the first switch Q1 is grounded. The input terminal of the extension module 110 is connected to the output terminal of the first switch Q1. The power output terminal EN is connected to the input terminal of the extension module 110. The output terminal of the power supply module JP5 is connected to the input terminal of the extension module 110 and the power output terminal EN. The extension module 110 is grounded when the input and output terminals of the first switch Q1 are turned on, and the power output terminal EN provides voltage to the extension module 110 and the power output terminal EN in sequence.

[0029] In this embodiment, the driving circuit 100 operates as follows: First, the microcontroller program controls the chip select signal input terminal SEL to output a high-level signal. This causes the control terminal of the first switch Q1 to receive the high-level signal, connecting the input and output terminals of the first switch Q1. The extension module 110 is grounded, causing the power supply module JP5 to prioritize charging the extension module 110 and stop supplying power to the power output terminal EN. Then, the microcontroller program controls the chip select signal input terminal SEL to output a low-level signal. This causes the control terminal of the first switch Q1 to receive the low-level signal, disconnecting the input and output terminals of the first switch Q1. The extension module 110 is not grounded, and the power supply module JP5 fully charges the extension module. The power supply module JP5 will provide voltage to the power output terminal EN again to achieve a second power-on. In general, the drive circuit 100 in this embodiment, by setting the extension module 110, achieves a second power-on, thereby meeting the requirements of the second power-on in the one-time plug-in two-sided test of the Type-C interface, satisfying the requirements of PSSD testing, and eliminating the need for manual control of power on and off, avoiding human error and improving testing efficiency. It should be noted that the power output terminal EN is connected to the PSSD product to supply power to the PSSD product. The voltage of the power supply module JP5 is between 3 and 6V, preferably 5V in this embodiment. In this embodiment, the first switch Q1 is an N-type MOSFET.

[0030] Specifically, in this embodiment, the extension module 110 includes a first capacitor C1 and a first resistor R1. The input terminal of the first capacitor C1 is connected to the output terminal of the first switch Q1 and the output terminal of the power supply module JP5. The output terminal of the first capacitor C1 is connected to the input terminal of the first resistor R1 and the power output terminal EN. The output terminal of the first resistor R1 is grounded. Thus, when the input terminal and the output terminal of the first switch Q1 are connected, the input terminal of the first capacitor C1 is grounded, causing the first capacitor C1 to discharge through the input terminal of the first switch Q1. At this time, the input terminal of the first capacitor C1 is at 0V. Due to the first resistor R1, the voltage at the output terminal of the first capacitor C1 is greater than the voltage at the input terminal. This causes the power supply module JP5 to prioritize charging the input terminal of the first capacitor C1 while pausing to supply voltage to the power output terminal EN, achieving a temporary power supply interruption until the input terminal and the output terminal of the first switch Q1 are disconnected. This ensures that the voltage at the input and output terminals of the first capacitor C1 remains consistent. At this point, the power supply module JP5 re-supplyes voltage to the power output terminal EN, fulfilling the requirement for secondary power-on. Furthermore, a second unidirectional diode D2D1 is provided between the output terminal of the extension module 110 and the power supply module JP5. Specifically, a second unidirectional diode D2D1 is provided between the input terminal of the first resistor R1 and the output terminal of the first capacitor C1 and the power supply module JP5, and between the power output terminal EN and the power supply module JP5. The current conduction direction of the second unidirectional diode D2D1 is from the power supply module JP5 to the output terminal of the extension module 110, preventing the voltage output from the power supply module JP5 to the output terminal of the first capacitor C1 from flowing back to the power output terminal EN. It should be noted that the resistance value of the first resistor R1 is between 90 and 110 kΩ, and in this embodiment, it is preferably 100 kΩ.

[0031] like Figure 1As shown, the driving circuit 100 further includes a second capacitor C2, a second resistor R2, and a third unidirectional diode D3. The input terminal of the second capacitor C2 is connected between the chip select signal input terminal SEL and the control terminal of the first switch Q1. The output terminal of the second capacitor C2 is connected to the power supply module JP5. The third unidirectional diode D3 is disposed between the second capacitor C2 and the power supply module JP5. The input terminal of the second resistor R2 is connected between the output terminal of the second capacitor C2 and the third unidirectional diode D3. The output terminal of the second resistor R2 is grounded. The current conduction direction of the third unidirectional diode D3 is from the power supply module JP5 to the second capacitor C2. The third unidirectional diode D3 is used to prevent reverse voltage flow to the power output terminal EN. It should be noted that in this embodiment, the resistance value of the second resistor R2 is preferably 100 kΩ.

[0032] Furthermore, the drive circuit 100 also includes a filter capacitor C3 and a filter resistor R3. The input terminal of the filter resistor R3 is connected to the power supply module JP5, the output terminal of the filter resistor R3 is connected to the input terminal of the filter capacitor C3, and the output terminal of the filter capacitor C3 is connected between the power output terminal EN and the power supply module JP5. The filter capacitor C3 and the filter resistor R3 are used for filtering to prevent the power supply module JP5 from outputting an excessively large voltage value, which could damage the PSSD product connected to the power output terminal EN, and to ensure the stability of the voltage output by the power output terminal EN. The drive circuit 100 further includes a first protection resistor R4 and a second protection resistor R5. The input terminal of the first protection resistor R4 is connected to the output terminal of the power supply module JP5, and the output terminal of the first protection resistor R4 is connected to the input terminal of the extension module 110. The input terminal of the second protection resistor R5 is connected to the output terminal of the power supply module JP5, and the output terminal of the second protection resistor R5 is connected to the power output terminal EN. The first protection resistor R4 and the second protection resistor R5 play a protective role in the drive circuit 100, preventing damage to the electronic components in the drive circuit 100 due to excessively high output voltage values ​​from the power supply module JP5. The drive circuit 100 also includes a voltage regulator resistor R6. The input terminal of the voltage regulator resistor R6 is connected to the chip select signal input terminal SEL, and the output terminal of the voltage regulator resistor R6 is connected to the control terminal of the first switch Q1.

[0033] Furthermore, the driving circuit 100 also includes a fourth unidirectional conducting diode D4, which is disposed between the power supply module JP5 and the input terminal of the first capacitor C1. The current conduction direction of the fourth unidirectional conducting diode D4 is from the power supply module JP5 to the input terminal of the first capacitor C1, so as to prevent the voltage of the first capacitor C1 from flowing back to the power supply module JP5 when it is grounded and discharged.

[0034] like Figure 2 As shown, as a second embodiment of this application, and an improvement upon the first embodiment, a driving circuit is disclosed. The driving circuit further includes multiple test points (shown as T1, T2, T3, T4, T5, T6, T7, T8, and T9 in the figure), the positions of which are as follows: Figure 2 As shown, the electronic components are distributed throughout the drive circuit to facilitate the designer's testing of whether the drive circuit is working properly. The designer can use an ammeter or multimeter to test the voltage or current value at the test point to determine whether the drive circuit is abnormal.

[0035] like Figure 3 As shown, the third embodiment of this application, which is an improvement on the first embodiment, discloses a driving circuit 100. The driving circuit further includes a first reserved switch Q2, a first reserved unidirectional diode ZD1, a second reserved unidirectional diode ZD2, a third reserved unidirectional diode ZD3, and a fourth reserved unidirectional diode ZD4. The first reserved switch Q2 is connected in parallel with the first switch Q1, and is reserved in the driving circuit 100 so that when the first switch Q1 fails, the first reserved switch Q2 can be activated to continue the operation of the driving circuit 100. Similarly, the first reserved unidirectional diode ZD1 is connected in parallel with the first unidirectional diode ZD4. The second reserved unidirectional conducting diode ZD2 is connected in parallel with the second unidirectional conducting diode D2, the third reserved unidirectional conducting diode ZD3 is connected in parallel with the third unidirectional conducting diode D3, and the fourth reserved unidirectional conducting diode ZD4 is connected in parallel with the fourth unidirectional conducting diode D4. This arrangement ensures that when the first unidirectional conducting diode D1, the second unidirectional conducting diode D2, the third unidirectional conducting diode D3, or the fourth unidirectional conducting diode D4 fails, the corresponding reserved first reserved unidirectional conducting diode ZD1, the second reserved unidirectional conducting diode ZD2, the third reserved unidirectional conducting diode ZD3, or the fourth reserved unidirectional conducting diode ZD4 can be activated to maintain the operation of the drive circuit 100.

[0036] like Figure 4 As shown, in the fourth embodiment of this application, a testing device 200 is disclosed. The testing device 200 includes a mechanical switch and a driving circuit 100 as described in the above embodiment. The driving circuit 100 is used to drive the mechanical switch to work. The testing device of this embodiment realizes the secondary power-on of the driving circuit by setting a delay module, thereby meeting the secondary power-on requirement in the one-time plug-in two-sided test of the Type-C interface, meeting the requirements of PSSD testing, and eliminating the need for manual control of power on and off, avoiding human error and improving testing efficiency.

[0037] It should be noted that the inventive concept of this application can form many embodiments, but due to the limited space of the application documents, they cannot all be listed. Therefore, without conflict, the embodiments described above or the technical features can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effect will be enhanced.

[0038] The above description, in conjunction with specific optional embodiments, provides a further detailed explanation of this application and should not be construed as limiting the specific implementation of this application to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of this application, and all such modifications or substitutions should be considered within the scope of protection of this application.

Claims

1. A driving circuit, applied in a testing device, characterized in that, include: Chip select signal input terminal; The first switch has its control terminal connected to the chip select signal input terminal, and its input terminal is grounded. A delay module, wherein the input terminal of the delay module is connected to the output terminal of the first switch; A power output terminal is connected to the input terminal of the delay module; as well as A power supply module, the output terminal of which is connected to the input terminal of the delay module and the power output terminal; The delay module is grounded when the input and output terminals of the first switch are connected, and the power output terminal provides voltage to the delay module and the power output terminal in sequence.

2. The driving circuit according to claim 1, characterized in that, The delay module includes a first capacitor and a first resistor. The input terminal of the first capacitor is connected to the output terminal of the first switch and the output terminal of the power supply module. The output terminal of the first capacitor is connected to the input terminal of the first resistor and the power output terminal. The output terminal of the first resistor is grounded.

3. The driving circuit according to claim 1, characterized in that, A first unidirectional diode is provided between the delay module and the power supply module, and a second unidirectional diode is provided between the power output terminal and the power supply module; The first unidirectional diode conducts current from the power supply module to the output terminal of the delay module, and the second unidirectional diode conducts current from the power supply module to the power output terminal.

4. The driving circuit according to claim 1, characterized in that, It also includes a second capacitor, a second resistor, and a third unidirectional diode. The input terminal of the second capacitor is connected between the chip select signal input terminal and the control terminal of the first switch. The output terminal of the second capacitor is connected to the power supply module. The third unidirectional diode is disposed between the second capacitor and the power supply module. The input terminal of the second resistor is connected between the output terminal of the second capacitor and the third unidirectional diode. The output terminal of the second resistor is grounded. The current conduction direction of the third unidirectional diode is from the power supply module to the second capacitor.

5. The driving circuit according to claim 1, characterized in that, It also includes a filter capacitor and a filter resistor. The input terminal of the filter resistor is connected to the power supply module, the output terminal of the filter resistor is connected to the input terminal of the filter capacitor, and the output terminal of the filter capacitor is connected between the power output terminal and the power supply module.

6. The driving circuit according to claim 1, characterized in that, It also includes a first protection resistor and a second protection resistor. The input terminal of the first protection resistor is connected to the output terminal of the power supply module, and the output terminal of the first protection resistor is connected to the input terminal of the delay module. The input terminal of the second protection resistor is connected to the output terminal of the power supply module, and the output terminal of the second protection resistor is connected to the power output terminal.

7. The driving circuit according to claim 1, characterized in that, It also includes a voltage regulator resistor, the input terminal of which is connected to the chip select signal input terminal, and the output terminal of which is connected to the control terminal of the first switch.

8. The driving circuit according to claim 2, characterized in that, The resistance of the first resistor is between 90 and 110 kiloohms.

9. The driving circuit according to claim 1, characterized in that, The first switch is an N-type MOSFET.

10. A testing apparatus, characterized in that, It includes a mechanical switch and a drive circuit as described in any one of claims 1 to 9, wherein the drive circuit is used to drive the mechanical switch to operate.

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