Light-emitting substrate

Abstract

Disclosed is a light emitting substrate including: a base; the driving circuit layer is arranged on the substrate; the light-emitting device is positioned on one side, far away from the substrate, of the driving circuit layer and is electrically connected with the driving circuit layer; the lens structure is located on the side, away from the substrate, of the light-emitting device; a second packaging layer and a third packaging layer, the second packaging layer is located at one side, far away from the substrate, of the driving circuit layer, and the third packaging layer is located at one side, far away from the substrate, of the second packaging layer; wherein the lens structure is located between the light-emitting device and the third packaging layer.

Description

Technical Field

[0001] This disclosure belongs to the field of display technology, and specifically relates to a light-emitting substrate. Background Technology

[0002] Miniature inorganic light-emitting diodes include MiniLEDs and MicroLEDs. MiniLEDs refer to light-emitting diode (LED) chips with a die size of approximately 100–300 micrometers. MicroLEDs refer to light-emitting diode chips with a die size of less than 100 micrometers. Mini LEDs / Mini LEDs can be used in the display industry for both backlight modules and direct-view displays. In Mini LED / Mini LED display products, the LED chips are mounted on a driver backplane, and the electrodes of the LED chips are electrically connected to the pads on the driver backplane. Utility Model Content

[0003] This disclosure provides a light-emitting substrate, comprising:

[0004] Base;

[0005] A driving circuit layer disposed on the substrate;

[0006] A light-emitting device, wherein the light-emitting device is located on the side of the driving circuit layer away from the substrate and is electrically connected to the driving circuit layer;

[0007] A lens structure is located on the side of the light-emitting device away from the substrate;

[0008] A second encapsulation layer and a third encapsulation layer, wherein the second encapsulation layer is located on the side of the driving circuit layer away from the substrate, and the third encapsulation layer is located on the side of the second encapsulation layer away from the substrate; wherein the lens structure is located between the light-emitting device and the third encapsulation layer.

[0009] In some embodiments, the difference between the distance from the surface of the second encapsulation layer away from the substrate to the substrate and the distance from the surface of the light-emitting device away from the substrate to the substrate is less than or equal to 10 micrometers.

[0010] In some embodiments, the light-emitting device includes a first electrode and a second electrode, wherein the first electrode and the second electrode are electrically connected to the driving circuit layer;

[0011] The second encapsulation layer is also located between the first electrode and the second electrode.

[0012] In some embodiments, the material of the second encapsulation layer is one of epoxy resin, silicone resin, polyimide, polyurethane, acrylate, and phenolic resin, and the material of the third encapsulation layer is one of epoxy resin, silicone resin, polyimide, polyurethane, acrylate, and phenolic resin.

[0013] In some embodiments, the light-emitting device includes a light-emitting body and a first electrode and a second electrode electrically connected to the light-emitting body, wherein the first electrode and the second electrode are located on the side of the light-emitting body facing the substrate;

[0014] The light-emitting substrate further includes a first encapsulation layer located between the second encapsulation layer and the driving circuit layer, the first encapsulation layer comprising:

[0015] The first packaging section is located on the side of the light-emitting device away from the substrate;

[0016] The second package is located on the side of the driving circuit layer away from the substrate, and the orthographic projection of the second package on the substrate is outside the orthographic projection of the light-emitting device on the substrate;

[0017] A third encapsulation part, which is at least connected to the first encapsulation part, and has a first receiving hole and a second receiving hole, wherein the first electrode is located in the first receiving hole and the second electrode is located in the second receiving hole;

[0018] The first encapsulation layer includes a first sub-encapsulation layer and a second sub-encapsulation layer stacked together. The material of the first sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide. The material of the second sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide.

[0019] In some embodiments, the maximum thickness of the third encapsulation layer is 2 to 3 times the height of the lens structure arch.

[0020] In some embodiments, the difference between the maximum and minimum distances from the surface of the third encapsulation layer away from the substrate to the substrate is less than or equal to 100 nm.

[0021] In some embodiments, the orthographic projection of the lens structure onto the substrate is a circle, and the ratio of the diameter of the circle to the arch height of the lens structure is 4 / 1 to 5 / 1.

[0022] In some embodiments, the light-emitting device includes a first electrode and a second electrode, and the driving circuit layer includes a first pad and a second pad, wherein the first electrode is electrically connected to the first pad and the second electrode is electrically connected to the second pad;

[0023] The materials of both the first pad and the second pad include a first alloy material, which includes nickel and vanadium.

[0024] In some embodiments, in the first alloy material, the atomic percentage of nickel is greater than or equal to 90% and less than 100%; the atomic percentage of vanadium is greater than 0 and less than or equal to 10%.

[0025] In some embodiments, the materials of the first electrode and the second electrode include a second alloy material;

[0026] The light-emitting substrate further includes a first connection layer and a second connection layer. The first connection layer is connected between the first electrode and the first pad, and the second connection layer is connected between the second electrode and the second pad. The materials of the first connection layer and the second connection layer both include an alloy formed by the first alloy material and the second alloy material.

[0027] In some embodiments, the second alloy material includes tin, silver, and copper, and / or,

[0028] Both the first pad and the second pad are made of nickel-vanadium alloy.

[0029] In some embodiments, the material of at least one of the first connecting layer and the second connecting layer further includes flux.

[0030] In some embodiments, the thickness of the first electrode and the second electrode is in the range of 0.1 micrometer to 5 micrometer, the thickness of the first pad and the second pad is in the range of 0.01 micrometer to 0.3 micrometer, and the thickness of the first interconnect layer and the second interconnect layer is in the range of 10 micrometer to 50 micrometer.

[0031] In some embodiments, the driving circuit layer includes a first pad and a second pad, and the light-emitting device includes a first electrode and a second electrode, wherein the first electrode is electrically connected to the first pad and the second electrode is electrically connected to the second pad;

[0032] The driving circuit layer further includes a transistor, the transistor comprising a source, a drain, and a first gate, an active layer, and a second gate sequentially disposed along a direction away from the substrate, the source and the drain being located on the side of the active layer away from the substrate and electrically connected to the active layer; the transistor further includes a connector, the connector being disposed on the same layer as the source and the drain, and electrically connected to the first gate through a first via and to the second gate through a second via;

[0033] The first pad and the second pad are both located on the side of the transistor away from the substrate, and one of the first pad and the second pad is electrically connected to the drain of the transistor.

[0034] In some embodiments, a buffer layer is disposed between the active layer and the first gate, a gate insulating layer is disposed between the active layer and the second gate, an interlayer dielectric layer is disposed on the side of the second gate away from the substrate, and the source and the drain are located on the side of the interlayer dielectric layer away from the substrate.

[0035] The source electrode is electrically connected to the active layer through a third via, the third via penetrating at least the interlayer dielectric layer and the gate insulating layer; the drain electrode is electrically connected to the active layer through a fourth via, the fourth via penetrating at least the interlayer dielectric layer and the gate insulating layer.

[0036] The first via includes a first sub-via penetrating the buffer layer, a second sub-via penetrating the gate insulating layer, and a third sub-via penetrating the interlayer dielectric layer. Any two of the first sub-via, the second sub-via, and the third sub-via have overlapping orthographic projections on the substrate. The second via penetrates the interlayer dielectric layer.

[0037] The orthographic projections of the third and fourth vias on the substrate do not overlap with the orthographic projection of the first gate on the substrate.

[0038] In some embodiments, the light-emitting device includes a light-emitting body and a first electrode and a second electrode electrically connected to the light-emitting body, wherein the first electrode and the second electrode are located on the side of the light-emitting body facing the substrate;

[0039] The light-emitting substrate further includes a first encapsulation layer, the first encapsulation layer comprising:

[0040] The first packaging section is located on the side of the light-emitting device away from the substrate;

[0041] The second package is located on the side of the driving circuit layer away from the substrate, and the orthographic projection of the second package on the substrate is outside the orthographic projection of the light-emitting device on the substrate;

[0042] A third encapsulation part is at least connected to the first encapsulation part and has a first receiving hole and a second receiving hole, wherein the first electrode is located in the first receiving hole and the second electrode is located in the second receiving hole.

[0043] In some embodiments, the first encapsulation layer includes a first sub-encapsulation layer and a second sub-encapsulation layer stacked together. The material of the first sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide. The material of the second sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide.

[0044] In some embodiments, the light-emitting device is a mini-LED or a micro-LED. Attached Figure Description

[0045] Figure 1 This is a schematic diagram of the light-emitting substrate provided in the first embodiment of this disclosure.

[0046] Figure 2A This is a schematic diagram of the light-emitting substrate provided in the second embodiment of this disclosure.

[0047] Figure 2B This is another schematic diagram of the light-emitting substrate provided in the second embodiment of this disclosure.

[0048] Figure 3A This is a schematic diagram of the light-emitting substrate provided in the third embodiment of this disclosure.

[0049] Figure 3B To Figure 3A A schematic diagram of the WVTR test results for the first encapsulation layer in the image.

[0050] Figure 4 This is a schematic diagram of the light-emitting substrate provided in the fourth embodiment of this disclosure.

[0051] Figure 5 This is a schematic diagram of the light-emitting substrate provided in the fifth embodiment of this disclosure. Detailed Implementation

[0052] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.

[0053] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0054] Unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0055] As used herein, “parallel” and “perpendicular” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°.

[0056] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0057] This document describes exemplary embodiments with reference to sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Therefore, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0058] In the embodiments of this disclosure, the numerical ranges of "m1~m2" and "m1 to m2" both include the endpoint values ​​m1 and m2.

[0059] Figure 1 This is a schematic diagram of the light-emitting substrate provided in the first embodiment of this disclosure, as shown below. Figure 1As shown, the light-emitting substrate includes a substrate SUB, a driving circuit layer 20 disposed on the substrate SUB, and a light-emitting device 10. The driving circuit layer 20 includes a first pad 21 and a second pad 22. The light-emitting device 10 is located on the side of the driving circuit layer 20 away from the substrate SUB. The light-emitting device 10 includes a first electrode 11 and a second electrode 12. The first electrode 11 is electrically connected to the first pad 21, and the second electrode 12 is electrically connected to the second pad 22. The materials of both the first pad 21 and the second pad 22 include a first alloy material, which includes nickel (Ni) and vanadium (V).

[0060] In this embodiment of the disclosure, the materials of the first pad 21 and the second pad 22 used for electrical connection with the light-emitting device 10 both include a first alloy material, and the first alloy material includes nickel and vanadium elements, thereby improving the oxidation resistance and corrosion resistance of the first pad 21 and the second pad 22, and improving the connection effect between the light-emitting device 10 and the driving circuit layer 20.

[0061] For example, in the first alloy material, the atomic percentage of nickel is greater than or equal to 90% and less than 100%; the atomic percentage of vanadium is greater than 0 and less than or equal to 10%. The atomic percentages of nickel and vanadium can be obtained by EDS (Energy Dispersive X-ray Spectroscopy).

[0062] For example, such as Figure 1 As shown, both the first electrode 11 and the second electrode 12 are made of the second alloy material. For example... Figure 1 As shown, the light-emitting substrate also includes a first connection layer 31 and a second connection layer 32. The first connection layer 31 is connected between the first electrode 11 and the first pad 21, and the second connection layer 32 is connected between the second electrode 12 and the second pad 22. The materials of the first connection layer 31 and the second connection layer 32 both include an alloy formed by the first alloy material and the second alloy material. For example, the first electrode 11 and the first pad 21 are welded to each other at close intervals to form the first connection layer 31, and the second electrode 12 and the second pad 22 are welded to each other at close intervals to form the second connection layer 32.

[0063] For example, the second alloy material includes tin, silver and copper, and / or the materials of the first pad 21 and the second pad 22 are both nickel-vanadium alloys.

[0064] Compared to copper-nickel (CuNi) alloy pads and electroless gold plating (electroplated gold) pads, nickel-vanadium alloy pads offer better bonding properties, oxidation resistance, and corrosion resistance, and can replace the electroless gold plating process, thus reducing costs.

[0065] For example, the first electrode 11 and the second electrode 12 are both made of tin-silver-copper alloy, and the first pad 21 and the second pad 22 are both made of nickel-vanadium alloy.

[0066] For example, the driving circuit layer 20 further includes a third connection layer 24, a fourth connection layer 25, and a driving layer 23. The driving layer 23 may include structures such as transistors and voltage lines. The first pad 21 is electrically connected to the driving layer 23 through the third connection layer 24, and the second pad 22 is electrically connected to the driving layer 23 through the fourth connection layer 25.

[0067] For example, both the third connection layer 24 and the fourth connection layer 25 can be made of a metal material with good electrical conductivity. For example, both the third connection layer 24 and the fourth connection layer 25 are made of copper.

[0068] For example, the material of at least one of the first connecting layer 31 and the second connecting layer 32 may also include flux.

[0069] For example, the first electrode 11 can be soldered to the first pad 21 and the second electrode 12 can be soldered to the second pad 22 using a reflow soldering process. Flux can be used during the soldering process. Compared with solder paste, flux has better wettability and better adhesion to nickel-vanadium alloy pads, thereby improving the connection stability between the light-emitting device 10 and the first pad 21 and the second pad 22, and preventing defects such as slippage of the light-emitting device 10 after soldering.

[0070] For example, the flux material may include resin, such as rosin resin.

[0071] For example, the thickness of the first electrode 11 and the second electrode 12 is in the range of 0.1 micrometer to 5 micrometer, the thickness of the first pad 21 and the second pad 22 is in the range of 0.01 micrometer to 0.3 micrometer, and the thickness of the first connection layer 31 and the second connection layer 32 is in the range of 10 micrometer to 50 micrometer, thereby ensuring the connection stability and electrical conductivity between the first electrode 12 and the first pad 21, and between the second electrode 12 and the second pad 22.

[0072] Wherein, the thickness of the first electrode 11 and the second electrode 12 refer to the thickness of the second alloy material at the positions of the first electrode 11 and the second electrode 12, respectively; the thickness of the first pad 21 and the second pad 22 refer to the thickness of the first alloy material at the positions of the first pad 21 and the second pad 22, respectively; and the thickness of the first connecting layer 31 and the second connecting layer 32 refer to the alloy thickness formed by the first alloy material and the second alloy material at the positions of the first pad 21 and the second pad 22.

[0073] For example, in Figure 1In this case, the substrate SUB can be a flexible substrate. For example, the material of the substrate SUB includes organic materials such as polyimide (PI); or, the substrate SUB can be a rigid substrate. For example, the material of the substrate SUB includes glass.

[0074] After performing corrosion resistance tests on pads made of different materials (i.e., the first pad and the second pad), it is found that when gold (Au) is used to make the first pad 21 and the second pad 22, after 96 hours of corrosion resistance testing, the pads are oxidized; when a copper-nickel alloy is used to make the first pad 21 and the second pad 22, after 24 hours of corrosion resistance testing, the pads are oxidized and discolored; when a nickel-vanadium alloy is used to make the pads, after the corrosion resistance test, the surface of the pads basically does not change and the reflectivity also has no obvious change.

[0075] In Figure 1 In the light-emitting substrate shown, the light-emitting device 10 can be a mini-LED or a micro-LED. Among them, the light-emitting device 10 can further include a light-emitting body 13, and both the first electrode 11 and the second electrode 12 are electrically connected to the light-emitting body 13. For example, the light-emitting body 13 can include a first semiconductor layer, a light-emitting layer, and a second semiconductor layer sequentially arranged in a direction away from the substrate SUB. The first electrode 11 is electrically connected to the first semiconductor layer, and the second electrode 12 is electrically connected to the second semiconductor layer. Among them, one of the first semiconductor layer and the second semiconductor layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. The light-emitting layer can include a multi-quantum well layer. The N-type semiconductor layer can contain n-type GaN, and the P-type semiconductor layer can contain In x Al y Ga 1-x-y A p-type nitride semiconductor layer of N (0≤x<1, 0≤y<1, 0≤x + y<1) composition, and the p-type impurity can be magnesium. For example, the P-type semiconductor layer can be a single-layer structure, but in some exemplary embodiments, it can have a multi-layer structure containing different components. In the multi-quantum well layer, the quantum well layer and the quantum barrier layer are stacked alternately with each other. For example, the quantum well layer and the quantum barrier layer can respectively include In x Al y Ga 1-x-y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) of different components. In one example, the quantum well layer can include In x Ga 1-x N (0<x≤1) composition, and the quantum barrier layer can include GaN or AlGaN. It should be noted that in some other examples, the multi-quantum well layer can be replaced with a single quantum well layer.

[0076] Figure 2A It is a schematic diagram of the light-emitting substrate provided in the second embodiment of the present disclosure. Figure 2BThis is another schematic diagram of the light-emitting substrate provided in the second embodiment of this disclosure. Figure 2A and Figure 2B These are cross-sectional views of the light-emitting substrate at different locations. Figure 2A The cross-sectional view illustrates the connection relationship between the source 2s, drain 2d, and active layer 2a; Figure 2B The cross-sectional view illustrates the connection between the drain 2d and the active layer 2a, as well as the connection between the adapter 2e and the first gate 2g1 and the second gate 2g2. For example... Figure 2A and Figure 2B As shown, the light-emitting substrate includes a substrate SUB, a driving circuit layer 20 disposed on the substrate SUB, and a light-emitting device 10. The driving circuit layer 20 includes a first pad 21 and a second pad 22. The light-emitting device 10 is located on the side of the driving circuit layer 20 away from the substrate SUB. The light-emitting device 10 includes a first electrode 11 and a second electrode 12. The first electrode 11 is electrically connected to the first pad 21, and the second electrode 12 is electrically connected to the second pad 22.

[0077] For example, in Figure 2A In this context, the substrate SUB can be a flexible substrate, for example, the material of the substrate SUB includes organic materials such as polyimide (PI); or, the substrate SUB can be a rigid substrate, for example, the material of the substrate SUB includes glass.

[0078] For example, in Figure 2A and Figure 2B In the illustrated light-emitting substrate, the driving circuit layer 20 further includes a driving layer 23, which includes a transistor. The transistor includes a source 2s, a drain 2d, and a first gate 2g1, an active layer 2a, and a second gate 2g2 sequentially disposed along a direction away from the substrate SUB. The source 2s and drain 2d are located on the side of the active layer 2a away from the substrate SUB and are electrically connected to the active layer 2a. The transistor also includes a connector 2e, which is disposed on the same layer as the source 2s and drain 2d, and is electrically connected to the first gate 2g1 through a first via V1 and to the second gate 2g2 through a second via V2. The first pad 21 and the second pad 22 are both located on the side of the transistor away from the substrate SUB, and one of the first pad 21 and the second pad 22 is electrically connected to the drain 2d of the transistor.

[0079] For example, a barrier layer BAL can be provided between the substrate SUB and the driving circuit layer 20. The barrier layer BAL can repair surface defects of the substrate SUB and prevent metal ions in the substrate SUB from diffusing to the active layer 2a of the transistor, thus avoiding short circuits or electrochemical corrosion.

[0080] For example, the first gate 2g1 is located on the side of the barrier layer away from the substrate SUB, and the material of the first gate 2g1 may include metal, specifically a single layer of metal or a stack of multiple layers of metal.

[0081] For example, the active layer 2a is located on the side of the first gate 2g1 away from the substrate SUB, and the second gate 2g2 is located on the side of the active layer 2a away from the substrate SUB. A buffer layer BUL is disposed between the active layer 2a and the first gate 2g1, and a gate insulating layer GI is disposed between the active layer 2a and the second gate 2g2. An interlayer dielectric layer ILD is disposed on the side of the second gate 2g2 away from the substrate SUB, and the source 2s and drain 2d are located on the side of the interlayer dielectric layer ILD away from the substrate SUB. The source 2s is electrically connected to the active layer 2a through a third via V3, which at least penetrates the interlayer dielectric layer ILD and the gate insulating layer GI; the drain 2d is electrically connected to the active layer 2a through a fourth via V4, which at least penetrates the interlayer dielectric layer ILD and the gate insulating layer GI.

[0082] For example, the first via V1 includes a first sub-via penetrating the buffer layer BUL, a second sub-via penetrating the gate insulating layer GI, and a third sub-via penetrating the interlayer dielectric layer ILD, wherein the orthographic projections of any two of the first, second, and third sub-vias onto the substrate SUB overlap. The first via V1, second via V2, third via V3, and fourth via V4 can be formed in a single patterning process.

[0083] For example, the first sub-via, the second sub-via, and the third sub-via are arranged coaxially.

[0084] In the transistor fabrication process, a first gate 2g1 can be formed using a first patterning process, followed by the formation of a buffer layer BUL. Then, an active layer 2a can be formed using a second patterning process, followed by the formation of a gate insulating layer GI. A second gate 2g2 can be formed using a third patterning process, followed by the formation of an interlayer dielectric layer ILD. A first via V1, a second via V2, a third via V3, and a fourth via V4 can be formed using a fourth patterning process. Finally, a source 2s, a drain 2d, and a transition element 2e can be formed using a fifth patterning process. That is, the source 2s, drain 2d, and transition element are formed through the same patterning process. Compared to the scheme where the second gate 2g2 is directly electrically connected to the first gate 2g1 through a via penetrating the gate insulating layer GI, the embodiment of this disclosure uses the transition element 2e to electrically connect the first gate 2g1 and the second gate 2g2, and places the transition element in the same layer as the source 2s and drain 2d, which simplifies the fabrication process.

[0085] In one example, both the third via V3 and the fourth via V4 penetrate the interlayer dielectric layer ILD and the gate insulating layer GI, exposing the surface of the active layer 2a away from the substrate SUB. The orthogonal projections of the third via V3 and the fourth via V4 onto the substrate SUB do not overlap with the orthogonal projections of the second gate 2g2 onto the substrate SUB.

[0086] In another example, the third via V3 also penetrates a portion of the buffer layer BUL and the active layer 2a; the fourth via V4 also penetrates a portion of the buffer layer BUL and the active layer 2a. The portion of the source 2s located within the third via V3 can contact the inner surface of the active layer 2a facing the third via V3, and can also contact the surface of the active layer 2a away from the substrate SUB; the portion of the drain 2d located within the fourth via V4 can contact the inner surface of the active layer 2a facing the fourth via V4, and can also contact the surface of the active layer 2a away from the substrate SUB, thereby improving the connection stability of the source 2s, drain 2d, and active layer 2a. The orthographic projections of the third via V3 and the fourth via V4 onto the substrate SUB do not overlap with the orthographic projection of the first gate 2g1 onto the substrate SUB, to prevent accidental contact between the source 2s, drain 2d, and the first gate 2g1.

[0087] For example, a planarization layer PLN and a passivation layer PVX are disposed on the side of the layer containing the source 2s and drain 2d of the transistor away from the substrate SUB. The passivation layer PVX is located on the side of the planarization layer PLN away from the substrate SUB. The first pad 21 and the second pad 22 are located on the side of the passivation layer PVX away from the substrate SUB. One of the third connection layer 24 and the fourth connection layer 25 is electrically connected to the drain 2d through the fifth via V5, and the other is electrically connected to the second voltage line through the sixth via V6. The second voltage line may include a first conductive part VSS1 and a second conductive part VSS2. The first conductive part VSS1 is disposed on the same layer as the second gate 2g2, and the second conductive part VSS2 is disposed on the same layer as the source 2s and the drain 2d. The driving circuit layer 20 may also include a first voltage line, which may include a third conductive part VDD1, a fourth conductive part VDD2 and a fifth conductive part VDD3. The third conductive part VDD1 is disposed on the same layer as the first gate 2g1, the fourth conductive part VDD2 is disposed on the same layer as the second gate 2g2, and the fifth conductive part VDD3 is disposed on the same layer as the source 2s and the drain 2d, and is electrically connected to the third conductive part VDD1 and the fourth conductive part VDD2 through vias.

[0088] For example, the light-emitting substrate can be used as a display substrate. In this case, the driving circuit layer 20 can also include a data line DL, which is disposed on the same layer as the source electrode 2s and the drain electrode 2d.

[0089] exist Figure 2A and Figure 2BIn the light-emitting substrate shown, the light-emitting device 10 can be a mini-LED or a micro-LED. The light-emitting device 10 may further include a light-emitting body 13, with the first electrode 11 and the second electrode 12 both electrically connected to the light-emitting body 13. The structure of the light-emitting body 13 can be referred to the description above, and will not be repeated here.

[0090] exist Figure 2A and Figure 2B In the light-emitting device 10 shown, the materials and thicknesses of the first electrode 11, second electrode 12, first pad 21, and second pad 22 are not limited, nor are the connection methods between the first electrode 11 and the first pad 21, or between the second electrode 12 and the second pad 22. In one example... Figure 2A The materials and thicknesses of the first electrode 11, the second electrode 12, the first pad 21, and the second pad 22 can be referenced. Figure 1 The light-emitting substrate shown is configured such that the first electrode 11 and the first pad 21 are electrically connected through the first connection layer 31, and the second electrode 12 and the second pad 22 are electrically connected through the second connection layer 32. Specific materials can be found in [reference needed]. Figure 1 The light-emitting substrate shown is configured.

[0091] When the first pad 21 and the second pad 22 are made of nickel-vanadium alloy, the nickel-vanadium alloy has good oxidation resistance and corrosion resistance. Therefore, there is no need to set a second passivation layer on the side of the first pad 21 and the second pad 22 away from the substrate SUB, saving one process step. In addition, it prevents the patterning process of the second passivation layer from affecting the wettability of the surface of the first pad 21 and the second pad 22, so as to ensure the welding effect of the subsequent welding process.

[0092] Figure 3A This is a schematic diagram of the light-emitting substrate provided in the third embodiment of this disclosure, as shown below. Figure 3A As shown, the light-emitting substrate includes a substrate SUB, a driving circuit layer 20 and a light-emitting device 10 disposed on the substrate SUB. The driving circuit layer 20 includes a first pad 21 and a second pad 22. The light-emitting device 10 is located on the side of the driving circuit layer 20 away from the substrate SUB. The light-emitting device 10 includes a first electrode 11 and a second electrode 12. The first electrode 11 is electrically connected to the first pad 21, and the second electrode 12 is electrically connected to the second pad 22.

[0093] The light-emitting device 10 includes a light-emitting body 13 and a first electrode 11 and a second electrode 12 electrically connected to the light-emitting body 13. The first electrode 11 and the second electrode 12 are located on the side of the light-emitting body 13 facing the substrate SUB.

[0094] like Figure 3AAs shown, the light-emitting substrate may further include a first encapsulation layer 40, which includes a first encapsulation portion 41, a second encapsulation portion 42, and a third encapsulation portion 43. The first encapsulation portion 41 is located on the side of the light-emitting device 10 away from the substrate SUB. The second encapsulation portion 42 is located on the side of the driving circuit layer 20 away from the substrate SUB, and the orthographic projection of the second encapsulation portion 42 on the substrate SUB is outside the orthographic projection of the light-emitting device 10 on the substrate SUB. The third encapsulation portion 43 is at least connected to the first encapsulation portion 41 and has a first receiving hole and a second receiving hole. The first electrode 11 is located in the first receiving hole, and the second electrode 12 is located in the second receiving hole, so that the first electrode 11 and the second electrode 12 are both surrounded by the third encapsulation portion 43 to prevent the first electrode 11 and the second electrode 12 from being corroded by external water and oxygen.

[0095] For example, the surface of the light-emitting body 13 facing the substrate SUB is in contact with the third encapsulation portion 43. For example, the third encapsulation portion 43 includes a first portion, a second portion, a third portion and a fourth portion, the first portion is located on the surface of the light-emitting body 13 facing the substrate SUB, the second portion is disposed opposite to the first portion and is located between the first electrode 11 and the second electrode 12, the third portion is disposed around the first electrode 11, and the fourth portion is disposed around the second electrode 12.

[0096] For example, the first encapsulation part 41, the second encapsulation part 42 and the third encapsulation part 43 are made of the same material, so that they can be formed using the same thin film encapsulation process.

[0097] For example, the first encapsulation part 41, the second encapsulation part 42 and the third encapsulation part 43 can be connected into a single structure.

[0098] For example, the first encapsulation layer 40 includes a first sub-encapsulation layer and a second sub-encapsulation layer stacked together. The material of the first sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide, and the material of the second sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide, thereby improving the encapsulation effect. The materials of the first and second sub-encapsulation layers can be different. In one example, one of the first and second sub-encapsulation layers is made of silicon nitride, and the other is made of silicon oxide. Silicon nitride has good water resistance, and silicon oxide can be formed by atomic layer deposition, thereby forming blurred film boundaries, improving adhesion, reducing the risk of film separation, and thus improving the encapsulation effect.

[0099] For example, each of the first encapsulation portion 41, the second encapsulation portion 42, and the third encapsulation portion 43 includes a first sub-encapsulation layer and a second sub-encapsulation layer.

[0100] For example, the thickness of the first sub-package layer is between 200nm and 400nm, and the thickness of the second sub-package layer is between 400nm and 600nm. For instance, the thickness of the first sub-package layer is between 200nm and 250nm, or between 250nm and 300nm, or between 300nm and 350nm, or between 350nm and 400nm; the thickness of the second sub-package layer is between 400nm and 450nm, or between 450nm and 500nm, or between 500nm and 600nm. For instance, the thickness of the first sub-package layer is 300nm, and the thickness of the second sub-package layer is 500nm.

[0101] Figure 3B To Figure 3A A schematic diagram of the WVTR (Water Vapor Transmission Rate) test results for the first encapsulation layer 40 in the image. The vertical axis represents WVTR, and the unit is mg / m³. 2 *24h, during testing, the first sub-encapsulation layer was made of silicon nitride with a thickness of 300nm, and the second sub-encapsulation layer was made of silicon oxide with a thickness of 500nm. Figure 3B It can be seen that the first encapsulation layer 40 in this embodiment can meet the requirement of WVTR < 1 mg / m2 * 24h.

[0102] exist Figure 3A In the light-emitting substrate shown, the light-emitting device 10 can be a mini-LED or a micro-LED. The light-emitting body 13 may include a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked together, as described above, and will not be repeated here.

[0103] exist Figure 3A In the light-emitting device 10 shown, the materials and thicknesses of the first electrode 11, second electrode 12, first pad 21, and second pad 22 are not limited, nor are the connection methods between the first electrode 11 and the first pad 21, or between the second electrode 12 and the second pad 22. In one example... Figure 3A The materials and thicknesses of the first electrode 11, the second electrode 12, the first pad 21, and the second pad 22 can be referenced. Figure 1 The light-emitting substrate shown is configured such that the first electrode 11 and the first pad 21 are electrically connected through the first connection layer 31, and the second electrode 12 and the second pad 22 are electrically connected through the second connection layer 32. Specific materials can be found in [reference needed]. Figure 1 The light-emitting substrate shown is configured.

[0104] In one example Figure 3AThe driving circuit layer 20 of the light-emitting substrate shown can be referenced. Figure 2A and Figure 2B The design is carried out using the driving circuit layer 20. Of course, it can also be combined with... Figure 2A The driving circuit layer 20 shown is different.

[0105] Furthermore, the inventors discovered that due to the large emission angle of LED light-emitting devices, problems such as low forward brightness and crosstalk between adjacent pixels easily occur in LED light-emitting substrates. To solve this problem, the fourth embodiment of this disclosure provides a light-emitting substrate. Figure 4 This is a schematic diagram of the light-emitting substrate provided in the fourth embodiment of this disclosure, as shown below. Figure 4 As shown, the light-emitting substrate includes a substrate SUB, a driving circuit layer 20 and a light-emitting device 10 disposed on the substrate SUB, and the light-emitting device 10 is electrically connected to the driving circuit layer 20. Additionally, as... Figure 4 As shown, the light-emitting substrate further includes a lens structure 70, a second encapsulation layer 50, and a third encapsulation layer 60. The lens structure 70 is located on the side of the light-emitting device 10 away from the substrate SUB, and is used to focus the light emitted by the light-emitting device 10. The second encapsulation layer 50 is located on the side of the driving circuit layer 20 away from the substrate SUB, and the third encapsulation layer 60 is located on the side of the second encapsulation layer 50 away from the substrate SUB. The lens structure 70 is located between the light-emitting device 10 and the third encapsulation layer 60. For example, the lens structure 70 is located between the second encapsulation layer 50 and the third encapsulation layer 60.

[0106] exist Figure 4 In the light-emitting substrate shown, by providing a lens structure 70 on the light-emitting side of the light-emitting device 10, the emitted light from the light-emitting device 10 can be focused, improving the brightness of the front light emitted from the light-emitting substrate and preventing crosstalk and color shift. Furthermore, a second encapsulation layer 50 is provided on the side of the driving circuit layer 20 away from the substrate SUB, and a third encapsulation layer 60 is provided on the side of the second encapsulation layer 50 away from the substrate SUB. The lens structure 70 is located between the second encapsulation layer 50 and the third encapsulation layer 60. During the fabrication of the light-emitting substrate, the second encapsulation layer 50 can be formed after the step of forming the light-emitting device 10 and before the step of forming the lens structure 70; the third encapsulation layer 60 is formed after the formation of the lens structure 70. This allows the second encapsulation layer 50 to protect the electrodes of the light-emitting device 10 during the fabrication of the lens structure 70, preventing the electrodes of the light-emitting device 10 from being corroded by water and oxygen.

[0107] For example, the orthographic projection of the lens structure 70 onto the substrate SUB covers the orthographic projection of the light-emitting device 10 onto the substrate SUB, so as to ensure that as much of the emitted light from the light-emitting device 10 as possible is incident on the lens structure 70. For example, the lens structure 70 corresponds one-to-one with the light-emitting device 10.

[0108] For example, the surface of the lens structure 70 away from the substrate SUB is convex, and the surface of the lens structure 70 facing the substrate SUB is planar.

[0109] For example, the refractive index of the lens structure 70 is greater than that of the third encapsulation layer 60 to ensure the light-gathering effect of the lens structure 70.

[0110] For example, the refractive index of the lens structure 70 is 1.65 to 1.9, and the transmittance is ≥97%, in order to maximize the brightness of the front side of the light-emitting substrate. For example, the refractive index of the lens structure 70 is 1.65 to 1.68, or 1.68 to 1.69, or 1.69 to 1.71.

[0111] For example, the materials of the second encapsulation layer 50 and the third encapsulation layer 60 may include organic materials. For instance, the material of the second encapsulation layer 50 may be one of epoxy resin, silicone resin, polyimide, polyurethane, acrylate, and phenolic resin, and the material of the third encapsulation layer 60 may be one of epoxy resin, silicone resin, polyimide, polyurethane, acrylate, and phenolic resin.

[0112] For example, the difference between the distance from the surface of the second encapsulation layer 50 away from the substrate SUB and the distance from the surface of the light-emitting device 10 away from the substrate SUB is less than or equal to 10 micrometers. Where the orthogonal projection of the lens structure 70 onto the substrate SUB exceeds the orthogonal projection of the surface of the light-emitting device 10 opposite to the lens structure 70 onto the substrate SUB, and the distance from the surface of the second encapsulation layer 50 away from the substrate SUB is less than the distance from the surface of the light-emitting device 10 away from the substrate SUB, controlling the difference between the distance from the surface of the second encapsulation layer 50 away from the substrate SUB and the distance from the surface of the light-emitting device 10 away from the substrate SUB to the substrate SUB to be less than or equal to 10 micrometers facilitates the fabrication of the lens structure 70 and enables the light-emitting substrate to achieve better optical performance.

[0113] For example, the light-emitting device 10 may include a light-emitting body 13 and a first electrode 11 and a second electrode 12 electrically connected to the light-emitting body 13, wherein the first electrode 11 and the second electrode 12 are located on the side of the light-emitting body 13 facing the substrate SUB. A portion of the second encapsulation layer 50 is also located between the first electrode 11 and the second electrode 12.

[0114] In one example, the lens structure 70 may be positioned in contact with the surface of the light-emitting device 10 on the side away from the substrate SUB to improve light extraction efficiency.

[0115] In another example, such as Figure 4As shown, the light-emitting substrate also includes a first encapsulation layer 40 located between the second encapsulation layer 50 and the driving circuit layer 20. The first encapsulation layer 40 includes a first encapsulation portion 41, a second encapsulation portion 42, and a third encapsulation portion 43. The first encapsulation portion 41 is located on the side of the light-emitting device 10 away from the substrate SUB; the second encapsulation portion 42 is located on the side of the driving circuit layer 20 away from the substrate SUB, and the orthographic projection of the second encapsulation layer 50 onto the substrate SUB is outside the orthographic projection of the light-emitting device 10 onto the substrate SUB. The third encapsulation portion 42 is at least connected to the first encapsulation portion 41 and has a first receiving hole and a second receiving hole. The first electrode 11 is located in the first receiving hole, and the second electrode 12 is located in the second receiving hole, so that both the first electrode 11 and the second electrode 12 are surrounded by the third encapsulation portion 43 to prevent the first electrode 11 and the second electrode 12 from being corroded by external water and oxygen.

[0116] When the light-emitting substrate includes the first encapsulation part 41, the lens structure 70 can contact the surface of the first encapsulation part 41 away from the substrate SUB.

[0117] For example, the orthographic projection of the lens structure 70 onto the substrate SUB exceeds the orthographic projection of the surface of the light-emitting device 10 opposite to the lens structure 70 onto the substrate SUB. Furthermore, when the first encapsulation layer 40 is provided, if the distance from the surface of the second encapsulation layer 50 away from the substrate SUB to the substrate SUB is less than the distance from the surface of the first encapsulation portion 41 away from the substrate SUB to the substrate SUB, the difference between the distance from the surface of the second encapsulation layer 50 away from the substrate SUB to the substrate SUB and the distance from the surface of the first encapsulation portion 41 away from the substrate SUB to the substrate SUB is controlled to be less than or equal to 10 micrometers. This makes it easier to fabricate the lens structure 70 and enables the light-emitting substrate to achieve better optical effects.

[0118] For example, the surface of the light-emitting body 13 facing the substrate SUB contacts the third encapsulation portion 43. For instance, the third encapsulation portion 43 includes a first portion 431, a second portion 432, a third portion 433, and a fourth portion 434. The first portion 431 is located on the surface of the light-emitting body 13 facing the substrate SUB. The second portion 432 is disposed opposite to the first portion 431 and between the first electrode 11 and the second electrode 12. The third portion 433 surrounds the first electrode 11, and the fourth portion 434 surrounds the second electrode 12. A portion of the second encapsulation layer 50 is located between the first portion 431 and the second portion 432 of the third encapsulation portion 43. Both the first portion 431 and the second portion 432 are connected to the third portion 433 and the fourth portion 434.

[0119] For example, the first encapsulation part 41, the second encapsulation part 42 and the third encapsulation part 43 are made of the same material, so that they can be formed using the same thin film encapsulation process.

[0120] For example, the first encapsulation part 41, the second encapsulation part 42 and the third encapsulation part 43 can be connected into a single structure.

[0121] For example, the first encapsulation layer 40 includes a first sub-encapsulation layer and a second sub-encapsulation layer stacked together. The material of the first sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide, thereby improving the encapsulation effect. The materials of the first sub-encapsulation layer and the second sub-encapsulation layer can be different. In one example, one of the first and second sub-encapsulation layers is made of silicon nitride, and the other is made of silicon oxide. Silicon nitride has good water resistance, and silicon oxide can be formed by atomic layer deposition, thereby forming blurred film boundaries, improving adhesion, reducing the risk of film separation, and thus improving the encapsulation effect.

[0122] For example, each of the first encapsulation portion 41, the second encapsulation portion 42, and the third encapsulation portion 43 includes a first sub-encapsulation layer and a second sub-encapsulation layer.

[0123] For example, the thickness of the first sub-package layer is between 200nm and 400nm, and the thickness of the second sub-package layer is between 400nm and 600nm. For instance, the thickness of the first sub-package layer is between 200nm and 250nm, or between 250nm and 300nm, or between 300nm and 350nm, or between 350nm and 400nm; the thickness of the second sub-package layer is between 400nm and 450nm, or between 450nm and 500nm, or between 500nm and 600nm. For instance, the thickness of the first sub-package layer is 300nm, and the thickness of the second sub-package layer is 500nm.

[0124] For example, when the light-emitting substrate includes a first encapsulation layer 40 and the first encapsulation layer 40 includes a first encapsulation portion 41, the thickness of the second encapsulation layer 50 can be adjusted so that the difference between the distance from the surface of the second encapsulation layer 50 away from the substrate SUB and the distance from the surface of the first encapsulation portion 41 away from the substrate SUB is less than or equal to 10 micrometers. This allows the lens structure 70 to be located on a substantially flat surface, thereby ensuring the light-gathering effect of the lens structure 70. For example, the surface of the second encapsulation layer 50 away from the substrate SUB is flush with the surface of the first encapsulation portion 41 away from the substrate SUB.

[0125] For example, the maximum thickness of the third encapsulation layer 60 is 2 to 3 times the arch height H of the condenser lens, so as to ensure that the third encapsulation layer 60 covers the lens structure 70 and the surface of the third encapsulation layer 60 away from the substrate SUB is relatively flat. At the same time, it prevents the thickness of the third encapsulation layer 60 from being too large and affecting the light output effect.

[0126] For example, the difference between the maximum and minimum distances from the surface of the third encapsulation layer 60 away from the substrate SUB is less than or equal to 100 nm, in order to ensure the flatness of the surface of the third encapsulation layer 60, thereby improving the overall flatness of the surface of the light-emitting substrate.

[0127] For example, the orthographic projection of the lens structure 70 onto the substrate SUB is a circle, and the ratio of the diameter of this circle (hereinafter referred to as the aperture of the lens structure 70) to the height of the lens structure 70 is 4 / 1 to 5 / 1, thereby improving the front light emission effect and further improving the color shift problem. For example, 4 / 1 of the aperture is 4 to 4.25 times, or 4.25 to 4.5 times, or 4.5 to 4.75 times, or 4.75 to 5 times the height of the aperture.

[0128] Table 1 shows the simulated brightness at the forward viewing angle after the emitted light from the light-emitting device 10 passes through lens structures 70 of different sizes. The light-emitting device 10 in the simulation includes red, green, and blue light-emitting devices. The table shows that when the aperture-to-height ratio of the lens structure 70 is between 4 / 1 and 5 / 1, and the refractive index is between 1.68 and 1.71, a higher forward brightness can be achieved on the light-emitting substrate.

[0129] Table 1

[0130]

[0131] exist Figure 4 In the light-emitting substrate shown, the light-emitting device 10 can be a mini-LED or a micro-LED. The light-emitting body 13 may include a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked together, as described above, and will not be repeated here.

[0132] exist Figure 4 In the light-emitting device 10 shown, the materials and thicknesses of the first electrode 11, second electrode 12, first pad 21, and second pad 22 are not limited, nor are the connection methods between the first electrode 11 and the first pad 21, or between the second electrode 12 and the second pad 22. In one example... Figure 4 The materials and thicknesses of the first electrode 11, the second electrode 12, the first pad 21, and the second pad 22 can be referenced. Figure 1 The light-emitting substrate shown is configured such that the first electrode 11 and the first pad 21 are electrically connected through the first connection layer 31, and the second electrode 12 and the second pad 22 are electrically connected through the second connection layer 32. Specific materials can be found in [reference needed]. Figure 1 The light-emitting substrate shown is configured.

[0133] Figure 5This is a schematic diagram of the light-emitting substrate provided in the fifth embodiment of this disclosure. Figure 5 The light-emitting substrate shown is Figure 4 Similarly, the difference lies in, in Figure 5 In the middle, the driving circuit layer 20 can be referred to Figure 2A , Figure 2B The driving circuit layer 20 in the middle is designed.

[0134] This disclosure also provides a display device, including the light-emitting substrate of any of the above embodiments.

[0135] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. A light-emitting substrate, characterized in that, include: Base; A driving circuit layer disposed on the substrate; A light-emitting device, wherein the light-emitting device is located on the side of the driving circuit layer away from the substrate and is electrically connected to the driving circuit layer; A lens structure is located on the side of the light-emitting device away from the substrate; A second encapsulation layer and a third encapsulation layer, wherein the second encapsulation layer is located on the side of the driving circuit layer away from the substrate, and the third encapsulation layer is located on the side of the second encapsulation layer away from the substrate; wherein the lens structure is located between the light-emitting device and the third encapsulation layer.

2. The light-emitting substrate according to claim 1, characterized in that, The difference between the distance from the surface of the second encapsulation layer away from the substrate and the distance from the surface of the light-emitting device away from the substrate to the substrate is less than or equal to 10 micrometers.

3. The light-emitting substrate according to claim 1, characterized in that, The light-emitting device includes a first electrode and a second electrode, and the first electrode and the second electrode are electrically connected to the driving circuit layer. The second encapsulation layer is also located between the first electrode and the second electrode.

4. The light-emitting substrate according to claim 1, characterized in that, The material of the second encapsulation layer is one of epoxy resin, silicone resin, polyimide, polyurethane, acrylate, and phenolic resin, and the material of the third encapsulation layer is one of epoxy resin, silicone resin, polyimide, polyurethane, acrylate, and phenolic resin.

5. The light-emitting substrate according to claim 1, characterized in that, The light-emitting device includes a light-emitting body and a first electrode and a second electrode electrically connected to the light-emitting body, wherein the first electrode and the second electrode are located on the side of the light-emitting body facing the substrate; The light-emitting substrate further includes a first encapsulation layer located between the second encapsulation layer and the driving circuit layer, the first encapsulation layer comprising: The first packaging section is located on the side of the light-emitting device away from the substrate; The second package is located on the side of the driving circuit layer away from the substrate, and the orthographic projection of the second package on the substrate is outside the orthographic projection of the light-emitting device on the substrate; A third encapsulation part, which is at least connected to the first encapsulation part, and has a first receiving hole and a second receiving hole, wherein the first electrode is located in the first receiving hole and the second electrode is located in the second receiving hole; The first encapsulation layer includes a first sub-encapsulation layer and a second sub-encapsulation layer stacked together. The material of the first sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide. The material of the second sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide.

6. The light-emitting substrate according to claim 1, characterized in that, The maximum thickness of the third encapsulation layer is 2 to 3 times the height of the lens structure arch.

7. The light-emitting substrate according to claim 1, characterized in that, The difference between the maximum and minimum distances from the surface of the third encapsulation layer away from the substrate to the substrate is less than or equal to 100 nm.

8. The light-emitting substrate according to claim 1, characterized in that, The orthographic projection of the lens structure onto the substrate is a circle, and the ratio of the diameter of the circle to the arch height of the lens structure is 4 / 1 to 5 / 1.

9. The light-emitting substrate according to any one of claims 1 to 8, characterized in that, The light-emitting device includes a first electrode and a second electrode, and the driving circuit layer includes a first pad and a second pad. The first electrode is electrically connected to the first pad, and the second electrode is electrically connected to the second pad. The materials of both the first pad and the second pad include a first alloy material, which includes nickel and vanadium.

10. The light-emitting substrate according to claim 9, characterized in that, In the first alloy material, the atomic percentage of nickel is greater than or equal to 90% and less than 100%; the atomic percentage of vanadium is greater than 0 and less than or equal to 10%.

11. The light-emitting substrate according to claim 9, characterized in that, The materials of the first electrode and the second electrode include a second alloy material; The light-emitting substrate further includes a first connection layer and a second connection layer. The first connection layer is connected between the first electrode and the first pad, and the second connection layer is connected between the second electrode and the second pad. The materials of the first connection layer and the second connection layer both include an alloy formed by the first alloy material and the second alloy material.

12. The light-emitting substrate according to claim 11, characterized in that, The second alloy material includes tin, silver, and copper, and / or, Both the first pad and the second pad are made of nickel-vanadium alloy.

13. The light-emitting substrate according to claim 11, characterized in that, The material of at least one of the first connecting layer and the second connecting layer also includes flux.

14. The light-emitting substrate according to claim 11, characterized in that, The thickness of the first electrode and the second electrode is in the range of 0.1 micrometer to 5 micrometer, the thickness of the first pad and the second pad is in the range of 0.01 micrometer to 0.3 micrometer, and the thickness of the first connection layer and the second connection layer is in the range of 10 micrometer to 50 micrometer.

15. The light-emitting substrate according to any one of claims 1 to 8, characterized in that, The driving circuit layer includes a first pad and a second pad, and the light-emitting device includes a first electrode and a second electrode. The first electrode is electrically connected to the first pad, and the second electrode is electrically connected to the second pad. The driving circuit layer further includes a transistor, the transistor comprising a source, a drain, and a first gate, an active layer, and a second gate sequentially disposed along a direction away from the substrate, the source and the drain being located on the side of the active layer away from the substrate and electrically connected to the active layer; the transistor further includes a connector, the connector being disposed on the same layer as the source and the drain, and electrically connected to the first gate through a first via and to the second gate through a second via; The first pad and the second pad are both located on the side of the transistor away from the substrate, and one of the first pad and the second pad is electrically connected to the drain of the transistor.

16. The light-emitting substrate according to claim 15, characterized in that, A buffer layer is disposed between the active layer and the first gate, a gate insulating layer is disposed between the active layer and the second gate, an interlayer dielectric layer is disposed on the side of the second gate away from the substrate, and the source and the drain are located on the side of the interlayer dielectric layer away from the substrate. The source electrode is electrically connected to the active layer through a third via, and the third via penetrates at least the interlayer dielectric layer and the gate insulating layer. The drain electrode is electrically connected to the active layer through a fourth via, and the fourth via penetrates at least the interlayer dielectric layer and the gate insulating layer; The first via includes a first sub-via penetrating the buffer layer, a second sub-via penetrating the gate insulating layer, and a third sub-via penetrating the interlayer dielectric layer, wherein the orthographic projections of any two of the first sub-via, the second sub-via, and the third sub-via on the substrate overlap. The second via penetrates the interlayer dielectric layer; The orthographic projections of the third and fourth vias on the substrate do not overlap with the orthographic projection of the first gate on the substrate.

17. The light-emitting substrate according to any one of claims 1 to 8, characterized in that, The light-emitting device includes a light-emitting body and a first electrode and a second electrode electrically connected to the light-emitting body, wherein the first electrode and the second electrode are located on the side of the light-emitting body facing the substrate; The light-emitting substrate further includes a first encapsulation layer, the first encapsulation layer comprising: The first packaging section is located on the side of the light-emitting device away from the substrate; The second package is located on the side of the driving circuit layer away from the substrate, and the orthographic projection of the second package on the substrate is outside the orthographic projection of the light-emitting device on the substrate; A third encapsulation part is at least connected to the first encapsulation part and has a first receiving hole and a second receiving hole, wherein the first electrode is located in the first receiving hole and the second electrode is located in the second receiving hole.

18. The light-emitting substrate according to claim 17, characterized in that, The first encapsulation layer includes a first sub-encapsulation layer and a second sub-encapsulation layer stacked together. The material of the first sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide. The material of the second sub-encapsulation layer is one of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide.

19. The light-emitting substrate according to any one of claims 1 to 8, characterized in that, The light-emitting device is a mini-LED or micro-LED.

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