Multistage time sequence control circuit of interface expansion equipment and interface expansion equipment
By precisely controlling the startup time of the power supply module of the interface expansion device through a multi-level timing control circuit, the problem of unstable startup timing control of the interface chip is solved, and stable connection of the interface expansion device is achieved under different voltage environments.
Patent Information
- Application Number
- CN202520434733.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-12
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2035-03-12
AI Technical Summary
In existing interface expansion devices, the startup timing control of the interface chip is difficult to meet the power-on timing requirements, and it is easily affected by factors such as voltage, temperature and aging, making it impossible to connect multiple external devices at the same time.
A multi-stage timing control circuit is adopted. By combining the timing control circuit and the signal input circuit, the startup time of each power supply module is precisely controlled. The circuit includes a timing output circuit, a timing control circuit, and a signal input circuit. The timing output module and the signal filtering module are used for signal processing and filtering.
It achieves accurate control of multi-level timing output, meets the power-on timing requirements of interface expansion devices, adapts to product needs with different voltage ranges, reduces dependence on RC charging time, and improves the stability and applicability of the equipment.
Smart Images
Figure CN223941363U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of device communication technology, and in particular to a multi-level timing control circuit and interface expansion device for an interface expansion device. Background Technology
[0002] Tablets, computers, especially laptops and other computer devices are usually designed with portability in mind. They are equipped with a limited number of ports such as USB, HDMI, and Ethernet, which cannot meet the needs of connecting multiple external devices at the same time. Therefore, there is a need for interface expansion devices (such as docking stations) that can provide more ports to handle functions such as device expansion, interface conversion, signal conversion, and power distribution.
[0003] In existing technologies, each interface chip is responsible for a specific function, such as the conversion and signal processing of interfaces like USB, HDMI, and Ethernet. Through these chips, computer devices can effectively communicate with various external devices (such as monitors, printers, and network devices). However, in practice, it has been found that the startup sequence of each interface chip is typically controlled by the RC charging circuit time of its own DC power supply. This is difficult to meet the power-on timing requirements of interface expansion devices, and the control time is easily affected by factors such as voltage, temperature, and aging. Therefore, proposing a new timing control scheme for interface expansion devices is particularly important. Utility Model Content
[0004] This invention provides a multi-level timing control circuit and interface expansion device for an interface expansion device, which can accurately control the start-up time of multi-level outputs, thus meeting the power-on timing requirements of the interface expansion device and satisfying the application needs of products with different voltage ranges.
[0005] To address the aforementioned technical problems, the first aspect of this utility model discloses a multi-level timing startup control method for an interface expansion device. The circuit includes a timing output circuit, a timing control circuit, and a signal input circuit, wherein:
[0006] The first input terminal of the timing control circuit is used to receive a first input signal. The second input terminal of the timing control circuit is electrically connected to the output terminal of the signal input circuit. The first output terminal of the timing control circuit is electrically connected to the first input terminal of the timing output circuit and the first input terminal of the signal input circuit. The second input terminal of the signal input circuit is used to receive a second input signal. The second output terminal of the timing control circuit is electrically connected to the second input terminal of the timing output circuit. All output terminals of the timing output circuit are used to electrically connect to the corresponding power supply modules.
[0007] The timing control circuit is used to control each output terminal of the timing output circuit to output an enable signal for the corresponding power supply module according to the first input signal and the second input signal.
[0008] The timing output circuit is used to start the power supply module electrically connected to each output terminal according to the enable signal of each output terminal of the timing output circuit; and is also used to control the second input signal of the signal input circuit according to the enable signal.
[0009] As an optional implementation, in the first aspect of this utility model, the timing output circuit includes a timing output module and a signal filtering module, wherein:
[0010] The first input terminal of the timing output module is electrically connected to the first output terminal of the timing control circuit, the second input terminal of the timing output module is electrically connected to the second output terminal of the timing control circuit, the first output terminal of the timing output module is electrically connected to the first terminal of the signal filtering module and is used to electrically connect to the first power supply module, the second output terminal of the timing output module is used to electrically connect to the corresponding second power supply module, the second terminal of the signal filtering module is used to ground, and each of the first power supply module and the second power supply module is used to electrically connect to an external device.
[0011] The timing output module is used to control the power supply module electrically connected to each output terminal to start according to the enable signal of each output terminal of the timing output circuit, so as to realize the drive control of the external device connected to the power supply module.
[0012] The signal filtering module is used to filter the signal output by the timing output module.
[0013] As an optional implementation, in the first aspect of this utility model, the timing output module includes a first timing output unit and a second timing output unit, wherein:
[0014] The input terminal of the first timing output unit is electrically connected to the first output terminal of the timing control circuit and the first output terminal of the second timing output unit. The output terminal of the first timing output unit is electrically connected to the first terminal of the signal filtering module and is used to electrically connect to the first power supply module. The input terminal of the second timing output unit is electrically connected to the second output terminal of the timing control circuit. The second output terminal of the second timing output unit is used to electrically connect to the second power supply module.
[0015] The first timing output unit is configured to output a first enable signal for the first power supply module, and control the first power supply module to start according to the first enable signal; and control the second input signal according to the first enable signal.
[0016] The second timing output unit is used to output a second enable signal for the second power supply module, and control the second power supply module to start according to the second enable signal.
[0017] As an optional implementation, in the first aspect of this utility model, the first timing output unit includes a first diode and a first resistor, wherein:
[0018] The positive terminal of the first diode is electrically connected to the first output terminal of the timing control circuit, the first output terminal of the second timing output unit, and one end of the first resistor. The negative terminal of the first diode is electrically connected to the other end of the first resistor and the first terminal of the signal filtering module, and is used to electrically connect to the first power supply module.
[0019] As an optional implementation, in the first aspect of this invention, the second timing output unit includes a second diode and a second resistor, wherein:
[0020] One end of the second resistor is electrically connected to the second output terminal of the timing control circuit, and the other end of the second resistor is electrically connected to the positive terminal of the second diode and is used to electrically connect to the second power supply module. The negative terminal of the second diode is electrically connected to the positive terminal of the first diode.
[0021] As an optional implementation, in the first aspect of this utility model, the second timing output unit further includes a protection module for protecting the pin signals of all components included in the second timing output unit, wherein:
[0022] The first end of the protection module is electrically connected to the other end of the second resistor and the positive terminal of the second diode, and the second end of the protection module is used for grounding.
[0023] As an optional implementation, in the first aspect of this utility model, the number of the second timing output units is greater than 1, and each of the second timing output units is connected in parallel with each other.
[0024] As an optional implementation, in the first aspect of this utility model, the signal input circuit includes a third diode and a third resistor, wherein:
[0025] One end of the third resistor is electrically connected to the positive terminal of the third diode and the second input terminal of the timing control circuit, the negative terminal of the third diode is electrically connected to the first output terminal of the timing control circuit and the first input terminal of the timing output circuit, and the other end of the first resistor is used to connect to the second input signal.
[0026] The signal input circuit is used to provide the second input signal to the timing control circuit under the control of the first timing output unit, so as to trigger the timing control circuit to control the second timing output unit to output a second enable signal for the second power supply module.
[0027] As an optional implementation, in the first aspect of this utility model, the circuit further includes a voltage divider module, and the voltage divider module includes a pull-up resistor and a pull-down resistor, wherein one end of the pull-up resistor and one end of the pull-down resistor are electrically connected to the first input terminal of the timing control circuit, the other end of the pull-up resistor is used to connect to the system power signal, and the other end of the pull-down resistor is used to ground.
[0028] The voltage divider module is used to divide the voltage of the system power signal to obtain the first input signal.
[0029] The second aspect of this utility model discloses an interface expansion device, which includes a device body and a multi-level timing control circuit as described in the first aspect of this utility model.
[0030] Implementing this utility model has the following beneficial effects:
[0031] This invention provides a multi-level timing control circuit for an interface expansion device. The circuit includes a timing output circuit, a timing control circuit, and a signal input circuit. The first input terminal of the timing control circuit is used to receive a first input signal. The second input terminal of the timing control circuit is electrically connected to the output terminal of the signal input circuit. The first output terminal of the timing control circuit is electrically connected to both the first input terminal of the timing output circuit and the first input terminal of the signal input circuit. The second input terminal of the signal input circuit is used to receive a second input signal. The second output terminal of the timing control circuit is electrically connected to the second input terminal of the timing output circuit. All output terminals of the timing output circuit are used to electrically connect to corresponding power supply modules. The timing control circuit is used to control each output terminal of the timing output circuit to output an enable signal for a corresponding power supply module based on the first input signal and the second input signal. The timing output circuit is used to start the power supply module electrically connected to each output terminal based on the enable signal of that output terminal. It is also used to control the second input signal of the signal input circuit based on the enable signal. As can be seen, this utility model controls the first and second input signals through a timing control circuit, enabling each output terminal of the timing output circuit to output an enable signal for the corresponding power supply module. Furthermore, the enable signal output by each stage of the timing output circuit controls the startup of the corresponding power supply module. In other words, this solution provides a simple and easy-to-implement circuit that enables startup control of multi-stage timing outputs, accurately controlling the startup time of multiple outputs. This is beneficial for meeting the power-on timing requirements of interface expansion devices, and is not limited by RC charging time. It is also less susceptible to voltage, environmental, and aging factors, and can meet the application needs of products with different voltage ranges. Attached Figure Description
[0032] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0033] Figure 1 This is a schematic diagram of the structure of a multi-level timing control circuit for an interface expansion device disclosed in an embodiment of this utility model;
[0034] Figure 2 This is a schematic diagram of the structure of a timing output circuit disclosed in an embodiment of this utility model;
[0035] Figure 3This is a schematic diagram of the structure of a multi-level timing control circuit for another interface expansion device disclosed in this utility model embodiment;
[0036] Figure 4 This is a timing control diagram disclosed in an embodiment of the present utility model;
[0037] Figure 5 This is a schematic diagram of the structure of a system power supply circuit disclosed in an embodiment of the present utility model;
[0038] Figure 6 This is a schematic diagram of another system power supply circuit disclosed in an embodiment of the present utility model;
[0039] Figure 7 This is a schematic diagram of the power supply circuit disclosed in an embodiment of the present utility model;
[0040] Figure 8 This is a schematic diagram of the structure of a power supply step-down circuit disclosed in an embodiment of this utility model;
[0041] Figure 9 This is a schematic diagram of the structure of an interface expansion device disclosed in an embodiment of this utility model. Detailed Implementation
[0042] To better understand and implement this invention, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.
[0043] It should be noted that, unless otherwise expressly specified and limited, the term "electrical connection" in the specification, claims, and accompanying drawings of this utility model should be interpreted broadly. For example, it can be a fixed electrical connection, a detachable electrical connection, or an integral electrical connection; it can be a mechanical electrical connection, an electrical-electrical connection, or a connection that allows for communication; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two elements or an interaction between two elements. Furthermore, the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish different objects, not to describe a specific order. The terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.
[0044] Example 1
[0045] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of a multi-level timing control circuit for an interface expansion device disclosed in an embodiment of this utility model. Wherein, Figure 1 The multi-level timing control circuit of the described interface expansion device can be applied to any electronic product that requires multi-level timing start-up control (such as docking stations, USB hubs, etc.), and this utility model embodiment is not limited thereto. Figure 1 As shown, the multi-level timing control circuit of this interface expansion device includes a timing output circuit 101, a timing control circuit 102, and a signal input circuit 103, wherein:
[0046] The first input terminal of the timing control circuit 102 is used to receive a first input signal. The second input terminal of the timing control circuit 102 is electrically connected to the output terminal of the signal input circuit 103. The first output terminal of the timing control circuit 102 is electrically connected to the first input terminal of the timing output circuit 101 and the first input terminal of the signal input circuit 103. The second input terminal of the signal input circuit 103 is used to receive a second input signal. The second output terminal of the timing control circuit 102 is electrically connected to the second input terminal of the timing output circuit 101. All output terminals of the timing output circuit 101 are used to electrically connect to the corresponding power supply modules. The timing control circuit 102 is used to control each output terminal of the timing output circuit 101 to output an enable signal for the corresponding power supply module according to the first and second input signals. The timing output circuit 101 is used to start the power supply module electrically connected to each output terminal according to the enable signal of each output terminal. It is also used to control the second input signal of the signal input circuit 103 according to the enable signal. Specifically, the timing control circuit 102, based on the first input signal, controls the first-stage timing output terminal of the timing output circuit 101 to output a first-stage enable signal, and triggers the timing output circuit 101 to control the second input signal of the signal input circuit 103 based on the first-stage enable signal. Subsequently, the timing control circuit 102, based on the second input signal controlled by the timing output circuit 101, controls the other timing output terminals of the timing output circuit 101 to output corresponding enable signals. When there is no signal input or the input signal voltage is low at the first input terminal of the timing control circuit 102, the timing output circuit 101 does not output an enable signal. Each enable signal is used to control the corresponding power supply module to start, so that the power supply module provides the power voltage required for the operation of the corresponding working module.
[0047] It is evident that implementation Figure 1The multi-level timing control circuit of the described interface expansion device controls the first and second input signals through the timing control circuit 102, so that each output terminal of the timing output circuit 101 outputs an enable signal for the corresponding power supply module. The enable signal output by each stage of the timing output circuit 101 controls the start-up of the corresponding power supply module. In other words, this solution provides a simple and easy-to-implement circuit that can achieve start-up control of multi-level timing outputs, accurately control the start-up time of multi-level outputs, which is beneficial to meet the power-on timing requirements of the interface expansion device. It is not limited by RC charging time and is not easily affected by voltage, environment, aging and other factors, and can meet the application needs of products with different voltage ranges.
[0048] In an optional embodiment, such as Figure 2 As shown, Figure 2 This is a schematic diagram of a timing output circuit disclosed in an embodiment of the present invention, as shown below. Figure 2 As shown, where:
[0049] The timing output circuit 101 includes a timing output module 1011 and a signal filtering module 1012. The first input terminal of the timing output module 1011 is electrically connected to the first output terminal of the timing control circuit 102, and the second input terminal of the timing output module 1011 is electrically connected to the second output terminal of the timing control circuit 102. The first output terminal of the timing output module 1011 is electrically connected to the first terminal of the signal filtering module 1012 and is used to electrically connect to a first power supply module. The second output terminal of the timing output module 1011 is used to electrically connect to a corresponding second power supply module. The second terminal of the signal filtering module 1012 is grounded. Each power supply module in the first and second power supply modules is used to electrically connect to an external device. The timing output module 1011 controls the power supply module electrically connected to each output terminal to start up according to the enable signal of that output terminal, thereby achieving drive control of the external device connected to that power supply module. The signal filtering module 1012 filters the signal output by the timing output module 1011. The timing output module 1011, under the control of the timing control circuit 102, enables the startup control of the power supply module connected to each stage of the timing output module 1011. This allows for accurate control of the power supply module startup time. Compared to traditional solutions that use RC charging time for control, this solution is not limited by RC charging time and is less susceptible to factors such as voltage, environment, and aging. Furthermore, accurate control of the startup time of each power supply module allows for precise drive control of each external device, meeting the needs of interface expansion devices that can simultaneously connect multiple external devices. Simultaneously, the signal filtering module 1012 filters the signal from the timing output module 1011, effectively removing high-frequency noise components and making the output signal smoother. When the signal changes rapidly, the capacitor can absorb or release charge, thereby slowing down the rate of signal change.
[0050] In this optional embodiment, as an optional implementation method, such as Figure 2As shown, the timing output module 1011 includes a first timing output unit 10111 and a second timing output unit 10112. The input terminal of the first timing output unit 10111 is electrically connected to the first output terminal of the timing control circuit 102 and the first output terminal of the second timing output unit 10112. The output terminal of the first timing output unit 10111 is electrically connected to the first terminal of the signal filtering module 1012 and is used to electrically connect to the first power supply module. The input terminal of the second timing output unit 10112 is electrically connected to the second output terminal of the timing control circuit 102, and the second output terminal of the second timing output unit 10112 is used to electrically connect to the second power supply module. The first timing output unit 10111 outputs a first enable signal for the first power supply module and controls the first power supply module to start according to the first enable signal; and controls a second input signal according to the first enable signal. The second timing output unit 10112 outputs a second enable signal for the second power supply module and controls the second power supply module to start according to the second enable signal. Specifically, the first timing output unit 10111, under the control of the timing control circuit 102 on the first input signal, outputs a first enable signal for the first power supply module and controls the first power supply module to start according to the first enable signal, serving as a first-level timing control that can accurately control the start-up time of the first power supply module. Simultaneously, the first enable signal output by the first timing output unit 10111 controls the second input signal of the signal input circuit 103, serving as a second-level timing control. The second timing output unit 10112, under the control of the timing control circuit 102 on the second input signal, outputs a second enable signal for the second power supply module and controls the second power supply module to start according to the second enable signal, serving as a third-level timing control that can accurately control the start-up time of the second power supply module. Furthermore, the control of the second input signal by the enable signal output by the first timing output unit 10111 provides the timing control circuit 102 with an input signal for the second timing output unit 10112, facilitating the acquisition of the second enable signal output by the second timing output unit 10112.
[0051] In this optional implementation, alternatively, such as Figure 3 As shown, Figure 3 This is a schematic diagram of the structure of a multi-level timing control circuit for another interface expansion device disclosed in this utility model embodiment, as shown below. Figure 3 As shown, where:
[0052] The first timing output unit 10111 includes a first diode D24 and a first resistor R457. The positive terminal of the first diode D24 is electrically connected to the first output terminal of the timing control circuit 102, the first output terminal of the second timing output unit 10112, and one end of the first resistor R457. The negative terminal of the first diode D24 is electrically connected to the other end of the first resistor R457 and the first terminal of the signal filtering module 1012, and is also used to electrically connect to the first power supply module. This parallel connection of the first diode D24 and the first resistor R457 in the first timing output unit 10111 achieves input control output, improving the accuracy and stability of the timing control circuit 102's control over the first timing output unit 10111.
[0053] In this optional implementation, alternatively, such as Figure 3 As shown, the second timing output unit 10112 includes a second diode and a second resistor. One end of the second resistor is electrically connected to the second output terminal of the timing control circuit 102, and the other end of the second resistor is electrically connected to the positive terminal of the second diode and used to electrically connect to the second power supply module. The negative terminal of the second diode is electrically connected to the positive terminal of the first diode D24. Thus, by using the parallel connection of the second diode and the second resistor in the second timing output unit 10112 to achieve input control output, the accuracy and stability of the timing control circuit 102's control over the second timing output unit 10112 are improved.
[0054] In this optional implementation, alternatively, such as Figure 3 As shown, the second timing output unit 10112 also includes a protection module for protecting the pin signals of all components included in the second timing output unit 10112. The first terminal of the protection module is electrically connected to the other end of the second resistor and the positive terminal of the second diode, and the second terminal of the protection module is grounded. As shown... Figure 3 As shown, the protection module may include a first capacitor. One end of the first capacitor is electrically connected to the other end of the second resistor and the positive terminal of the second diode. The other end of the first capacitor is used for grounding. In this way, by connecting a capacitor to ground in the second timing output unit 10112, it can be ensured that the pin signal of the second timing output unit 10112 does not change abruptly, so as not to affect the startup of the next stage power supply.
[0055] In this optional implementation, the number of second timing output units 10112 is greater than 1, and each second timing output unit 10112 is connected in parallel with each other, such as... Figure 3 As shown, Figure 3The multi-level timing control circuit of the described interface expansion device takes three second timing output units 10112 as an example, wherein each second timing output unit 10112 is used to electrically connect to a corresponding second power supply module. Specifically, the second diode in the second timing output unit 10112 includes, for example,... Figure 3 As shown in D22, D25, and D26, the second resistor in the second timing output unit 10112 includes, for example, the second resistors. Figure 3 As shown in R461, R481, and R473, the first capacitor in the protection module of the second timing output unit 10112 includes, as follows: Figure 3 C396, C395, and C392 are shown. In this way, the second enable signal output by each second timing output unit 10112 can achieve accurate control of the start-up time of each second power supply module. Furthermore, by providing a circuit that can select multiple second timing output units 10112, it is beneficial to select an appropriate number of second timing output units 10112 according to the actual situation of the components, thereby improving the applicability of the circuit.
[0056] In this optional embodiment, optionally, such as Figure 3 As shown, the signal filtering module 1012 may include a fourth resistor R451 and a second capacitor C367. One end of the fourth resistor R451 is electrically connected to the cathode of the first diode D24 and the other end of the first resistor R457. The other end of the fourth resistor R451 is electrically connected to one end of the second capacitor C367, and the other end of the second capacitor C367 is grounded. Thus, the RC low-pass filter composed of the fourth resistor R451 and the second capacitor C367 can filter the enable signal in the timing output circuit 101, improving the stability and accuracy of the output signal of the timing output circuit 101.
[0057] In this optional embodiment, optionally, such as Figure 3As shown, the signal input circuit 103 includes a third diode D23 and a third resistor R479. One end of the third resistor R479 is electrically connected to the positive terminal of the third diode D23 and the second input terminal of the timing control circuit 102, and the negative terminal of the third diode D23 is electrically connected to the first output terminal of the timing control circuit 102 and the first input terminal of the timing output circuit 101. The other end of the first resistor R457 is used to receive a second input signal. The signal input circuit 103, under the control of the first timing output unit 10111, provides the second input signal to the timing control circuit 102 to trigger the timing control circuit 102 to control the second timing output unit 10112 to output a second enable signal for the second power supply module. The third diode D23 can be a Schottky diode, such as IN5819W. In this way, by using the third resistor R479 and the third diode D23 in conjunction with the timing control circuit 102 during the second-level timing control, the first timing output unit 10111 can control the second input signal, and the timing control circuit 102 can also control the second timing output unit 10112 through the second input signal. At the same time, by setting the third diode D23, signal backflow can be prevented.
[0058] In another alternative embodiment, optionally, such as Figure 3 As shown, the multi-level timing control circuit of this interface expansion device also includes a voltage divider module 104, which includes a pull-up resistor R477 and a pull-down resistor R452. One end of the pull-up resistor R477 and one end of the pull-down resistor R452 are electrically connected to the first input terminal of the timing control circuit 102. The other end of the pull-up resistor R477 is used to connect to the system power signal, and the other end of the pull-down resistor R452 is used to ground. The voltage divider module is used to divide the voltage of the system power signal to obtain the first input signal. This resistor voltage divider method can effectively prevent excessive input voltage from damaging the buffer; at the same time, the pull-down resistor R452 can remain normally closed when there is no signal input at the input terminal, and can provide a release path in case of over-voltage, ensuring circuit safety.
[0059] In yet another alternative embodiment, optionally, such as Figure 3 As shown, the timing control circuit 102 includes dual Schmitt triggers (such as...). Figure 3 U43 shown) and its peripheral circuits (such as Figure 3The circuit consists of the third capacitor C384, the fourth capacitor C406, the fifth capacitor C393, and the fifth resistor R455. The first input terminal of the dual-channel Schmitt trigger is used to receive the first input signal. The second input terminal of the dual-channel Schmitt trigger is electrically connected to one end of the third resistor R479 in the signal input circuit 103. The first output terminal of the dual-channel Schmitt trigger is electrically connected to the anode of the first diode D24 in the timing output circuit 101. The second output terminal of the dual-channel Schmitt trigger is electrically connected to one end of the second resistor in the timing output circuit 101. The power supply terminal of the dual-channel Schmitt trigger is used to electrically connect to the power supply (e.g., a power source). Figure 3 As shown in the diagram (3V3_SYS), the ground terminal of the dual-channel Schmitt trigger is used for grounding. The first input of the dual-channel Schmitt trigger controls its first output, and the second input controls its second output. The dual-channel Schmitt trigger is primarily used for signal processing and circuit protection. It possesses the characteristics of a Schmitt trigger, providing a clear and accurate output signal by eliminating noise and interference, enhancing the stability and reliability of the input signal. Simultaneously, it prevents circuit damage from overvoltage and overcurrent, protecting the circuit from interference and damage, improving the performance and reliability of electronic equipment. Furthermore, this trigger features high gain and low distortion, making it suitable for high-speed signal processing and low-power applications.
[0060] in, Figure 3 The described multi-level timing start control circuit takes an example containing three second timing output units 10112. Specifically, the first input signal (such as...) Figure 3 The input DL_PWREN shown is connected to the first input of the dual Schmitt trigger (as shown). Figure 3 As shown in 2A), the first output terminal of the dual Schmitt trigger (as shown in 2A) is made to... Figure 3 As shown in 2Y), the first enable signal (e.g., 2Y) is output through the first timing output unit 10111. Figure 3 The DL_OV8_EN shown above implements the first-level control of the multi-level timing start control circuit; then the first enable signal (such as...) is applied. Figure 3 The second input signal (such as DL_OV8_EN) shown is connected through the first timing output unit 10111 and the diode unidirectional conductivity control signal input circuit 103 of the signal input circuit 103. Figure 3 As shown in 0V8_PGOD), it realizes the second-level control of the multi-level timing start control circuit; then the second input signal is input to the second input terminal of the dual Schmitt trigger (e.g., Figure 3 As shown in 1A), the second output terminal of the dual Schmitt trigger (as shown in 1A) is made to... Figure 3 As shown in Figure 1Y), a second enable signal (such as...) is output through the second timing output unit 10112. Figure 3The DL_3V3_EN, DL_1V8_EN, and DL_1V1_EN shown demonstrate a three-level control system for a multi-level timing-based start-up control circuit. For example,... Figure 4 As shown, Figure 4 This is a timing control diagram disclosed in an embodiment of the present utility model, wherein power is applied at time T0, at which time the first input signal (such as...) Figure 4 The voltage of DL_PWREN (shown) gradually increases. When the voltage of the first input signal reaches the upper threshold (Vth+) of the dual Schmitt trigger (i.e., time T1 in the figure below), the first enable signal of the first timing output unit 10111 (such as...) is activated. Figure 4 The DL_0V8_EN signal (as shown) begins to output voltage to provide a 0.8V system power supply. When the voltage of the first enable signal gradually rises to a stable level, it will drive the second input signal (such as...) Figure 4 As shown in the figure, when the voltage of the second input signal (0V8_PGOD) rises, and the voltage of the second input signal reaches the upper threshold of the dual Schmitt trigger (i.e., time T2 in the figure below), the second enable signal of the second timing output unit 10112 (such as...) is activated. Figure 4 The DL_3V3_EN, DL_1V8_EN and DL_1V1_EN shown start output voltages to provide 3.3V, 1.8V and 1.1V system power supply circuits respectively. This enables delayed start of the first enable signal and the second enable signal, and enables simultaneous start and stop of the second enable signal.
[0061] For example, such as Figure 5 As shown, Figure 5 This is a schematic diagram of a system power supply circuit disclosed in an embodiment of the present utility model, wherein, Figure 5 The system power supply circuit described uses 3.3V and 1.8V, and the outputs of the 3.3V and 1.8V system power supply circuits are used for system module signal processing; such as Figure 6 As shown, Figure 6 This is a schematic diagram of another system power supply circuit disclosed in an embodiment of the present invention, wherein, Figure 6 The system power supply circuit described is 0.8V, and the output of the 0.8V system power supply circuit is used for system module signal processing; such as Figure 7 As shown, Figure 7 This is a schematic diagram of a power supply circuit disclosed in an embodiment of the present utility model, wherein, Figure 7The described power supply circuit includes multiple power supply modules with different supply voltages (e.g., 1.8V, 1.1V, and 0.8V), and each power supply module provides its output voltage to the corresponding module through the timing control of the multi-level timing control circuit of the interface expansion device provided in this embodiment of the present invention, thereby supplying the power required for the operation of each module; such as Figure 8 As shown, Figure 8 This is a schematic diagram of a power supply step-down circuit disclosed in an embodiment of this utility model. Figure 8 The described power supply step-down circuit is used to convert the input 21V voltage to the 3.3V or 5V power supply voltage required by the system via an adapter. Figures 3-8 All of its circuit structures enable the connection and use between computer devices (such as computers) and various external devices (such as monitors, printers, network devices, etc.) through interface expansion devices (such as docking stations).
[0062] The working principle of the multi-level timing control circuit of the interface expansion device in this embodiment is as follows:
[0063] In this embodiment of the present invention, when power is applied at time T0, the system power signal (such as...) Figure 3 The SYS_3V3_PG signal shown is divided by a voltage divider module (such as pull-up resistor R477 and pull-down resistor R452) to obtain the first input signal (such as...). Figure 3 As shown in DL_PWREN), the voltage of the first input signal gradually increases. When the voltage reaches the upper threshold of the first input terminal of the timing control circuit 102 (such as the 2A terminal of a dual Schmitt trigger), it is recorded as time T1. At this time, the first enable signal of the first timing output unit 10111 (such as...) Figure 3 The output voltage (DL_0V8_EN) shown in the diagram starts to output voltage. That is, by inputting the first input signal to the timing control circuit 102, the first timing output unit 10111 is controlled to output a first enable signal to start the 0.8V power supply module, realizing first-level timing control. When the voltage of the first enable signal rises to a gradually stable state, the unidirectional conductivity of the diodes in the first timing output unit 10111 and the signal input circuit 103 drives the second input signal (such as... Figure 3 The voltage of the 0V8_PGOD signal rises to achieve secondary timing control. When the voltage of the second input signal reaches the upper threshold of the second input terminal (e.g., the 1A terminal of the dual Schmitt trigger) of the timing control circuit 102, it is recorded as time T2. At this time, the second enable signal of the second timing output unit 10112 (e.g., the upper threshold of the second input terminal) is... Figure 3The DL_3V3_EN, DL_1V8_EN, and DL_1V1_EN shown start output voltage. That is, by inputting the second input signal to the timing control circuit 102, all the second timing output units 10112 are controlled to output the second enable signal for starting the 3.3V power supply module, the 1.8V power supply module, and the 1.1V power supply module, respectively, to achieve three-level timing control and enable simultaneous start and stop of the 3.3V power supply module, the 1.8V power supply module, and the 1.1V power supply module. As can be seen, by controlling the first and second input signals through the timing control circuit 102 of this solution, each output terminal of the timing output circuit 101 outputs an enable signal for the corresponding power supply module. Furthermore, the enable signal output by each stage of the timing output circuit 101 controls the startup of the corresponding power supply module. In other words, this solution provides a simple and easy-to-implement circuit that can achieve startup control of multi-stage timing outputs, accurately control the startup time of multi-stage outputs, which is beneficial to meeting the power-on timing requirements of interface expansion devices. Moreover, it is not limited by RC charging time and is not easily affected by factors such as voltage, environment, and aging, thus meeting the application needs of products with different voltage ranges.
[0064] Example 2
[0065] Please see Figure 9 , Figure 9 This is a schematic diagram of the structure of an interface expansion device disclosed in an embodiment of this utility model. Wherein, Figure 9 The described interface expansion device includes a multi-level timing control circuit as described in Embodiment 1, and the interface expansion device includes, but is not limited to, any electronic product requiring timing control, such as an expansion dock or USB hub; this embodiment of the present invention does not limit the scope of the application. It should be noted that for a detailed description of the multi-level timing control circuit of the interface expansion device, please refer to the specific description of the relevant content in Embodiment 1; this embodiment will not repeat it.
[0066] It is evident that implementation Figure 9 The described interface expansion device can control the first and second input signals through the timing control circuit 102, so that each output terminal of the timing output circuit 101 outputs an enable signal for the corresponding power supply module. The enable signal output by each stage of the timing output circuit 101 controls the start-up of the corresponding power supply module. In other words, this solution provides a simple and easy-to-implement circuit that can achieve start-up control of multi-stage timing outputs. It can accurately control the start-up time of multi-stage outputs, which is beneficial to meeting the power-on timing requirements of the interface expansion device. It is not limited by RC charging time and is not easily affected by voltage, environment, aging and other factors, and can meet the application needs of products with different voltage ranges.
[0067] The above provides a detailed description of a multi-level timing control circuit and interface expansion device for an interface expansion device disclosed in the embodiments of this utility model. Specific embodiments have been used to illustrate the principles and implementation methods of this utility model. However, the above preferred embodiments are not intended to limit this utility model. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this utility model. At the same time, for those skilled in the art, based on the ideas of this utility model, there will be changes in the specific implementation methods and application scope without departing from the spirit and scope of this utility model. Therefore, the protection scope of this utility model is determined by the scope defined in the claims.
Claims
1. A multi-level timing control circuit for an interface expansion device, characterized in that, The circuit includes a timing output circuit, a timing control circuit, and a signal input circuit, wherein: The first input terminal of the timing control circuit is used to receive a first input signal. The second input terminal of the timing control circuit is electrically connected to the output terminal of the signal input circuit. The first output terminal of the timing control circuit is electrically connected to the first input terminal of the timing output circuit and the first input terminal of the signal input circuit. The second input terminal of the signal input circuit is used to receive a second input signal. The second output terminal of the timing control circuit is electrically connected to the second input terminal of the timing output circuit. All output terminals of the timing output circuit are used to electrically connect to the corresponding power supply modules. The timing control circuit is used to control each output terminal of the timing output circuit to output an enable signal for the corresponding power supply module according to the first input signal and the second input signal. The timing output circuit is used to start the power supply module electrically connected to each output terminal according to the enable signal of each output terminal of the timing output circuit; and is also used to control the second input signal of the signal input circuit according to the enable signal.
2. The multi-level timing control circuit of the interface expansion device according to claim 1, characterized in that, The timing output circuit includes a timing output module and a signal filtering module, wherein: The first input terminal of the timing output module is electrically connected to the first output terminal of the timing control circuit, the second input terminal of the timing output module is electrically connected to the second output terminal of the timing control circuit, the first output terminal of the timing output module is electrically connected to the first terminal of the signal filtering module and is used to electrically connect to the first power supply module, the second output terminal of the timing output module is used to electrically connect to the corresponding second power supply module, the second terminal of the signal filtering module is used to ground, and each of the first power supply module and the second power supply module is used to electrically connect to an external device. The timing output module is used to control the power supply module electrically connected to each output terminal to start according to the enable signal of each output terminal of the timing output circuit, so as to realize the drive control of the external device connected to the power supply module. The signal filtering module is used to filter the signal output by the timing output module.
3. The multi-level timing control circuit of the interface expansion device according to claim 2, characterized in that, The timing output module includes a first timing output unit and a second timing output unit, wherein: The input terminal of the first timing output unit is electrically connected to the first output terminal of the timing control circuit and the first output terminal of the second timing output unit. The output terminal of the first timing output unit is electrically connected to the first terminal of the signal filtering module and is used to electrically connect to the first power supply module. The input terminal of the second timing output unit is electrically connected to the second output terminal of the timing control circuit. The second output terminal of the second timing output unit is used to electrically connect to the second power supply module. The first timing output unit is configured to output a first enable signal for the first power supply module, and control the first power supply module to start according to the first enable signal; and control the second input signal according to the first enable signal. The second timing output unit is used to output a second enable signal for the second power supply module, and control the second power supply module to start according to the second enable signal.
4. The multi-level timing control circuit of the interface expansion device according to claim 3, characterized in that, The first timing output unit includes a first diode and a first resistor, wherein: The positive terminal of the first diode is electrically connected to the first output terminal of the timing control circuit, the first output terminal of the second timing output unit, and one end of the first resistor. The negative terminal of the first diode is electrically connected to the other end of the first resistor and the first terminal of the signal filtering module, and is used to electrically connect to the first power supply module.
5. The multi-level timing control circuit of the interface expansion device according to claim 4, characterized in that, The second timing output unit includes a second diode and a second resistor, wherein: One end of the second resistor is electrically connected to the second output terminal of the timing control circuit, and the other end of the second resistor is electrically connected to the positive terminal of the second diode and is used to electrically connect to the second power supply module. The negative terminal of the second diode is electrically connected to the positive terminal of the first diode.
6. The multi-level timing control circuit of the interface expansion device according to claim 5, characterized in that, The second timing output unit further includes a protection module for protecting the pin signals of all components contained in the second timing output unit, wherein: The first end of the protection module is electrically connected to the other end of the second resistor and the positive terminal of the second diode, and the second end of the protection module is used for grounding.
7. The multi-level timing control circuit of the interface expansion device according to claim 6, characterized in that, The number of the second timing output units is greater than 1, and each of the second timing output units is connected in parallel with each other.
8. The multi-level timing control circuit of the interface expansion device according to any one of claims 4-7, characterized in that, The signal input circuit includes a third diode and a third resistor, wherein: One end of the third resistor is electrically connected to the positive terminal of the third diode and the second input terminal of the timing control circuit, the negative terminal of the third diode is electrically connected to the first output terminal of the timing control circuit and the first input terminal of the timing output circuit, and the other end of the first resistor is used to connect to the second input signal. The signal input circuit is used to provide the second input signal to the timing control circuit under the control of the first timing output unit, so as to trigger the timing control circuit to control the second timing output unit to output a second enable signal for the second power supply module.
9. The multi-level timing control circuit of the interface expansion device according to any one of claims 1, 2, 3, 4, 5 and 7, characterized in that, The circuit also includes a voltage divider module, which includes a pull-up resistor and a pull-down resistor. One end of the pull-up resistor and one end of the pull-down resistor are electrically connected to the first input terminal of the timing control circuit. The other end of the pull-up resistor is used to connect to the system power signal, and the other end of the pull-down resistor is used to ground. The voltage divider module is used to divide the voltage of the system power signal to obtain the first input signal.
10. An interface expansion device, the interface expansion device comprising a device body, characterized in that, The interface expansion device further includes a multi-level timing control circuit as described in any one of claims 1-9.