Switching equipment for area array detector, slip ring and upper computer

Abstract

The utility model relates to switching equipment for an area array detector, a slip ring and an upper computer, which belongs to the technical field of CT (computed tomography) equipment electronics and electrical, and comprises a first switching plate arranged on a slip ring rotor and used for adapting to the connection of the area array detector and the slip ring, and a second switching plate arranged on a slip ring stator and used for adapting to the connection of the slip ring and the upper computer, on the premise of not changing the structures of the existing area array detector, the slip ring and the upper computer, the structure adaptation and switching structure of the area array detector, the slip ring and the upper computer is realized based on the first switching plate and the second switching plate, and the problem of universal structure adaptation and switching between the area array detector and the slip ring in the prior art is solved.

Description

Technical Field

[0001] This utility model relates to the field of electronic and electrical technology of CT equipment, and in particular to a converter device for area array detectors, slip rings and host computers. Background Technology

[0002] To meet the growing demand for CT inspection in the fields of large equipment, castings, and components, the industry has been trying to combine traditional CT slip rings with industrial area array detectors so that large equipment, castings, and components can complete image acquisition by through-type scanning without rotation.

[0003] However, based on their different working principles and scenarios, traditional CT slip rings and area array detectors have issues with electronic and electrical structural compatibility and the transition to the host computer. Furthermore, due to the large number of area array detector models, the development cost of traditional CT slip rings is high. Customizing designs by modifying existing area array detectors or slip rings not only incurs huge R&D costs but also fails to meet the requirements for universality. Utility Model Content

[0004] Based on the above analysis, this utility model aims to provide a switching device for area array detectors, slip rings and host computers, so as to solve the problem of universal structural adaptation and switching between existing area array detectors and slip rings.

[0005] The objective of this utility model is mainly achieved through the following technical solutions:

[0006] A converter device for a planar array detector, a slip ring, and a host computer, the device comprising a first converter plate and a second converter plate, wherein,

[0007] The first adapter plate is disposed on the rotor of the slip ring, with one end connected to the slip ring and the other end connected to the area array detector;

[0008] The second adapter plate is disposed on the stator of the slip ring, with one end connected to the slip ring and the other end connected to the host computer.

[0009] The beneficial effects of the above scheme are as follows: the two ends of the first adapter plate set on the slip ring rotor are connected to the slip ring and the area array detector, respectively; the two ends of the second adapter plate set on the slip ring stator are connected to the slip ring and the host computer, respectively; the first adapter plate and the second adapter plate are connected through the slip ring, thereby realizing a structure that connects the area array detector, the slip ring and the host computer based on the first adapter plate and the second adapter plate. Compared with the prior art, it is easy to customize, has low deployment difficulty, and can quickly realize the structural adaptation between different area array detectors, slip rings and host computers, and has good versatility.

[0010] Based on a further improvement of the above scheme, the slip ring includes an optical fiber receiver; the area array detector includes an image output interface;

[0011] The first adapter board has a first optical communication circuit located on the lower left edge of the front side and a second optical communication circuit located on the upper edge center-right position. The first adapter board has an FPGA located on the back side.

[0012] The input terminal of the first optical communication circuit of the first adapter board is connected to the image output interface of the array detector, and the output terminal is connected to the IO port of the FPGA of the first adapter board.

[0013] The output of the second optical communication circuit on the first adapter board is connected to the optical fiber receiver, and the input is connected to the I / O port of the FPGA on the first adapter board.

[0014] The beneficial effect of the above-mentioned further improvement scheme is that the output end of the array detector achieves structural adaptation with the slip ring fiber optic receiver through the first adapter plate.

[0015] Based on further improvements to the above scheme, the slip ring also includes a first multiplexed communication circuit, a second multiplexed communication circuit, a position encoder, and a zero-position encoder.

[0016] A Phoenix Contact interface is provided above the first optical communication circuit on the first adapter board;

[0017] The first adapter board has a first differential single-ended conversion circuit, a second differential single-ended conversion circuit, and a third differential single-ended conversion circuit arranged vertically from top to bottom on the right side of the Phoenix interface.

[0018] One end of the first differential single-ended conversion circuit of the first adapter board is connected to the first multiplexed communication circuit through the Phoenix Contact interface of the first adapter board, and the other end is connected to the I / O port of the FPGA of the first adapter board.

[0019] The input terminal of the second differential single-ended conversion circuit of the first adapter board is connected to the zero-position encoder through the Phoenix Contact interface of the first adapter board, and the output terminal is connected to the IO port of the FPGA of the first adapter board.

[0020] The input of the third differential single-ended conversion circuit of the first adapter board is connected to the IO port of the position encoder through the Phoenix Contact interface of the first adapter board, the first multiplexer communication circuit, and the second multiplexer communication circuit. The output of the circuit is connected to the IO port of the FPGA of the first adapter board.

[0021] The beneficial effects of the above-mentioned further improvement scheme are: the use of Phoenix Contact interface realizes a more reasonable and compact circuit layout for the multi-channel differential single-ended conversion circuit, making the first adapter board easier to expand and customize for different array detectors and slip ring structures, and better adapting and connecting with the slip ring first multi-channel multiplexed communication circuit.

[0022] Based on further improvements to the above scheme, the area array detector also includes a command receiving interface; a LEMO interface is also provided on the right side of the upper edge of the first adapter board, and a trigger level conversion circuit is provided below the LEMO interface, wherein...

[0023] The input terminal of the trigger level conversion circuit of the first adapter board is connected to the IO port of the FPGA of the first adapter board, and the output terminal is connected to the command receiving interface of the array detector through the LEMO interface.

[0024] The beneficial effects of the above-mentioned further improvement scheme are: it can better adapt to the command interface structure of the array detector, and the use of the LEMO interface is not only small in size, but also easy to plug and unplug.

[0025] Based on a further improvement to the above solution, a power output interface is provided on the upper left right side of the front of the first adapter board, and a power output control circuit is provided below the power output interface.

[0026] The input terminal of the power output control circuit of the first adapter board is connected to the IO port of the FPGA of the first adapter board, and the output terminal is electrically connected to the area array detector through the power output interface.

[0027] The beneficial effect of the above-mentioned further improvement scheme is that it provides a suitable power supply connection structure for better control of the array detector.

[0028] Based on a further improvement of the above scheme, the slip ring also includes an optical fiber transmitter;

[0029] The second adapter board has a first optical communication circuit located on the lower left edge of the front side and a second optical communication circuit located on the upper right edge of the center. The second adapter board has an FPGA located on the back side.

[0030] The input terminal of the first optical communication circuit of the second adapter board is connected to the optical fiber transmitter, and the output terminal is connected to the IO port of the FPGA of the second adapter board.

[0031] The input terminal of the second optical communication circuit of the second adapter board is connected to the IO port of the FPGA of the second adapter board, and the output terminal is connected to the host computer.

[0032] The beneficial effect of the above-mentioned further improvement scheme is that it provides an adaptive connection structure for establishing an optical communication channel between the host computer and the slip ring fiber optic transmitter through the second adapter board.

[0033] Based on the further improvement of the above scheme, an electrical communication circuit is provided at the center-left position of the upper edge of the front of the second adapter board; the input end of the electrical communication circuit of the second adapter board is connected to the host computer, and the output end is connected to the IO port of the FPGA of the second adapter board.

[0034] The beneficial effect of the above-mentioned further improvement scheme is that it can adapt to the host computer's communication interface and establish a connection.

[0035] Based on further improvements to the above scheme, a Phoenix Contact interface is provided on the upper left of the first optical communication circuit of the second adapter board, and a differential-to-single-ended conversion circuit is provided on the right side of the Phoenix Contact interface of the second adapter board.

[0036] One end of the differential single-ended conversion circuit of the second adapter board is connected to the second multiplex communication circuit of the slip ring, and the other end is connected to the FPGA of the second adapter board.

[0037] The beneficial effects of the above-mentioned further improvement scheme are: the adoption of Phoenix Contact interface realizes a more reasonable and compact circuit layout of differential single-ended conversion circuit, making the second adapter board easier to expand and customize for different host computers and slip ring structures, and better adapting and connecting with the slip ring second multiplexed communication circuit.

[0038] Based on a further improvement of the above scheme, the slip ring includes an AC / DC conversion circuit;

[0039] A power input interface is located directly above the Phoenix Contact interface on the first adapter board. A power conversion circuit is located above the power input interface on the first adapter board.

[0040] The input terminal of the first adapter board power conversion circuit is connected to the output terminal of the slip ring AC / DC conversion circuit through the first adapter board power input interface. The output terminal is electrically connected to the first adapter board FPGA, the first adapter board first optical communication circuit, the first adapter board second optical communication circuit, the first adapter board first differential single-ended conversion circuit, the first adapter board second differential single-ended conversion circuit, the first adapter board third differential single-ended conversion circuit, the first adapter board trigger level conversion circuit, and the first adapter board power output control circuit.

[0041] The beneficial effect of the above-mentioned further improvement scheme is that it realizes the adaptation connection of the power supply structure between the first adapter board and the slip ring AC-DC conversion circuit, so that each circuit on the first adapter board is powered through the slip ring.

[0042] Based on a further improvement to the above solution, a power input interface is provided directly above the Phoenix Contact interface on the second adapter board, and a power conversion circuit is provided above the power input interface on the first adapter board.

[0043] The input terminal of the second adapter board power conversion circuit is connected to an external DC power supply through the power input interface of the second adapter board, and the output terminal is electrically connected to the second adapter board FPGA, the second adapter board optical communication circuit, the second adapter board electrical communication circuit, and the second adapter board differential single-ended conversion circuit, respectively.

[0044] The beneficial effect of the above-mentioned further improvement scheme is that it realizes the power supply connection structure between the second adapter board and the external DC power supply, so that each circuit on the second adapter board is powered by the external DC power supply.

[0045] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages will become apparent from the description or be learned by practicing this invention. The objectives and other advantages of this invention can be realized and obtained from the details specifically pointed out in the text and accompanying drawings. Attached Figure Description

[0046] The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0047] Figure 1 This is a schematic diagram of the structure of the adapter device according to an embodiment of the present utility model.

[0048] Figure 2 This is a schematic diagram of the front structure of the first adapter plate of this utility model.

[0049] Figure 3 This is a schematic diagram of the front structure of the second adapter plate of this utility model.

[0050] Figure 4 This is a schematic diagram of the back structure of the first and second adapter plates of this utility model. Detailed Implementation

[0051] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which constitute a part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0052] A specific embodiment of this utility model discloses a switching device for an area array detector, a slip ring, and a host computer, such as... Figure 1 As shown. The device includes a first adapter plate and a second adapter plate, wherein,

[0053] The first adapter plate is disposed on the rotor of the slip ring, with one end connected to the slip ring and the other end connected to the area array detector;

[0054] The second adapter plate is disposed on the stator of the slip ring, with one end connected to the slip ring and the other end connected to the host computer.

[0055] To enable the area array detector, slip ring, and host computer to be combined for industrial CT scanning, the area array detector needs to be integrated into the slip ring rotor to allow it to rotate synchronously with the rotor. However, since existing area array detectors and slip rings originate from different application scenarios, their circuit structures and hardware interfaces are incompatible and cannot be directly connected. Therefore, a first adapter plate is installed on the slip ring rotor as a transition device between the area array detector and the slip ring. One end of the adapter plate is connected to the slip ring, and the other end is connected to the area array detector, thus achieving structural compatibility between the area array detector and the slip ring through the first adapter plate.

[0056] Furthermore, the slip ring includes an optical fiber receiver; the area array detector includes an image output interface;

[0057] like Figure 2 , Figure 4 As shown, a first optical communication circuit is provided on the lower left edge of the front side of the first adapter board, and a second optical communication circuit is provided on the upper edge center-right position. An FPGA is provided on the back of the first adapter board.

[0058] The input terminal of the first optical communication circuit of the first adapter board is connected to the image output interface of the array detector, and the output terminal is connected to the IO port of the FPGA of the first adapter board.

[0059] The output of the second optical communication circuit on the first adapter board is connected to the optical fiber receiver, and the input is connected to the I / O port of the FPGA on the first adapter board.

[0060] Specifically, in the existing slip ring structure, image data is transmitted unidirectionally from the CT detector to the slip ring via an optical communication connection between the slip ring and the CT detector. The slip ring then transmits the received image data unidirectionally to the host computer. Data requiring bidirectional interaction, such as commands and status data, is connected to the CT detector via a first multiplexed communication interface on the slip ring and to the host computer via a second multiplexed communication interface. The first and second multiplexed communication interfaces are connected within the slip ring to achieve bidirectional interactive transmission of commands and status data. Based on the existing structure where slip ring image data, commands, and status data are transmitted through different communication channels, and considering that the image and status data generated by the area array detector are integrated into a single data packet for transmission, the image data interface of the area array detector cannot be directly connected to the slip ring. Therefore, a first optical communication circuit adapted to the image output interface of the area array detector is located on the lower left side of the front of the first adapter board, and a second optical communication circuit adapted to the slip ring fiber optic receiver is located on the upper right side of the front of the first adapter board. An FPGA is located on the back of the first adapter board, and the I / O ports of the FPGA are connected to the first and second optical communication circuits of the first adapter board, respectively. This achieves an adaptive connection structure between the image output interface of the area array detector and the slip ring fiber optic receiver through the first adapter board, facilitating signal transmission and processing through this adaptive connection structure. This allows the single data packet generated by the area array detector to be received by the first optical communication circuit of the first adapter board, then transmitted by the first optical communication circuit to the FPGA of the first adapter board to decompose the image data, and finally sent by the second optical communication circuit of the first adapter board to the slip ring fiber optic receiver. The first optical communication circuit and the second optical communication circuit of the first adapter board are located at different positions on the front of the first adapter board in order to place the first adapter board on the slip ring rotor base, making it easier to connect with the area array detector and the slip ring fiber optic receiver.

[0061] Specifically, the optical communication circuit on the first adapter board and the optical fiber receiver in the slip ring can be connected by optical fiber, and the two can achieve high-speed, low-interference data transmission by using optical communication.

[0062] Furthermore, the slip ring also includes a first multiplexer communication circuit, a second multiplexer communication circuit, a position encoder, and a zero-position encoder;

[0063] like Figure 2 As shown, a Phoenix Contact interface is provided above the first optical communication circuit on the first adapter board.

[0064] The first adapter board has a first differential single-ended conversion circuit, a second differential single-ended conversion circuit, and a third differential single-ended conversion circuit arranged vertically from top to bottom on the right side of the Phoenix interface.

[0065] One end of the first differential single-ended conversion circuit of the first adapter board is connected to the first multiplexed communication circuit through the Phoenix Contact interface of the first adapter board, and the other end is connected to the I / O port of the FPGA of the first adapter board.

[0066] The input terminal of the second differential single-ended conversion circuit of the first adapter board is connected to the zero-position encoder through the Phoenix Contact interface of the first adapter board, and the output terminal is connected to the IO port of the FPGA of the first adapter board.

[0067] The input of the third differential single-ended conversion circuit of the first adapter board is connected to the IO port of the position encoder through the Phoenix Contact interface of the first adapter board, the first multiplexer communication circuit, and the second multiplexer communication circuit. The output of the circuit is connected to the IO port of the FPGA of the first adapter board.

[0068] Specifically, based on the existing slip ring structure, direct connection between the area array detector and the slip ring's first multiplexed communication circuit, position encoder, and zero-position encoder cannot achieve command and status interaction and communication. Therefore, a Phoenix Contact interface is provided on the upper left of the first optical communication circuit of the first adapter board. A first differential single-ended conversion circuit, arranged vertically from top to bottom on the right side of the Phoenix Contact interface of the first adapter board, is connected to the slip ring's first multiplexed communication circuit via the Phoenix Contact interface of the first adapter board; a second differential single-ended conversion circuit is connected to the zero-position encoder via the Phoenix Contact interface of the first adapter board; and a third differential single-ended conversion circuit is connected to the position encoder via the Phoenix Contact interface, the first multiplexed communication circuit, and the second multiplexed communication circuit. The first, second, and third differential single-ended conversion circuits are respectively connected to the first adapter board FPGA, enabling the first adapter board FPGA to... The state data obtained from the image and state integration data decomposition generated by the area array detector can be transmitted to the first multiplexed communication circuit of the slip ring via the first differential single-ended conversion circuit of the first adapter board. Commands sent by the host computer are also transmitted to the first differential single-ended conversion circuit via the first multiplexed communication circuit, enabling bidirectional interaction between receiving commands and sending states. The second differential single-ended conversion circuit of the first adapter board is connected to the first multiplexed communication circuit of the slip ring, and the first multiplexed communication circuit is connected to the second multiplexed communication circuit. The second multiplexed communication circuit is connected to the position encoder, allowing the position code output by the position encoder to be sequentially input to the first adapter board via the second multiplexed communication circuit, the first multiplexed communication circuit, and the second differential single-ended conversion circuit. The zero-position code of the zero-position encoder is transmitted to the third differential single-ended conversion circuit of the first adapter board via the first multiplexed communication circuit. This achieves a compatible connection between the area array detector and the slip ring for command and state data. The use of a Phoenix Contact interface aims to achieve more flexible structural adaptation between area array detectors and slip rings from different manufacturers and models.

[0069] Furthermore, the area array detector also includes a command receiving interface; such as Figure 2 As shown, a LEMO interface is also provided on the right side of the upper edge of the first adapter board, and a trigger level conversion circuit is provided below the LEMO interface.

[0070] The input terminal of the trigger level conversion circuit of the first adapter board is connected to the IO port of the FPGA of the first adapter board, and the output terminal is connected to the command receiving interface of the array detector through the LEMO interface.

[0071] Specifically, in order to adapt to the command receiving interface of the area array detector, a LEMO interface is also provided on the right side of the upper edge of the first adapter board. A trigger level conversion circuit is also provided below the LEMO interface. The trigger level conversion circuit enables the area array detector to receive trigger commands through the connection structure between the LEMO interface and the area array detector, thereby further realizing the adaptability connection of the slip ring and the area array detector command interaction. The LEMO interface occupies a small volume and is easy to plug and unplug.

[0072] Furthermore, such as Figure 2 As shown, a power output interface is provided on the upper left right side of the front of the first adapter board, and a power output control circuit is provided below the power output interface.

[0073] The input terminal of the power output control circuit of the first adapter board is connected to the IO port of the FPGA of the first adapter board, and the output terminal is electrically connected to the area array detector through the power output interface.

[0074] Specifically, the first adapter board has a power supply output interface and a power output control circuit below the power supply interface. The power output control circuit connects to the area array detector through the power supply output interface, enabling the area array detector to obtain a power supply signal when it needs to acquire images. This further realizes the compatibility connection between the slip ring and the area array detector's power supply, providing a suitable power supply connection structure for better control of the area array detector.

[0075] Furthermore, the slip ring also includes an optical fiber transmitter;

[0076] like Figure 3 As shown, a first optical communication circuit is provided on the lower left edge of the front side of the second adapter board, and a second optical communication circuit is provided on the upper edge center-right position. An FPGA is provided on the back of the second adapter board.

[0077] The input terminal of the first optical communication circuit of the second adapter board is connected to the optical fiber transmitter, and the output terminal is connected to the IO port of the FPGA of the second adapter board.

[0078] The input terminal of the second optical communication circuit of the second adapter board is connected to the IO port of the FPGA of the second adapter board, and the output terminal is connected to the host computer.

[0079] Specifically, due to structural compatibility issues, the slip ring's fiber optic transmitter cannot be directly connected to the host computer. Therefore, a first optical communication circuit adapted to the image output interface of the array detector is located on the lower left side of the front of the second adapter board, and a second optical communication circuit adapted to the slip ring's fiber optic receiver is located on the upper right edge of the front of the second adapter board. An FPGA is located on the back of the second adapter board, and the IO ports of the FPGA are connected to the first and second optical communication circuits of the second adapter board, respectively. This achieves a compatible connection structure between the slip ring fiber optic transmitter and the host computer through the second adapter board, facilitating the transmission and processing of image data through this compatible connection structure. The different positions of the first and second optical communication circuits on the front of the second adapter board are to allow the second adapter board to be mounted on the slip ring stator, adapting to the existing structure of the slip ring stator and connecting to the host computer and the slip ring fiber optic transmitter.

[0080] Furthermore, such as Figure 3 As shown, an electrical communication circuit is located slightly to the left of the center of the upper edge of the front of the second adapter board. The input end of the electrical communication circuit of the second adapter board is connected to the host computer, and the output end is connected to the I / O port of the FPGA of the second adapter board. The purpose is to adapt to the electrical communication interface of the host computer and establish an electrical communication connection.

[0081] Furthermore, a Phoenix Contact interface is located on the upper left of the first optical communication circuit on the second adapter board, and a differential-to-single-ended conversion circuit is located on the right side of the Phoenix Contact interface on the second adapter board.

[0082] One end of the differential single-ended conversion circuit of the second adapter board is connected to the second multiplex communication circuit of the slip ring, and the other end is connected to the FPGA of the second adapter board.

[0083] Specifically, due to structural compatibility issues, the host computer and the slip ring's second multiplexed communication circuit cannot be directly connected. Therefore, a Phoenix Contact interface is located on the upper left of the first optical communication circuit on the second adapter board. A differential single-ended converter circuit located on the right side of the Phoenix Contact interface on the second adapter board is connected to the slip ring's second multiplexed communication circuit via the Phoenix Contact interface. The differential single-ended converter circuit is connected to the FPGA on the second adapter board, thus achieving a compatible connection between the slip ring's second multiplexed communication circuit and the host computer, and enabling commands to be transmitted from the slip ring to the host computer via the second adapter board. The purpose of using a Phoenix Contact interface is to achieve more flexible structural compatibility between area array detectors and slip rings from different manufacturers and models.

[0084] Furthermore, the slip ring includes an AC / DC conversion circuit;

[0085] A power input interface is located directly above the Phoenix Contact interface on the first adapter board. A power conversion circuit is located above the power input interface on the first adapter board.

[0086] The input terminal of the first adapter board power conversion circuit is connected to the output terminal of the slip ring AC / DC conversion circuit via the first adapter board power input interface. The output terminal is electrically connected to the first adapter board FPGA, the first adapter board first optical communication circuit, the first adapter board second optical communication circuit, the first adapter board first differential single-ended conversion circuit, the first adapter board second differential single-ended conversion circuit, the first adapter board third differential single-ended conversion circuit, the first adapter board trigger level conversion circuit, and the first adapter board power output control circuit. This achieves the adaptation and connection of the power supply structure between the first adapter board and the slip ring AC / DC conversion circuit, allowing each circuit on the first adapter board to be powered through the slip ring.

[0087] Furthermore, a power input interface is located directly above the Phoenix Contact interface on the second adapter board, and a power conversion circuit is located above the power input interface on the second adapter board.

[0088] The input terminal of the power conversion circuit on the second adapter board is connected to an external DC power supply through the power input interface of the second adapter board. The output terminal is electrically connected to the FPGA on the second adapter board, the optical communication circuit on the second adapter board, the electrical communication circuit on the second adapter board, and the differential-to-single-ended conversion circuit on the second adapter board, respectively. This realizes the power supply connection structure between the second adapter board and the external DC power supply, so that each circuit on the second adapter board is powered by the external DC power supply.

[0089] In a practical example of this embodiment, the first and second adapter boards can be based on a universally designed adapter board structure, customized to meet different needs. In this example, an optical communication circuit is located on the lower left edge of the front of the adapter board, and two optical communication circuits are arranged horizontally side-by-side on the upper right edge. Above the lower optical communication circuit is a Phoenix Contact interface. To the right of the Phoenix Contact interface, three differential-to-single-ended conversion circuits are arranged vertically from top to bottom. Above the Phoenix Contact interface is a power input interface, and above the power input interface is a power conversion circuit. The example adapter... Two power supply interfaces are arranged horizontally side-by-side on the upper left corner of the front of the board. A power output control circuit is located below the power supply interfaces. Two electrical communication circuits are located to the right of the power supply interfaces. Two LEMO interfaces are arranged horizontally side-by-side to the right of the two horizontally arranged optical communication circuits on the upper right side of the board. A trigger level conversion circuit is located below the LEMO interfaces. A Phoenix Contact interface is also located on the right edge of the front of the example adapter board. Evenly distributed mounting holes are provided at the four corners, the middle of the long edge, and horizontally in the middle of the example adapter board. An FPGA is located on the back of the example adapter board. By configuring and switching the corresponding circuits of the example adapter board, a first adapter board and a second adapter board can be obtained respectively; alternatively, a custom-made first adapter board and a second adapter board can be used to obtain them separately. In summary, using the first and second adapter board schemes disclosed in this embodiment, the structural configuration requirements of different array detectors, slip rings, and host computers can be met through flexible configuration.

[0090] This embodiment discloses a transition device for an area array detector, a slip ring, and a host computer. It includes a first transition plate disposed on the slip ring rotor for adapting the connection between the area array detector and the slip ring, and a second transition plate disposed on the slip ring stator for adapting the connection between the slip ring and the host computer. Without altering the existing structure of the area array detector, slip ring, and host computer, it achieves structural adaptation and transition of the area array detector, slip ring, and host computer based on the first and second transition plates. Compared to existing technologies, it is easier to implement and customize, has lower deployment difficulty, and can quickly achieve structural adaptation between different area array detectors, slip rings, and host computers, exhibiting excellent versatility.

[0091] Those skilled in the art will understand that the data transmission, instruction and status data interaction, and data processing mentioned in the above embodiments are all descriptions illustrating the effects of the corresponding connection structure. The programs / software involved are all common methods in the prior art, and this utility model does not involve any software improvements. This utility model only requires connecting various devices with corresponding functions through the connection relationships given in the embodiments of this utility model, without involving any program or software improvements. As for the connection methods between the various hardware devices with corresponding functions, they can all be implemented by those skilled in the art using existing technology, and will not be described in detail here.

[0092] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present utility model should be included within the protection scope of the present utility model.

Claims

1. A converter for a planar array detector, a slip ring, and a host computer, characterized in that, The device includes a first adapter plate and a second adapter plate, wherein, The first adapter plate is disposed on the rotor of the slip ring, with one end connected to the slip ring and the other end connected to the area array detector; The second adapter plate is disposed on the stator of the slip ring, with one end connected to the slip ring and the other end connected to the host computer.

2. The adapter device for a planar array detector, a slip ring, and a host computer according to claim 1, characterized in that, The slip ring includes an optical fiber receiver; the area array detector includes an image output interface; The first adapter board has a first optical communication circuit located on the lower left edge of the front side and a second optical communication circuit located on the upper edge center-right position. The first adapter board has an FPGA located on the back side. The input terminal of the first optical communication circuit of the first adapter board is connected to the image output interface of the array detector, and the output terminal is connected to the IO port of the FPGA of the first adapter board. The output of the second optical communication circuit on the first adapter board is connected to the optical fiber receiver, and the input is connected to the I / O port of the FPGA on the first adapter board.

3. The adapter device for a planar array detector, a slip ring, and a host computer according to claim 2, characterized in that, The slip ring also includes a first multiplexer communication circuit, a second multiplexer communication circuit, a position encoder, and a zero-position encoder; A Phoenix Contact interface is provided above the first optical communication circuit on the first adapter board; The first adapter board has a first differential single-ended conversion circuit, a second differential single-ended conversion circuit, and a third differential single-ended conversion circuit arranged vertically from top to bottom on the right side of the Phoenix interface. One end of the first differential single-ended conversion circuit of the first adapter board is connected to the first multiplexed communication circuit through the Phoenix Contact interface of the first adapter board, and the other end is connected to the I / O port of the FPGA of the first adapter board. The input terminal of the second differential single-ended conversion circuit of the first adapter board is connected to the zero-position encoder through the Phoenix Contact interface of the first adapter board, and the output terminal is connected to the IO port of the FPGA of the first adapter board. The input of the third differential single-ended conversion circuit of the first adapter board is connected to the IO port of the position encoder through the Phoenix Contact interface of the first adapter board, the first multiplexer communication circuit, and the second multiplexer communication circuit. The output of the circuit is connected to the IO port of the FPGA of the first adapter board.

4. The adapter device for a planar array detector, a slip ring, and a host computer according to claim 3, characterized in that, The area array detector also includes a command receiving interface; a LEMO interface is also provided on the right side of the upper edge of the first adapter board, and a trigger level conversion circuit is provided below the LEMO interface. The input terminal of the trigger level conversion circuit of the first adapter board is connected to the IO port of the FPGA of the first adapter board, and the output terminal is connected to the command receiving interface of the array detector through the LEMO interface.

5. The adapter device for a planar array detector, a slip ring, and a host computer according to claim 4, characterized in that, The first adapter board has a power output interface located on the upper left right side of its front side. Below the power output interface is a power output control circuit. The input terminal of the power output control circuit of the first adapter board is connected to the IO port of the FPGA of the first adapter board, and the output terminal is electrically connected to the area array detector through the power output interface.

6. The adapter device for a planar array detector, a slip ring, and a host computer according to claim 5, characterized in that, The slip ring also includes an optical fiber transmitter; The second adapter board has a first optical communication circuit located on the lower left edge of the front side and a second optical communication circuit located on the upper right edge of the center. The second adapter board has an FPGA located on the back side. The input terminal of the first optical communication circuit of the second adapter board is connected to the optical fiber transmitter, and the output terminal is connected to the IO port of the FPGA of the second adapter board. The input terminal of the second optical communication circuit of the second adapter board is connected to the IO port of the FPGA of the second adapter board, and the output terminal is connected to the host computer.

7. The adapter device for a planar array detector, a slip ring, and a host computer according to claim 6, characterized in that, An electrical communication circuit is provided at the center-left position of the upper edge of the front of the second adapter board; the input end of the electrical communication circuit of the second adapter board is connected to the host computer, and the output end is connected to the IO port of the FPGA of the second adapter board.

8. The adapter device for a planar array detector, a slip ring, and a host computer according to claim 7, characterized in that, The second adapter board has a Phoenix Contact interface located on the upper left of the first optical communication circuit. A differential-to-single-ended conversion circuit is located to the right of the Phoenix Contact interface on the second adapter board. One end of the differential single-ended conversion circuit of the second adapter board is connected to the second multiplex communication circuit of the slip ring, and the other end is connected to the FPGA of the second adapter board.

9. A switching device for a planar array detector, a slip ring, and a host computer according to claim 8, characterized in that, The slip ring includes an AC / DC conversion circuit; A power input interface is located directly above the Phoenix Contact interface on the first adapter board. A power conversion circuit is located above the power input interface on the first adapter board. The input terminal of the first adapter board power conversion circuit is connected to the output terminal of the slip ring AC / DC conversion circuit through the first adapter board power input interface. The output terminal is electrically connected to the first adapter board FPGA, the first adapter board first optical communication circuit, the first adapter board second optical communication circuit, the first adapter board first differential single-ended conversion circuit, the first adapter board second differential single-ended conversion circuit, the first adapter board third differential single-ended conversion circuit, the first adapter board trigger level conversion circuit, and the first adapter board power output control circuit.

10. A switching device for a planar array detector, a slip ring, and a host computer according to claim 9, characterized in that, The second adapter board has a power input interface directly above the Phoenix Contact interface, and the first adapter board has a power conversion circuit above its power input interface. The input terminal of the second adapter board power conversion circuit is connected to an external DC power supply through the power input interface of the second adapter board, and the output terminal is electrically connected to the second adapter board FPGA, the second adapter board optical communication circuit, the second adapter board electrical communication circuit, and the second adapter board differential single-ended conversion circuit, respectively.

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