X-waveband amplitude-limiting low-noise amplifier device

Abstract

The utility model relates to the technical field of microwave frequency, in particular to an X-waveband amplitude-limiting low-noise amplifier device. Comprising a high-frequency input port, an amplitude limiter, a first switch and a second switch which are connected in sequence, and the first switch is used for dividing signals into a first path and a second path; the first path comprises a step attenuator and an amplifier I which are connected in sequence; the second path comprises an amplifier II; and the switch II is used for selecting an output signal of the first path or the second path and transmitting the output signal to the output port through the filter, the final amplifier and the power divider. The problems of high isolation, low noise coefficient and low cost compatibility in the single-channel topology are solved.

Description

TECHNICAL FIELD

[0001] The utility model relates to the microwave frequency technical field especially is related to a X waveband's limiting amplitude low noise amplifier device. BACKGROUND

[0002] In the microwave receiver front-end system, the absorption type limiting amplitude low noise amplifier (LNA) is the core component of guaranteeing system sensitivity and resisting high power impact, and is widely used in radar, electronic countermeasure, satellite communication and other fields. The usual downlink frequency of X waveband is 7.25-7.75GHz, and the uplink frequency is 7.9-8.4GHz. The traditional limiting amplitude low noise amplifier device adopts balanced 3dB bridge architecture, divides the input signal into two paths through the bridge, connects the limiting amplitude device and low noise amplifier module respectively, and then synthesizes the output through another bridge. This scheme can realize power distribution and reflection suppression, but to meet the double-path balanced design requirement, the number of limiting amplitude devices increases from 1 group to 2 groups, the low noise amplifier module expands from single path to double path, and two sets of 3dB bridges need to be configured, so the system complexity and manufacturing cost increase. The signal needs to pass through 3dB bridge twice, which produces at least 3dB of inherent insertion loss. When the input power exceeds the threshold of the limiting amplitude device, the reflected signal is coupled back to the front-stage circuit through the bridge, which may cause damage to sensitive devices such as front-stage mixers and filters.

[0003] In addition, in the existing scheme, the cascade design of step attenuator (STC) and low noise amplifier (LNA) cannot achieve wide dynamic range, and the existing technology is usually ≤70dB, and lacks multi-cascade protection mechanism, which easily leads to amplifier saturation or burning.

[0004] Therefore, an X waveband limiting amplitude low noise amplifier device is needed to solve the problem of achieving high isolation, low noise figure and low cost compatibility in a single-channel topology. UTILITY MODEL CONTENTS

[0005] In order to solve the problem of achieving high isolation, low noise figure and low cost compatibility in a single-channel topology, the utility model provides an X waveband limiting amplitude low noise amplifier device.

[0006] In the first aspect, the utility model provides an X waveband limiting amplitude low noise amplifier device, which comprises high-frequency input port, limiting amplitude device, switch one and switch two connected in sequence, wherein:

[0007] The switch one is used for dividing the signal into first path and second path;

[0008] The first path comprises step attenuator and amplifier one connected in sequence;

[0009] The second path comprises amplifier two;

[0010] The second switch is used to select the output signal of the first or second path, and transmits it to the output port through a filter, a final stage amplifier and a power divider.

[0011] Furthermore, the input terminal of the step attenuator is connected to the first output terminal of switch one, the output terminal of the step attenuator is connected to the first input terminal of switch two via amplifier one, the input terminal of amplifier two is connected to the second input terminal of switch one, and the output terminal of amplifier two is connected to the second input terminal of switch two.

[0012] Furthermore, the limiter includes a limiter one and a limiter two connected in sequence. The limiter one includes an inductor, a capacitor one, a diode one, and a diode two. One end of the inductor is grounded, and the other end is connected to the first end of the capacitor one, the positive terminal of the diode one, the negative terminal of the diode two, and the limiter two, respectively. The second end of the capacitor one is connected to the high-frequency input port, and the negative terminals of the diode one and the diode two are grounded, respectively.

[0013] Furthermore, the second limiter is a single-chip limiter.

[0014] Furthermore, an adjustment circuit is provided between the final stage amplifier and the power divider. The adjustment circuit includes an adjustable rheostat, resistor one, resistor two, transistor one, transistor two, and capacitor two. The sliding end of the adjustable rheostat is connected to one end of resistor two and one end of capacitor two. The other end of resistor two is connected to the other end of capacitor two, the collector of transistor one, and the emitter of transistor two. The base of transistor one is connected to one end of resistor one. The other end of resistor one is connected to the fixed end of the adjustable rheostat. The base of transistor two is connected to a DSP digital signal processor. The collector of transistor two is connected to the power supply voltage. The emitter of transistor one is grounded. A compensation resistor is connected in series between the fixed end of the adjustable rheostat and resistor one.

[0015] Furthermore, the step attenuator is an absorptive π-type network structure step attenuator, and the attenuation value of the step attenuator is 0-64dB.

[0016] Furthermore, the amplifier is a low-noise amplifier with a gain of 32±1dB, a noise figure of no more than 1.5dB@9.4GHz, a dynamic input range of -50dBm to +10dBm, and a 1dB compression point of no less than 15dBm.

[0017] Furthermore, the second amplifier is a driver amplifier, the gain of the second amplifier is 20±0.5dB, and the third-order intermodulation cutoff point of the output of the second amplifier is not less than 40dBm.

[0018] Furthermore, the first switch and the second switch are gallium arsenide SPDT switches.

[0019] Furthermore, the final stage amplifier is connected to a +5V power input terminal via resistor four, and the power input terminal is connected to grounded capacitor three and capacitor four.

[0020] In summary, this utility model has the following beneficial technical effects:

[0021] 1. This invention proposes an X-band limiting low-noise amplifier that can flexibly adapt to different signal strengths. When the input signal strength is low, switches one and two can switch the signal to the second path. Amplifier two in this path is a driver amplifier with a gain of 20±0.5dB, capable of quickly amplifying weak signals initially, reducing the detectable signal lower limit to -75dBm. When the input signal strength is moderate, it switches to the first path. The signal first passes through a step attenuator and then is amplified by amplifier one. This method ensures that the output signal amplitude remains within a suitable range. This greatly expands the dynamic range of the device, effectively handling both weak and strong interference signals.

[0022] 2. This invention employs single-channel transmission, avoiding losses caused by multiple bridge passes. The signal transmission path is more direct, reducing insertion loss. The limiter uses a two-stage design. Limiter one enables fast response and initially suppresses high-power signals. Limiter two further limits the residual signal, improving the protection capability for subsequent circuits and reducing the risk of equipment damage caused by strong signal impacts.

[0023] 3. The first amplifier of this utility model serves as a low-noise amplifier, which can minimize noise introduction while amplifying the signal. The second amplifier serves as a driver amplifier, with an output third-order intermodulation cutoff point of not less than 40dBm, further improving the quality of signal processing. The adjustment circuit between the final stage amplifier and the power divider, through a network composed of adjustable rheostats, resistors, transistors, and capacitors, can dynamically adjust the signal level according to the instructions of the DSP digital signal processor, ensuring the stability of the output signal. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the circuit of an X-band limiting low-noise amplifier according to an embodiment of the present invention.

[0025] Figure 2 This is a schematic diagram of the circuit of the limiter according to an embodiment of the present invention.

[0026] Figure 3 This is a schematic diagram of the adjustment circuit of an embodiment of the present invention.

[0027] Figure 4 This is a schematic diagram of the circuit of the final stage amplifier according to an embodiment of the present invention. Detailed Implementation

[0028] The present invention will be further described in detail below with reference to the accompanying drawings.

[0029] Example 1

[0030] Reference Figure 1 This embodiment of an X-band limiting low-noise amplifier includes:

[0031] The high-frequency input port, limiter T1, switch S1, and switch S2 are connected in sequence, wherein:

[0032] The switch S1 is used to divide the signal into a first path and a second path.

[0033] The first path includes a step attenuator STC and an amplifier N1 connected in sequence;

[0034] The second path includes amplifier N2;

[0035] The switch S2 is used to select the output signal of the first or second path, and transmits it to the output port through the filter Z1, the final stage amplifier N3 and the power divider W1.

[0036] The input terminal of the step attenuator STC is connected to the first output terminal of switch S1. The output terminal of the step attenuator STC is connected to the first input terminal of switch S2 via amplifier N1. The input terminal of amplifier N2 is connected to the second input terminal of switch S1. The output terminal of amplifier N2 is connected to the second input terminal of switch S2.

[0037] Reference Figure 2 The limiter T1 includes a first limiter T11 and a second limiter T12 connected in sequence. The first limiter T11 includes an inductor L, a first capacitor C1, a first diode D1 and a second diode D2. One end of the inductor L is grounded, and the other end is connected to the first terminal of the first capacitor C1, the positive terminal of the first diode D1, the negative terminal of the second diode D2 and the second limiter T12, respectively. The second terminal of the first capacitor C1 is connected to the high-frequency input port, and the negative terminals of the first diode D1 and the second diode D2 are grounded.

[0038] The limiter T12 is a monolithic limiter manufactured using gallium arsenide monolithic microwave integrated circuit technology, which is a conventional choice.

[0039] The limiter T11 uses back-to-back PIN diodes, with D1 and D2 being MA4P1246-1141T, inductor L being 4.7nH, and capacitor C1 being 1pF, forming an 8.9-9.9GHz bandpass matching network. When the input power is greater than +10dBm, the diodes conduct, and the equivalent impedance drops sharply from a high impedance state (>1kΩ) to a low impedance state (<5Ω). More than 90% of the energy is reflected through inductor L, and capacitor C1 blocks DC and couples the RF signal.

[0040] The limiter T12 uses an integrated monolithic limiter (Mini-Circuits ZX75-P33+), which achieves peak leakage suppression of ≤-25dBm and response time of <1ns at the 9.4GHz frequency.

[0041] Reference Figure 3 An adjustment circuit A-Circuit is provided between the final stage amplifier N3 and the power divider W1. The adjustment circuit includes an adjustable rheostat RT, resistor R1, resistor R2, transistor Q1, transistor Q2, and capacitor C2. The sliding end of the adjustable rheostat RT is connected to one end of resistor R2 and one end of capacitor C2. The other end of resistor R2 is connected to the other end of capacitor C2, the collector of transistor Q1, and the emitter of transistor Q2. The base of transistor Q1 is connected to one end of resistor R1. The other end of resistor R1 is connected to the fixed end of the adjustable rheostat RT. The base of transistor Q2 is connected to a DSP digital signal processor. The collector of transistor Q2 is connected to the power supply voltage. The emitter of transistor Q1 is grounded. A compensation resistor R3 is connected in series between the fixed end of the adjustable rheostat RT and resistor R1.

[0042] The adjustable rheostat RT is 10kΩ (Bourns 3296W), the compensation resistor R3 = 100Ω ± 1%, and the capacitor C2 = 10nF.

[0043] When the output signal of the final stage amplifier N3 causes resistor R1 to conduct and resistor R2 to be cut off, it indicates that the current signal level meets the preset standard, and the signal is directly output through the adjustable rheostat RT. When the output signal of the final stage amplifier N3 causes resistor R1 to be cut off and resistor R2 to conduct, it indicates that the signal level needs to be adjusted. At this time, the control signal output by the digital signal processor is transmitted to the sliding terminal of the adjustable rheostat RT through resistor R2, dynamically adjusting its resistance parameter so that the signal reaches a stable level before entering the power distribution module, thereby improving the accuracy of the signal output and its anti-interference capability.

[0044] The step attenuator STC is an absorption-type π-type network structure step attenuator with an attenuation value of 0-64dB. The π-type attenuation network is composed of thin-film resistors and has 64 levels (0-63dB, 1dB steps).

[0045] The amplifier N1 is a low-noise amplifier with a gain of 32±1dB, a noise figure of no more than 1.5dB@9.4GHz, a dynamic input range of -50dBm to +10dBm, and a 1dB compression point of no less than 15dBm.

[0046] The amplifier N2 is a driver amplifier with a gain of 20±0.5dB and an output third-order intermodulation cutoff point of not less than 40dBm.

[0047] The amplifier N1 is a low-noise amplifier HMC8410LP2DE, and the amplifier N2 is a driver amplifier QPA9128.

[0048] Switches S1 and S2 are gallium arsenide SPDT switches. The switch model is ADGM1004 gallium arsenide SPDT switch, with a switching time of 15ns, isolation of 38dB@9.4GHz, and insertion loss of 0.4dB. The switch state is automatically switched by a comparator (LT1719) based on the output level of the AD8310 detector (threshold 0dBm).

[0049] Reference Figure 4 The final stage amplifier N3 is connected to a +5V power input terminal via resistor R4. The power input terminal is connected to grounded capacitors C3 and C4. Capacitors C3 (100nF MLCC) and C4 (100μF tantalum capacitor) form a π-type filter to suppress power supply ripple ≤2mVpp. Resistor R4 is a 1Ω / 1W metal film resistor used for current limiting.

[0050] During operation, 0dBm ≤ input signal power ≤ +10dBm, the first path dynamically attenuates, and diodes D1 and D2 in limiter T11 are in the off state (equivalent impedance > 1kΩ). The signal enters limiter T12 through the L-C1 network (insertion loss ≤ 0.8dB). Limiter T12 performs basic limiting on the signal (threshold + 12dBm) to ensure that the output signal ≤ +12dBm.

[0051] When the input signal power is ≤ +25dBm, the combined limiting and attenuation protection is activated. Diodes D1 and D2 in T11 conduct (equivalent impedance < 5Ω), 90% of the energy is reflected through inductor L, and the remaining 10% enters limiter T12. Limiter T12 suppresses the residual peak power to ≤ -25dBm (9.4GHz frequency) with a response time < 1ns.

[0052] When the signal in the first path is ≥0dBm, the step attenuator STC is dynamically adjusted. The step attenuator STC adjusts the attenuation in 1dB steps within the range of 0-63dB (typical value 0-30dB). The low-noise amplifier-N1 has an amplification gain of 32±1dB, a noise figure ≤1.5dB@9.4GHz, an input dynamic range of -50dBm to +10dBm, and a 1dB compression point ≥15dBm to ensure linear amplification.

[0053] This process can be monitored in real time using an AD8310 (detector). When the signal is ≥0dBm, the comparator outputs a high level, and the control switch S1 / S2 switches to the first path. When the signal is <0dBm, the comparator outputs a low level, and the control switch S1 / S2 switches to the second path. Dynamically switching paths does not change the number of channels.

[0054] When the signal of the second path is less than 0dBm and the value of -75dBm is less than 0dBm, the second path is activated, driving amplifier N2 to amplify rapidly with a gain of 20±0.5dB and an output third-order intermodulation cutoff point ≥40dBm.

[0055] When the A-Circuit is working, if the signal level is normal, resistor R1 is turned on and resistor R2 is turned off, and the signal is directly output through the adjustable rheostat RT (the resistance of the adjustable rheostat RT is fixed at 10kΩ).

[0056] When the A-Circuit adjustment circuit is working, if the signal level is abnormal, the DSP digital signal processor outputs a PWM signal to drive transistor Q2 to conduct. The variable resistor RT is dynamically adjusted (0-10kΩ) to compensate for the level deviation ≤±0.1dB. Capacitor C2 (10nF) filters out high-frequency noise, and resistor R3 (100Ω) compensates for temperature drift.

[0057] In the final stage amplifier N3, capacitor C3 (100nF) and capacitor C4 (10μF) form a π-type filter to suppress power supply ripple ≤2mVpp. Finally, the output is sent to OUT1 / OUT2 through power divider W1.

[0058] Through dynamic path switching, real-time gain compensation, and multi-level amplitude limiting protection, stable processing of X-band signals across the entire range from -75dBm to +25dBm is achieved.

[0059] The above are all preferred embodiments of this utility model, and are not intended to limit the scope of protection of this utility model. Therefore, all equivalent changes made to the structure, shape and principle of this utility model should be covered within the scope of protection of this utility model.

Claims

1. A limiting low-noise amplifier for the X-band, characterized in that, This includes a high-frequency input port, a limiter, switch one, and switch two connected in sequence, wherein: The switch is used to divide the signal into a first path and a second path. The first path includes a step attenuator and an amplifier connected in sequence; The second path includes amplifier two; The second switch is used to select the output signal of the first or second path, and transmits it to the output port through a filter, a final stage amplifier and a power divider.

2. The X-band limiting low-noise amplifier according to claim 1, characterized in that, The input terminal of the step attenuator is connected to the first output terminal of switch one. The output terminal of the step attenuator is connected to the first input terminal of switch two via amplifier one. The input terminal of amplifier two is connected to the second input terminal of switch one. The output terminal of amplifier two is connected to the second input terminal of switch two.

3. The X-band limiting low-noise amplifier device according to claim 2, characterized in that, The limiter includes a limiter one and a limiter two connected in sequence. The limiter one includes an inductor, a capacitor one, a diode one, and a diode two. One end of the inductor is grounded, and the other end is connected to the first terminal of the capacitor one, the positive terminal of the diode one, the negative terminal of the diode two, and the limiter two, respectively. The second terminal of the capacitor one is connected to the high-frequency input port, and the negative terminals of the diode one and the diode two are grounded, respectively.

4. The X-band limiting low-noise amplifier according to claim 3, characterized in that, The second limiter is a single-chip limiter.

5. The X-band limiting low-noise amplifier according to claim 4, characterized in that, An adjustment circuit is provided between the final stage amplifier and the power divider. The adjustment circuit includes an adjustable rheostat, resistor one, resistor two, transistor one, transistor two, and capacitor two. The sliding end of the adjustable rheostat is connected to one end of resistor two and one end of capacitor two. The other end of resistor two is connected to the other end of capacitor two, the collector of transistor one, and the emitter of transistor two. The base of transistor one is connected to one end of resistor one. The other end of resistor one is connected to the fixed end of the adjustable rheostat. The base of transistor two is connected to a DSP digital signal processor. The collector of transistor two is connected to the power supply voltage. The emitter of transistor one is grounded. A compensation resistor is connected in series between the fixed end of the adjustable rheostat and resistor one.

6. The X-band limiting low-noise amplifier according to claim 5, characterized in that, The step attenuator is an absorptive π-type network structure step attenuator with an attenuation value of 0-64dB, in 1dB steps, for a total of 64 levels.

7. The X-band limiting low-noise amplifier according to claim 6, characterized in that, The amplifier is a low-noise amplifier with a gain of 32±1dB, a noise figure of no more than 1.5dB@9.4GHz, a dynamic input range of -50dBm to +10dBm, and a 1dB compression point of no less than 15dBm.

8. The X-band limiting low-noise amplifier according to claim 7, characterized in that, The second amplifier is a driver amplifier with a gain of 20±0.5dB and an output third-order intermodulation cutoff point of not less than 40dBm.

9. The X-band limiting low-noise amplifier according to claim 8, characterized in that, The first and second switches are gallium arsenide SPDT switches.

10. The X-band limiting low-noise amplifier according to claim 9, characterized in that, The final stage amplifier is connected to a +5V power input terminal via resistor four, and the power input terminal is connected to grounded capacitor three and capacitor four.

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