Operational amplifier conditioning circuit

Abstract

The utility model discloses an operational amplifier conditioning circuit, which comprises a follower circuit, a third resistor (R16) and a single-ended differential circuit, the follower circuit is used for collecting analog signals without distortion and transmitting the analog signals to the single-end differential circuit; the single-end differential circuit is used for converting the collected analog signal into a differential analog signal so as to avoid external interference to the greatest extent; according to the utility model, two-stage operational amplifiers are adopted, analog signals are changed into differential signals from single-end signals, and interference is reduced. The signal bandwidth of the whole conditioning circuit is 180MHz, high-frequency signal attenuation can be effectively avoided, and effective restoration of sampled data is ensured.

Description

Technical Field

[0001] This utility model belongs to the field of power automation, specifically, it relates to an operational amplifier conditioning circuit. Background Technology

[0002] To ensure sufficient standby time for handheld devices, power requirements are generally stringent, necessitating consideration of power consumption during the design phase. Partial discharge data acquisition systems need to completely acquire external high-frequency and ultra-high-frequency signals and transmit them to an ARM processor via a high-speed communication interface for data processing. Therefore, a high data sampling rate and distortion-free acquisition are crucial. This necessitates high-sampling-rate, high-bandwidth, low-power operational amplifiers and conditioning circuits to reproduce the signal as accurately as possible. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this utility model provides an operational amplifier conditioning circuit, comprising: a follower circuit, a third resistor R16, and a single-ended differential circuit.

[0004] A follower circuit is used to acquire analog signals without distortion and transmit them to a single-ended differential circuit.

[0005] A single-ended differential circuit is used to convert the acquired analog signal into a differential analog signal to minimize external interference.

[0006] The follower circuit and the single-ended differential circuit are connected through the third resistor R16.

[0007] Preferably, the follower circuit includes: a first resistor R5, a first operational amplifier U4, a second resistor R9, a first capacitor C9, and a second capacitor C2;

[0008] The first resistor R5 is connected to the input terminal of the first operational amplifier U4, the second resistor R9 is connected to the input terminal of the first operational amplifier U4 and grounded, the first capacitor C9 is connected to the positive power supply of the first operational amplifier U4 and grounded, the second capacitor C2 is connected to the negative power supply of the first operational amplifier U4 and grounded, and the input terminal and output terminal of the first operational amplifier U4 are connected together.

[0009] Preferably, the first operational amplifier U4 is an operational amplifier with a bandwidth of 180MHz and a current of 1mA.

[0010] Preferably, the single-ended differential circuit includes: a fourth resistor R24, a second operational amplifier U8, a third capacitor C21, a fourth capacitor C22, a fifth capacitor C38, a sixth capacitor C40, a fifth resistor R17, a sixth resistor R25, a seventh resistor R32, an eighth resistor R40, a ninth resistor R33, and a tenth resistor R41.

[0011] The negative input terminal of the second operational amplifier U8 is connected to the positive output terminal of the second operational amplifier U8 through the fourth resistor R24. The third capacitor C21 is connected in parallel with the fourth resistor R24. The fifth capacitor C38 is connected to the positive output terminal of the second operational amplifier and grounded through the seventh resistor R32. The eighth resistor R40 is connected to the seventh resistor R32.

[0012] Preferably, the negative input terminal of the second operational amplifier U8 is connected to the output terminal of the first operational amplifier U4 in the follower circuit through the third resistor R16.

[0013] Preferably, the fifth resistor R17 is connected to the positive input terminal of the second operational amplifier U8 and grounded; the positive input terminal of the second operational amplifier is connected to the negative output terminal of the second operational amplifier U8 through the sixth resistor R25 and connected to the fifth resistor R17; the fourth capacitor C22 is connected in parallel with the sixth resistor R25; the sixth capacitor C40 is connected to the negative output terminal of the second operational amplifier through the ninth resistor R33 and grounded; and the tenth resistor R41 is connected to the ninth resistor R33.

[0014] Preferably, the second operational amplifier U8 is a fully differential operational amplifier with a bandwidth of 200MHz.

[0015] Preferably, one end of the first filter capacitor C10 is connected to a 2V 5A power supply, and the other end is grounded.

[0016] Preferably, the second filter capacitor C37 and the third filter capacitor C39 are connected in parallel, with one end connected to a -2V 5A power supply and the other end grounded.

[0017] The beneficial effects of this invention are that, compared with the prior art, it employs a two-stage operational amplifier to transform the analog signal from a single-ended signal to a differential signal, thus reducing interference. The signal bandwidth of the entire conditioning circuit is 180MHz, which effectively avoids high-frequency signal attenuation and ensures effective data reconstruction after sampling. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall system implementation. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. The embodiments described in this application are merely some embodiments of this utility model, not all embodiments. Based on the spirit of this utility model, other embodiments obtained by those skilled in the art without creative effort are all within the protection scope of this utility model.

[0020] The first embodiment of this utility model, as follows: Figure 1As shown, an operational amplifier conditioning circuit is provided, including: a follower circuit, a third resistor R16, and a single-ended differential circuit.

[0021] Follower circuits are used to acquire the analog signal from the operational amplifier input without distortion and pass it to a single-ended differential circuit.

[0022] A single-ended differential circuit is used to convert the acquired analog signal into a differential analog signal to minimize external interference.

[0023] The follower circuit and the single-ended differential circuit are connected through the third resistor R16.

[0024] The follower circuit includes: a first resistor R5, a first operational amplifier U4, a second resistor R9, a first capacitor C9, and a second capacitor C2.

[0025] The first resistor R5 is connected to the input terminal of the first operational amplifier U4, the second resistor R9 is connected to the input terminal of the first operational amplifier U4 and grounded, the first capacitor C9 is connected to the positive power supply of the first operational amplifier U4 and grounded, the second capacitor C2 is connected to the negative power supply of the first operational amplifier U4 and grounded, and the input terminal and output terminal of the first operational amplifier U4 are connected together.

[0026] Preferably, the first operational amplifier U4 uses an operational amplifier with an operational amplifier bandwidth of 180MHz, a current of 1mA, and low power as the input of the analog signal, including but not limited to the LTC6246 operational amplifier from Analog Devices.

[0027] The single-ended differential circuit includes: fourth resistor R24, second operational amplifier U8, third capacitor C21, fourth capacitor C22, fifth capacitor C38, sixth capacitor C40, fifth resistor R17, sixth resistor R25, seventh resistor R32, eighth resistor R40, ninth resistor R33 and tenth resistor R41.

[0028] The first operational amplifier U4 is connected to the input terminal of the second operational amplifier U8 through the third resistor R16. The negative input terminal of the second operational amplifier U8 is connected to the negative output terminal of the second operational amplifier U8 through the fourth resistor R24. The fourth resistor R16 is connected to the third resistor R16. The third capacitor C21 is connected in parallel with the fourth resistor R24. The fifth resistor R17 is connected to the input terminal of the second operational amplifier U8 and grounded. The positive input terminal of the second operational amplifier is connected to the negative output terminal of the second operational amplifier U8 through the sixth resistor R25 and is connected to the fifth resistor R17. The fourth capacitor C22 is connected in parallel with the sixth resistor R25. The fifth capacitor C38 is connected to the positive output terminal of the second operational amplifier and grounded through the seventh resistor R32. The eighth resistor R40 is connected to the seventh resistor R32. The sixth capacitor C40 is connected to the negative output terminal of the second operational amplifier and grounded through the ninth resistor R33. The tenth resistor R41 is connected to the ninth resistor R33.

[0029] Preferably, the second operational amplifier U8 is a fully differential amplifier with a bandwidth of 200MHz, low noise, and low power, including but not limited to the ADI LTC6403 operational amplifier.

[0030] Preferably, a filter circuit is used to remove high-frequency noise from the input analog signal, thereby improving signal purity and reducing the impact of external interference. The filter circuit includes: a first filter capacitor C10, a second filter capacitor C37, and a third filter capacitor C39.

[0031] One end of the first filter capacitor C10 is connected to a 2V 5A power supply, and the other end is grounded.

[0032] The second filter capacitor C37 and the third filter capacitor C39 are connected in parallel, with one end connected to a -2V 5A power supply and the other end grounded.

[0033] This disclosure may be a system and / or a computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of this disclosure.

[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of this utility model and not to limit it. Although the utility model has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of this utility model. Any modifications or equivalent substitutions that do not depart from the spirit and scope of this utility model should be covered within the protection scope of the claims of this utility model.

Claims

1. An operational amplifier conditioning circuit, characterized in that, include: Follower circuit, third resistor R16 and single-ended differential circuit; A follower circuit is used to acquire analog signals without distortion and transmit them to a single-ended differential circuit. A single-ended differential circuit is used to convert the acquired analog signal into a differential analog signal to minimize external interference. The follower circuit and the single-ended differential circuit are connected through a third resistor (R16).

2. The operational amplifier conditioning circuit as described in claim 1, characterized in that: The follower circuit includes: a first resistor (R5), a first operational amplifier (U4), a second resistor (R9), a first capacitor (C9), and a second capacitor (C2); The first resistor (R5) is connected to the input terminal of the first operational amplifier (U4), the second resistor (R9) is connected to the input terminal of the first operational amplifier (U4) and grounded, the first capacitor (C9) is connected to the positive power supply of the first operational amplifier (U4) and grounded, the second capacitor (C2) is connected to the negative power supply of the first operational amplifier (U4) and grounded, and the input terminal and output terminal of the first operational amplifier (U4) are connected.

3. The operational amplifier conditioning circuit as described in claim 1, characterized in that: The first operational amplifier (U4) is an operational amplifier with a bandwidth of 180MHz and a current of 1mA.

4. The operational amplifier conditioning circuit as described in claim 1, characterized in that: The single-ended differential circuit includes: the fourth resistor (R24), the second operational amplifier (U8), the third capacitor (C21), the fourth capacitor (C22), the fifth capacitor (C38), the sixth capacitor (C40), the fifth resistor (R17), the sixth resistor (R25), the seventh resistor (R32), the eighth resistor (R40), the ninth resistor (R33), and the tenth resistor (R41). The negative input terminal of the second operational amplifier (U8) is connected to the positive output terminal of the second operational amplifier (U8) through the fourth resistor (R24). The third capacitor (C21) is connected in parallel with the fourth resistor (R24). The fifth capacitor (C38) is connected to the positive output terminal of the second operational amplifier and grounded through the seventh resistor (R32). The eighth resistor (R40) is connected to the seventh resistor (R32).

5. The operational amplifier conditioning circuit as described in claim 4, characterized in that: The negative input terminal of the second operational amplifier (U8) is connected to the output terminal of the first operational amplifier (U4) in the follower circuit through the third resistor (R16).

6. The operational amplifier conditioning circuit as described in claim 4, characterized in that: The fifth resistor (R17) is connected to the positive input terminal of the second operational amplifier (U8) and grounded. The positive input terminal of the second operational amplifier is connected to the negative output terminal of the second operational amplifier (U8) through the sixth resistor (R25) and connected to the fifth resistor (R17). The fourth capacitor (C22) is connected in parallel with the sixth resistor (R25). The sixth capacitor (C40) is connected to the negative output terminal of the second operational amplifier and grounded through the ninth resistor (R33). The tenth resistor (R41) is connected to the ninth resistor (R33).

7. The operational amplifier conditioning circuit as described in claim 5, characterized in that: The second operational amplifier (U8) is a fully differential operational amplifier with a bandwidth of 200MHz.

8. The operational amplifier conditioning circuit as described in claim 1, characterized in that: A filter circuit is used to remove high-frequency noise from the input analog signal.

9. The operational amplifier conditioning circuit as described in claim 1, characterized in that: The filter circuit includes: a first filter capacitor (C10), a second filter capacitor (C37), and a third filter capacitor (C39). One end of the first filter capacitor (C10) is connected to a 2V 5A power supply, and the other end is grounded.

10. The operational amplifier conditioning circuit as described in claim 8, characterized in that: The second filter capacitor (C37) and the third filter capacitor (C39) are connected in parallel, with one end connected to a -2V 5A power supply and the other end grounded.

Images