Port multiplexing circuit and electronic equipment

By using a combination of control circuits, DC blocking circuits, and conversion circuits in electronic devices, port multiplexing for charging status detection and charging function control is achieved, solving the problem of limited microprocessor port resources and reducing hardware costs.

CN223942685UActive Publication Date: 2026-02-24SHENZHEN GEEKVAPE TECH CO LTD
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Patent Information

Application Number
CN202520214159.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-10
Publication Date
2026-02-24
Estimated Expiration
2035-02-10

AI Technical Summary

Technical Problem

During the charging process of electronic devices, the microprocessor port resources are scarce, resulting in high hardware costs and an inability to effectively realize charging status detection and charging function control.

Method used

The charging status signal is received by the control circuit and a square wave signal is output. The DC blocking circuit is used to shield the influence of DC signal. The conversion circuit converts the square wave signal into a disable signal, thereby controlling the charging circuit to disable the charging function and saving port resources.

Benefits of technology

Port reuse for charging status detection and charging enable control has been implemented, reducing hardware costs.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A port multiplexing circuit and electronic equipment belong to the technical field of electronic circuits, and are characterized in that a charging state signal is accessed through an input / output end by a control circuit, and a square wave signal is output from the input / output end in response to a condition that the temperature is greater than a preset value; the direct current blocking circuit carries out direct current blocking and alternating current blocking processing on the square wave signal; the conversion circuit is used for converting the square wave signal subjected to direct current blocking and alternating current alternating current blocking into a forbidden signal; the charging circuit outputs a charging state signal and disables a charging function in response to a disable signal; therefore, port resources are saved, and hardware cost is saved.
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Description

Technical Field

[0001] This application belongs to the field of electronic circuit technology, and in particular relates to a port multiplexing circuit and electronic device. Background Technology

[0002] Electronic devices typically need the following functions when charging: When charging the battery, it is necessary to detect the charging status to indicate to the user whether charging is in progress or completed. Therefore, a typical charging chip has a status pin to indicate the charging status. During the charging process, if the battery temperature or the circuit board temperature is detected to be too high, it is necessary to control the charging chip to temporarily stop charging. Therefore, a charging control circuit is required.

[0003] The schematic diagram of the charging control circuit is as follows: Figure 1 As shown, the charging status pin of the charging chip is generally an open-drain output. An open-drain output cannot output a high level. Therefore, the function of the fourth resistor R4 is to give the charging status pin an initial high level. When the charging chip is charging, the charging status pin will be pulled low by the charging chip, that is, the microprocessor detects a low level. When the battery is fully charged, the charging chip will release the charging status pin, and the pin will be pulled high by the external pull-up resistor (the fourth resistor R4), so the microprocessor detects a high level.

[0004] The function of the third resistor R3 is to provide a default low level to the charging enable pin, that is, to enable charging by default. When the microcontroller detects that the temperature of the battery or printed circuit board (PCB) is not within the normal operating temperature range, the microprocessor output pin will output a high level, and the charging function will be disabled until the temperature of the battery or PCBA returns to the normal range. Then the microcontroller will output a low level to enable charging again.

[0005] In summary, to detect the charging status and control the charging function, two ports of the microprocessor are required. When microprocessor port resources are limited, there may be a shortage of ports. Therefore, a higher-performance microprocessor is usually required, resulting in higher hardware costs.

[0006] Therefore, there is an urgent need to provide a port multiplexing circuit to save port resources and reduce hardware costs. Utility Model Content

[0007] The purpose of this application is to provide a port multiplexing circuit and electronic device, which aims to solve the problems of insufficient port resources and high hardware costs in related electronic devices.

[0008] This application provides a port multiplexing circuit, including:

[0009] A control circuit is used to receive a charging status signal through an input / output terminal, and to output a square wave signal from the input / output terminal in response to the temperature being greater than a preset value.

[0010] A DC blocking circuit, connected to the control circuit, is used to perform DC blocking and AC passing processing on the square wave signal;

[0011] A conversion circuit, connected to the DC blocking circuit, is used to convert the square wave signal after DC blocking and AC switching into a disable signal;

[0012] The charging circuit, connected to the conversion circuit, the control circuit, and the DC blocking circuit, is used to output the charging status signal and disable the charging function in response to the disable signal.

[0013] In one embodiment, the conversion circuit includes:

[0014] A first switching circuit, connected to the DC blocking circuit, is used to output a first voltage in response to the square wave signal after DC blocking and AC switching.

[0015] The first energy storage circuit is connected to the first switching circuit and is used to charge according to the first voltage and output the energy storage voltage.

[0016] A second switching circuit, connected to the first energy storage circuit and the conversion circuit, is used to output the disable signal in response to the energy storage voltage.

[0017] or

[0018] The conversion circuit includes:

[0019] The third switching circuit is connected to the DC blocking circuit and is used to output a second voltage in response to the square wave signal after DC blocking and AC switching.

[0020] The second energy storage circuit, connected to the third switching circuit and the conversion circuit, is used to charge the circuit with the first voltage and output the disable signal.

[0021] In one embodiment, both the first switching circuit and the third switching circuit include a switching module; the switching module includes a first field-effect transistor and a first resistor.

[0022] The source of the first field-effect transistor and the first terminal of the first resistor are connected to the power supply.

[0023] The drain of the first field-effect transistor forms the output terminal of the switching module;

[0024] The gate of the first field-effect transistor is connected to the second end of the first resistor and together they form the control terminal of the switching module, which is connected to the DC blocking circuit to receive the square wave signal after DC blocking and AC passing.

[0025] In one embodiment, both the first energy storage circuit and the second energy storage circuit include an energy storage module; the energy storage module includes a first capacitor, a second resistor, and a third resistor.

[0026] The first end of the second resistor constitutes the input terminal of the energy storage module;

[0027] The second end of the second resistor is connected to the first end of the first capacitor and the first end of the third resistor, and together they form the output end of the energy storage module;

[0028] The second terminal of the first capacitor and the second terminal of the third resistor are both connected to the power supply ground.

[0029] In one embodiment, the second switching circuit includes a second field-effect transistor and a fourth resistor;

[0030] The gate of the second field-effect transistor forms the input terminal of the second switching circuit and is connected to the first energy storage circuit to receive the energy storage voltage;

[0031] The drain of the second field-effect transistor and the first end of the fourth resistor are connected and together form the output terminal of the second switching circuit, which is connected to the charging circuit to output the disable signal;

[0032] The source of the second field-effect transistor is connected to the power supply ground.

[0033] In one embodiment, it further includes:

[0034] A pull-up circuit, connected to the control circuit, the charging circuit and the DC blocking circuit, is used to pull up the charging status signal;

[0035] The control circuit is specifically used to receive the pulled-up charging status signal through one of the input / output terminals, and to output the square wave signal from the input / output terminal in response to the temperature being greater than the preset value.

[0036] In one embodiment, it further includes:

[0037] A current limiting circuit, connected to the control circuit, the charging circuit and the DC blocking circuit, is used to limit the current of the charging status signal;

[0038] The control circuit is specifically used to receive the current-limited charging status signal through one of the input / output terminals, and to output the square wave signal from the input / output terminal in response to the temperature being greater than the preset value.

[0039] In one embodiment, the charging circuit includes a charging chip;

[0040] The charging indicator terminal of the charging chip constitutes the charging status signal output terminal of the charging circuit, and is connected to the control circuit and the DC blocking circuit to output the charging status signal.

[0041] The charging enable terminal of the charging chip constitutes the disable signal input terminal of the charging circuit, and is connected to the conversion circuit to receive the disable signal.

[0042] In one embodiment, the control circuitry includes a microprocessor;

[0043] The input and output terminals of the microprocessor constitute the input and output terminals of the control circuit, and are electrically connected to the charging circuit and the DC blocking circuit to output the square wave signal or receive the charging status signal.

[0044] This utility model embodiment also provides an electronic device, which includes the above-described port multiplexing circuit.

[0045] The beneficial effects of this utility model embodiment compared with the prior art are as follows: Since the control circuit receives the charging status signal and outputs a square wave signal through the same input and output terminal, the DC blocking circuit shields the influence of the charging status signal and only outputs the square wave signal after DC blocking and AC conversion. The conversion circuit converts the square wave signal after DC blocking and AC conversion into a disable signal, so that the charging circuit responds to the disable signal and disables the charging function; thus, charging status detection and charging enable control can be realized through the input and output port of a single control circuit, saving port resources and reducing hardware costs. Attached Figure Description

[0046] To more clearly illustrate the technical utility model in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This is a schematic diagram of a related electronic device.

[0048] Figure 2 A schematic diagram of a port multiplexing circuit provided in an embodiment of this application;

[0049] Figure 3 A schematic diagram of a conversion circuit in a port multiplexing circuit provided in an embodiment of this application;

[0050] Figure 4 A schematic diagram of another structure of the conversion circuit in a port multiplexing circuit provided in an embodiment of this application;

[0051] Figure 5 A schematic diagram of another structure of the port multiplexing circuit provided in one embodiment of this application;

[0052] Figure 6 A schematic diagram of another structure of the port multiplexing circuit provided in one embodiment of this application;

[0053] Figure 7 A partial example circuit schematic of a port multiplexing circuit provided in an embodiment of this application;

[0054] Figure 8 This is a partial example circuit schematic of a port multiplexing circuit provided in one embodiment of this application. Detailed Implementation

[0055] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0056] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0057] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0058] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0059] Figure 2 A schematic diagram of a port multiplexing circuit provided in a preferred embodiment of this application is shown. For ease of explanation, only the parts relevant to this embodiment are shown, and are described in detail below:

[0060] The aforementioned port multiplexing circuit includes a control circuit 01, a DC blocking circuit 02, a conversion circuit 03, and a charging circuit 04.

[0061] Control circuit 01 is used to receive a charging status signal through an input / output terminal, and to output a square wave signal from the input / output terminal in response to the temperature being greater than a preset value.

[0062] DC blocking circuit 02 is connected to control circuit 01 and is used to perform DC blocking and AC passing processing on square wave signals.

[0063] The conversion circuit 03, connected to the DC blocking circuit 02, is used to convert the square wave signal after DC blocking and AC blocking into a disable signal.

[0064] The charging circuit 04 is connected to the conversion circuit 03, the control circuit 01 and the DC blocking circuit 02. It is used to output a charging status signal and disable the charging function in response to a disable signal.

[0065] It is understood that the control circuit 01 includes a microprocessor, and the DC blocking circuit 02 may include a capacitor assembly, which includes at least one capacitor connected in series and / or in parallel. The temperature may be the temperature of the battery assembly connected to the charging circuit 04 and / or the temperature of the PCB where the port multiplexing circuit is located.

[0066] In a specific implementation, the charging status pin of the charging circuit 04 is connected to an input / output terminal of the control circuit 01. This input / output terminal is configured as an input mode by default in the microprocessor of the control circuit 01. When in the charging state, the charging status pin is pulled down to a low level by the charging circuit 04, so the microprocessor will detect the low level. When charging is complete, the charging circuit 04 will release the charging status detection pin, so the charging status pin will output a high level. At this time, the input / output terminal of the control circuit 01 will detect the high level. Therefore, the control circuit 01 can detect the charging status according to the level of the input / output terminal.

[0067] Since the control circuit 01, the DC blocking circuit 02, and the charging circuit 04 are all connected to node A, when the signal at node A is always high or always low, the DC blocking circuit 02 can be considered as disconnected in the port multiplexing circuit due to its presence. Therefore, the conversion circuit 03 stops working, that is, the conversion circuit 03 stops outputting the disable signal, and the charging circuit 04 starts charging.

[0068] When the temperature of the battery pack or PCB is detected to be higher than the preset value during charging, the control circuit 01 needs to configure the input / output terminal to output mode and continuously output a square wave signal (frequency can be 1KHz). At this time, the signal at node A is a square wave signal. This square wave signal will cause the conversion circuit 03 to work through the DC blocking circuit 02. That is, the conversion circuit 03 outputs a disable signal to disable the charging function of the charging circuit 04. Once the temperature of the battery pack or PCB is detected to return to the normal range, the input / output terminal of the control circuit 01 is reconfigured as an input pin. At this time, the conversion circuit 03 stops outputting the disable signal, and the charging function of the charging circuit 04 is enabled.

[0069] like Figure 3 As shown, the conversion circuit 03 includes a first switching circuit 031, a first energy storage circuit 032, and a second switching circuit 033.

[0070] The first switching circuit 031 is connected to the DC blocking circuit 02 and is used to output the first voltage in response to the square wave signal after DC blocking and AC switching.

[0071] The first energy storage circuit 032 is connected to the first switching circuit 031 and is used to charge according to the first voltage and output the energy storage voltage.

[0072] The second switching circuit 033 is connected to the first energy storage circuit 032 and the conversion circuit 03, and is used to output a disable signal in response to the energy storage voltage.

[0073] It is understandable that the first energy storage component may include a capacitor component.

[0074] It should be noted that the square wave signal will cause the first switching circuit 031 to repeatedly turn on and off through the DC blocking circuit 02. When the first switching circuit 031 is on, it will charge the first energy storage circuit 032. Therefore, as long as the square wave signal continues to be output, the energy storage voltage will be charged to a high level. The level of the disable signal output by the second switching circuit 033 is opposite in polarity to the level of the energy storage voltage, that is, the disable signal is a low level.

[0075] The above technical solution converts the square wave signal after DC blocking and AC switching into a low-level disable signal, which is compatible with the charging chip in the charging circuit 04 where the charging enable pin is low-level disable.

[0076] like Figure 4 As shown, the conversion circuit 03 includes a third switching circuit 034 and a second energy storage circuit 035.

[0077] The third switching circuit 034 is connected to the DC blocking circuit 02 and is used to output a second voltage in response to the square wave signal after DC blocking and AC switching.

[0078] The second energy storage circuit 035 is connected to the third switching circuit 034 and the conversion circuit 03, and is used to charge the first voltage and output a disable signal.

[0079] It is understandable that the second energy storage component may include a capacitor component.

[0080] It should be noted that the square wave signal will cause the third switching circuit 034 to be repeatedly turned on and off through the DC blocking circuit 02. When the third switching circuit is turned on, it will charge the second energy storage circuit 035. Therefore, as long as the square wave signal is continuously output, the disable signal will be charged to a high level.

[0081] The above technical solution converts the square wave signal after DC blocking and AC switching into a high-level disable signal, which is compatible with the charging chip in the charging circuit 04 where the charging enable pin is high-level disable.

[0082] like Figure 5 As shown, the port multiplexing circuit mentioned above also includes a pull-up circuit 05.

[0083] Pull-up circuit 05 is connected to control circuit 01, charging circuit 04 and DC blocking circuit 02, and is used to pull up the charging status signal;

[0084] The control circuit 01 is specifically used to receive the pulled-up charging status signal through an input / output terminal, and to output a square wave signal from the input / output terminal in response to the temperature being greater than a preset value.

[0085] It is understood that the pull-up circuit 05 may include a resistor assembly. The resistor assembly includes at least one resistor connected in series and / or in parallel.

[0086] In specific implementation, the charging status pin of the charging chip in the charging circuit 04 is generally an open-drain output. Since the open-drain output cannot output a high level, the function of the pull-up circuit 05 is to give the charging status pin an initial high level. When the charging chip is charging, the charging status pin will be pulled low by the charging chip, that is, the control circuit 01 detects a low level. When the battery pack is fully charged, the charging chip will release the charging status pin, and the charging status pin will be pulled high by the external pull-up circuit 05, and the control circuit 01 will detect a high level.

[0087] The above technical solution pulls up the charging status signal, adapting it to the charging chip in charging circuit 04 with open-drain output of the charging status pin.

[0088] like Figure 6 As shown, the port multiplexing circuit also includes a current limiting circuit 06.

[0089] The current limiting circuit 06 is connected to the control circuit 01, the charging circuit 04 and the DC blocking circuit 02, and is used to limit the current of the charging status signal.

[0090] The control circuit 01 is specifically used to receive the current-limited charging status signal through an input / output terminal, and to output a square wave signal from the input / output terminal in response to the temperature being greater than a preset value.

[0091] It is understandable that the current limiting circuit 06 may include a current limiting resistor.

[0092] By using the above technical solution, current limiting of the charging status signal is achieved, thereby improving the reliability and safety of the port multiplexing circuit.

[0093] Figure 7 This invention illustrates a partial example circuit structure of a port multiplexing circuit provided in an embodiment of the present invention. Figure 8 The diagram illustrates another partial example circuit structure of the port multiplexing circuit provided in this embodiment of the present invention. For ease of explanation, only the parts relevant to this embodiment are shown, and are described in detail below:

[0094] Both the first switching circuit 031 and the third switching circuit 034 include a switching module; the switching module includes a first field-effect transistor M1 and a first resistor R1.

[0095] The source of the first field-effect transistor M1 and the first end of the first resistor R1 are connected to the power supply VCC. The drain of the first field-effect transistor M1 forms the output terminal of the switching module. The gate of the first field-effect transistor M1 is connected to the second end of the first resistor R1 and together they form the control terminal of the switching module, which is connected to the DC blocking circuit O2 to receive the square wave signal after DC blocking and AC passing.

[0096] It should be noted that when the switch module is applied to the first switch circuit 031, the output terminal of the switch module is connected to the first energy storage circuit 032 to output the first voltage; when the switch module is applied to the third switch circuit 034, the output terminal of the switch module is connected to the second energy storage circuit 035 to output the second voltage.

[0097] The first field-effect transistor M1 can be a P-channel metal-oxide-semiconductor (PMOS) transistor.

[0098] This switch module is simple, reliable, and low in cost.

[0099] Both the first energy storage circuit 032 and the second energy storage circuit 035 include an energy storage module; the energy storage module includes a first capacitor C1, a second resistor R2 and a third resistor R3.

[0100] The first end of the second resistor R2 forms the input terminal of the energy storage module; the second end of the second resistor R2 is connected to the first end of the first capacitor C1 and the first end of the third resistor R3 and together they form the output terminal of the energy storage module; the second end of the first capacitor C1 and the second end of the third resistor R3 are connected to the power supply ground.

[0101] It should be noted that when the energy storage module is applied to the first energy storage circuit 032, the input terminal of the energy storage module is connected to the first switching circuit 031 to receive the first voltage; when the energy storage module is applied to the second energy storage circuit 035, the input terminal of the energy storage module is connected to the third switching circuit 034 to receive the second voltage.

[0102] When the energy storage module is applied to the first energy storage circuit 032, the output terminal of the energy storage module is connected to the second switching circuit 033 to output the energy storage voltage; when the energy storage module is applied to the second energy storage circuit 035, the output terminal of the energy storage module is connected to the charging circuit 04 to output a disable signal.

[0103] By setting a second resistor R2 to limit the current of the first and second voltages, the reliability and safety of the port multiplexing circuit are improved.

[0104] The second switching circuit 033 includes a second field-effect transistor M2 and a fourth resistor R4.

[0105] The gate of the second field-effect transistor M2 forms the input terminal of the second switching circuit 033 and is connected to the first energy storage circuit 032 to receive the energy storage voltage; the drain of the second field-effect transistor M2 and the first end of the fourth resistor R4 are connected and together form the output terminal of the second switching circuit 033, which is connected to the charging circuit 04 to output a disable signal; the source of the second field-effect transistor M2 is connected to the power supply ground.

[0106] It should be noted that the second field-effect transistor M2 is an N-channel metal-oxide-semiconductor (NMOS) transistor.

[0107] The second switching circuit 033 is simple, reliable, and low in cost.

[0108] The charging circuit 04 includes the charging chip U1.

[0109] The charging indicator terminal CHRG of the charging chip U1 constitutes the charging status signal output terminal of the charging circuit 04, and is connected to the control circuit 01 and the DC blocking circuit 02 to output the charging status signal; the charging function enable terminal EN of the charging chip U1 constitutes the disable signal input terminal of the charging circuit 04, and is connected to the conversion circuit 03 to receive the disable signal.

[0110] The control circuit 01 includes a microprocessor U2.

[0111] The input / output terminal P1.0 of the microprocessor U2 constitutes the input and output terminals of the control circuit 01, and is electrically connected to the charging circuit 04 and the DC blocking circuit 02 to output a square wave signal or receive a charging status signal.

[0112] The DC blocking circuit 02 includes a second capacitor C2; the first end of the second capacitor C2 forms the input terminal of the DC blocking circuit 02 and is connected to the control circuit 01 and the charging circuit 04 to receive a square wave signal; the second end of the second capacitor C2 forms the output terminal of the DC blocking circuit 02 and is connected to the conversion circuit 03 to receive the square wave signal after DC blocking and AC switching.

[0113] The current limiting circuit 06 includes a sixth resistor R6; the first end of the sixth resistor R6 is connected to the charging circuit 04, and the second end of the sixth resistor R6 is connected to the control circuit 01 and the DC blocking circuit 02.

[0114] The following is based on the working principle. Figures 7 to 8 Further explanation is provided below:

[0115] exist Figure 7 In the circuit, the charging indicator terminal CHRG of the charging chip U1 is connected to the input / output terminal P1.0 of the microprocessor U2. This input / output terminal is configured as input mode by default in the microprocessor U2. When charging, the charging indicator terminal CHRG is pulled down to a low level by the charging chip U1, so the microprocessor U2 will detect the low level. When charging is complete, the charging chip U1 will release the charging indicator terminal CHRG, so the charging indicator terminal CHRG outputs a high level. At this time, the input / output terminal P1.0 of the microprocessor U2 will detect the high level. Therefore, the microprocessor U2 can detect the charging status according to the level of the input / output terminal P1.0.

[0116] Since the microprocessor U2, the second capacitor C2, and the charging chip U1 are all connected to node A, when the signal at node A is always high or always low, the second capacitor C2 can be considered as open in the port multiplexing circuit due to its presence. Therefore, the conversion circuit 03 stops working, that is, the conversion circuit 03 stops outputting the disable signal, and the charging circuit 04 starts charging.

[0117] When the temperature of the battery pack or PCB is detected to be higher than the preset value during charging, the microprocessor U2 needs to configure the input / output terminal P1.0 to output mode and continuously output a square wave signal (frequency can be 1KHz). At this time, the signal at node A is the square wave signal. This square wave signal will cause the first field-effect transistor M1 to repeatedly turn on and off through the action of the second capacitor C2. When the first field-effect transistor M1 is turned on, it will charge the first capacitor C1 through the second resistor R2. Therefore, as long as the square wave signal is continuously output, the voltage on the first capacitor C1 will be charged to a high level, that is, the conversion circuit 03 outputs a high-level disable signal to disable the charging function of the charging circuit 04. Once the temperature of the battery pack or PCB is detected to return to the normal range, the input / output terminal P1.0 of the microprocessor U1 is reconfigured as an input pin. At this time, the conversion circuit 03 stops outputting the disable signal, and the charging function of the charging circuit 04 is enabled.

[0118] Figure 8 The circuit shown is Figure 7 The difference in the circuit shown is that the voltage on the first capacitor C1 will be charged to a high level, which will trigger the second field-effect transistor M2 to conduct, thereby outputting a low-level disable signal to disable the charging function of the charging circuit 04. Figure 8 The remaining circuits shown are Figure 7 The circuit shown is the same, so it will not be described again here.

[0119] This utility model embodiment also provides an electronic device, which includes the above-described port multiplexing circuit.

[0120] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0121] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A port multiplexing circuit, characterized in that, include: A control circuit is used to receive a charging status signal through an input / output terminal, and to output a square wave signal from the input / output terminal in response to the temperature being greater than a preset value. A DC blocking circuit, connected to the control circuit, is used to perform DC blocking and AC passing processing on the square wave signal; A conversion circuit, connected to the DC blocking circuit, is used to convert the square wave signal after DC blocking and AC switching into a disable signal; The charging circuit, connected to the conversion circuit, the control circuit, and the DC blocking circuit, is used to output the charging status signal and disable the charging function in response to the disable signal.

2. The port multiplexing circuit as described in claim 1, characterized in that, The conversion circuit includes: A first switching circuit, connected to the DC blocking circuit, is used to output a first voltage in response to the square wave signal after DC blocking and AC switching. The first energy storage circuit is connected to the first switching circuit and is used to charge according to the first voltage and output the energy storage voltage. A second switching circuit, connected to the first energy storage circuit and the conversion circuit, is used to output the disable signal in response to the energy storage voltage. or The conversion circuit includes: The third switching circuit is connected to the DC blocking circuit and is used to output a second voltage in response to the square wave signal after DC blocking and AC switching. The second energy storage circuit, connected to the third switching circuit and the conversion circuit, is used to charge the circuit with the first voltage and output the disable signal.

3. The port multiplexing circuit as described in claim 2, characterized in that, Both the first and third switching circuits include a switching module; the switching module includes a first field-effect transistor and a first resistor; The source of the first field-effect transistor and the first terminal of the first resistor are connected to the power supply. The drain of the first field-effect transistor forms the output terminal of the switching module; The gate of the first field-effect transistor is connected to the second end of the first resistor and together they form the control terminal of the switching module, which is connected to the DC blocking circuit to receive the square wave signal after DC blocking and AC passing.

4. The port multiplexing circuit as described in claim 2, characterized in that, Both the first energy storage circuit and the second energy storage circuit include an energy storage module; the energy storage module includes a first capacitor, a second resistor, and a third resistor; The first end of the second resistor constitutes the input terminal of the energy storage module; The second end of the second resistor is connected to the first end of the first capacitor and the first end of the third resistor, and together they form the output end of the energy storage module; The second terminal of the first capacitor and the second terminal of the third resistor are both connected to the power supply ground.

5. The port multiplexing circuit as described in claim 2, characterized in that, The second switching circuit includes a second field-effect transistor and a fourth resistor; The gate of the second field-effect transistor forms the input terminal of the second switching circuit and is connected to the first energy storage circuit to receive the energy storage voltage; The drain of the second field-effect transistor and the first end of the fourth resistor are connected and together form the output terminal of the second switching circuit, which is connected to the charging circuit to output the disable signal; The source of the second field-effect transistor is connected to the power supply ground.

6. The port multiplexing circuit as described in claim 4, characterized in that, Also includes: A pull-up circuit, connected to the control circuit, the charging circuit and the DC blocking circuit, is used to pull up the charging status signal; The control circuit is specifically used to receive the pulled-up charging status signal through one of the input / output terminals, and to output the square wave signal from the input / output terminal in response to the temperature being greater than the preset value.

7. The port multiplexing circuit as described in claim 1, characterized in that, Also includes: A current limiting circuit, connected to the control circuit, the charging circuit and the DC blocking circuit, is used to limit the current of the charging status signal; The control circuit is specifically used to receive the current-limited charging status signal through one of the input / output terminals, and to output the square wave signal from the input / output terminal in response to the temperature being greater than the preset value.

8. The port multiplexing circuit as described in claim 1, characterized in that, The charging circuit includes a charging chip; The charging indicator terminal of the charging chip constitutes the charging status signal output terminal of the charging circuit, and is connected to the control circuit and the DC blocking circuit to output the charging status signal. The charging enable terminal of the charging chip constitutes the disable signal input terminal of the charging circuit, and is connected to the conversion circuit to receive the disable signal.

9. The port multiplexing circuit as described in claim 1, characterized in that, The control circuit includes a microprocessor; The input and output terminals of the microprocessor constitute the input and output terminals of the control circuit, and are electrically connected to the charging circuit and the DC blocking circuit, for outputting the square wave signal or receiving the charging status signal.

10. An electronic device, characterized in that, The electronic device includes a port multiplexing circuit as described in any one of claims 1 to 9.