Novel bit error rate test circuit

Abstract

The utility model discloses a novel bit error rate test circuit which comprises an MCU controller, a clock source circuit and a signal shaping circuit. And the MCU controller is connected with the two to realize a control function. The clock source circuit extracts a clock signal and provides a time reference for the signal shaping circuit. The signal shaping circuit is composed of a chip U603, a crystal oscillator Y2, a plurality of capacitors, resistors and the like and can filter input signals in a balanced mode and compensate transmission distortion. In a data transmission and processing system, a stable clock is crucial, so that a chip U603 can accurately sample and process an input signal, and error codes and data loss are avoided. Meanwhile, a resistor (such as R630) and a capacitor (such as C616, C617 and the like) in the circuit form a power supply filtering decoupling network, the power supply voltage is smoothed, the influence of fluctuation on the chip U603 is reduced, and the overall reliability of the circuit is improved.

Description

Technical Field

[0001] This utility model belongs to the field of signal testing technology, specifically a novel bit error rate testing circuit. Background Technology

[0002] Bit error rate (BER) testing, as a key technical means, is mainly used to accurately assess the probability of erroneous symbols occurring in a data transmission system or communication link during data transmission. In actual testing, a set of pre-defined and clearly structured specific data sequences is usually sent out at the transmitting end. This sequence often takes the form of a pseudo-random sequence, which can effectively simulate real data transmission scenarios due to its good randomness and repeatability.

[0003] In existing bit error rate testing devices, signal distortion can occur during transmission due to the characteristics of the transmission medium (such as the resistance, capacitance, and inductance of cables) and external interference (such as electromagnetic interference and noise), leading to deviations in the bit error rate test results. Utility Model Content

[0004] The purpose of this invention is to provide a novel bit error rate (BER) testing circuit to solve the problem in the prior art mentioned in the background that the BER test results are biased due to interference from the transmission medium or external factors.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by this utility model is as follows:

[0006] A novel bit error rate (BER) testing circuit includes an MCU controller, a clock source circuit, and a signal shaping circuit. The MCU controller is connected to both the clock source circuit and the signal shaping circuit. The MCU controller controls both the clock source circuit and the signal shaping circuit. The clock source circuit extracts a clock signal to provide a time reference for the signal shaping circuit.

[0007] The signal shaping circuit is used to equalize and filter the input signal, compensating for the distortion generated during signal transmission. The signal shaping circuit includes chip U603, crystal oscillator Y2, diode D207, capacitors C616, C617, C618, C619, C620, C722, C723, C740, C749, C750, resistors R627, R628, R630, R748, R774, R775, R776, R777, R780, R781, R782, R783, R799, and resistor R801.

[0008] Pin 1 of chip U603 is connected to pin 3 of crystal oscillator Y2, and pins 2 and 4 of crystal oscillator Y2 are both grounded; pin 1 of crystal oscillator Y2 is connected to pin 2 of chip U603; pin 3 of chip U603 is connected to one end of resistor R628, and pin 4 of chip U603 is connected to one end of resistor R627; the other ends of resistors R628 and R627 are both grounded; pin 6 of chip U603 is connected to one end of capacitor C749, and the other end of capacitor C749 is connected to one end of resistor R774, and the other end of resistor R774 is grounded.

[0009] Pin 7 of chip U603 is connected to pin 11 of chip U603, one end of capacitor C619, and one end of capacitor C620; pin 8 of chip U603 is connected to one end of resistor R630 and one end of resistor R748; the other end of resistor R748 is connected to diode D207, and the other end of diode D207 is grounded; the other end of resistor R630 is connected to the power supply.

[0010] Pin 12 of chip U603 is connected to the MCU controller; pin 15 of chip U603 is connected to pin 16 of chip U603, capacitor C618, and one end of capacitor C740; the other ends of capacitor C618 and capacitor C740 are grounded.

[0011] Pin 17 of chip U603 is connected to one end of capacitor C722, the other end of capacitor C722 is connected to one end of resistor R799, and the other end of resistor R799 is grounded; pin 18 of chip U603 is connected to one end of capacitor C723.

[0012] Pin 19 of chip U603 is connected to the MCU controller; pin 20 of chip U603 is connected to pin 24 of chip U603, one end of capacitor C617, and one end of capacitor C616; the other end of capacitor C616 is connected to pins 23 and 25 of chip U603; the other end of capacitor C617 is grounded; pin 21 of chip U603 is connected to one end of capacitor C750, the other end of capacitor C750 is connected to one end of resistor R777, and the other end of resistor R777 is connected to one end of resistor R776; pin 22 of chip U603 is connected to one end of resistor R801, and the other end of resistor R801 is connected to one end of resistor R775 and the other end of resistor R776.

[0013] According to the above technical solution, the other ends of capacitors C619 and C620 are grounded, and pins 7 and 11 of chip U603, capacitors C619 and C620 are all connected to the power supply.

[0014] According to the above technical solution, pins 15 and 16 of chip U603, capacitor C618, and capacitor C740 are all connected to the power supply.

[0015] According to the above technical solution, pins 25 and 23 of chip U603 and capacitor C616 are grounded; the other end of resistor R777 and the other end of resistor R776 are grounded; resistor R775 is also connected to the power supply; pins 20 and 24 of chip U603, capacitor C616 and capacitor C617 are all connected to the power supply.

[0016] According to the above technical solution, the other end of capacitor C723 is connected to one end of resistor R780 and one end of resistor R781 respectively. The other end of resistor R780 is connected to the power supply, and the other end of resistor R781 is grounded.

[0017] The other end of resistor R799 is also connected to one end of resistor R783 and one end of resistor R782 respectively. The other end of resistor R783 is connected to the power supply, and the other end of resistor R782 is grounded.

[0018] According to the above technical solution, the clock source circuit includes chip U21, resistors R205, R212, R218, R224, R225, R236, R237, R242, R243, R778, R785, R788, R789, R804, R805, R884, R885, R886, R887, R888, R889, R890, R891, and R892. Capacitors C182, C183, C189, C191, C193, C195, C197, C198, C202, C203, C204, C206, C209, C211, C213, C215, C216, C220, C229, C768, C771, C788, C789, C867, C868, C869, and C870;

[0019] Pins 1, 2, and 3 of chip U21 are connected to the MCU controller; pin 4 of chip U21 is connected to one end of resistors R804 and R805, with the other end of resistor R804 connected to the MCU controller and the other end of resistor R805 grounded; pin 5 of chip U21 is connected to one end of resistor R778, with the other end of resistor R778 connected to one end of resistor R218 and capacitor C204; the other end of resistor R281 is connected to one end of capacitor C197; the other end of capacitor C204 is connected to pin 7 of chip U21, the other end of capacitor C197, and one end of resistor R225.

[0020] Pin 6 of chip U21 is connected to the power supply and one end of capacitor C202; the other end of capacitor C202 is grounded.

[0021] The other end of resistor R225 is connected to one end of capacitor C211 and one end of resistor R224; the other end of capacitor C211 is grounded; the other end of resistor R224 is connected to pin 20 of chip U21.

[0022] Pins 8 and 9 of chip U21 are both grounded;

[0023] Pin 10 of chip U21 is connected to one end of capacitor C215 and the power supply, while the other end of capacitor C215 is grounded.

[0024] Pin 12 of chip U21 is connected to one end of resistors R785 and R236 respectively. The other end of resistor R785 is connected to one end of resistors R788 and R789 respectively. The other end of resistor R788 is connected to one end of capacitor C868, and the other end of capacitor C868 is connected to the digital-to-analog converter module. The other end of resistor R789 is connected to one end of capacitor C768, and the other end of capacitor C786 is connected to the digital-to-analog converter module.

[0025] The other end of resistor R236 is connected to one end of capacitor C221, one end of resistor R242, and the power supply, respectively. The other end of capacitor C221 is grounded. The other end of resistor R242 is connected to resistor R884 and pin 13 of chip U21, respectively. The other end of resistor R884 is connected to one end of resistors R885 and R886, respectively. The other end of resistor R885 is connected to one end of capacitor C867. The other end of capacitor C867 is connected to a digital-to-analog converter module. The other end of resistor R886 is connected to one end of capacitor C771, and the other end of capacitor C771 is connected to a digital-to-analog converter module.

[0026] Pin 14 of chip U21 is connected to one end of resistors R243 and R890 respectively; the other end of resistor R890 is connected to one end of resistors R891 and R892 respectively; the other end of resistor R891 is connected to one end of capacitor C870, and the other end of capacitor C870 is connected to a digital-to-analog converter module; the other end of resistor R892 is connected to one end of capacitor C229, and the other end of capacitor C229 is connected to a digital-to-analog converter module.

[0027] The other end of resistor R243 is connected to capacitor C220, one end of resistor R237, and the power supply; the other end of capacitor C220 is grounded; the other end of resistor R237 is connected to resistor R887 and pin 15 of chip U21; the other end of resistor R887 is connected to resistor R889 and one end of resistor R888; the other end of resistor R889 is connected to one end of capacitor C216, and the other end of capacitor C216 is connected to the digital-to-analog converter module; the other end of resistor R888 is connected to one end of capacitor C869, and the other end of capacitor C869 is connected to the digital-to-analog converter module.

[0028] Pin 16 of chip U21 is connected to one end of inductor L14, and the other end of inductor L14 is connected to one end of capacitor C213 and the power supply; the other end of capacitor C213 is grounded.

[0029] Pin 17 of chip U21 is connected to the power supply and one end of capacitor C209, with the other end of capacitor C209 grounded; pin 18 of chip U21 is grounded; pin 19 of chip U21 is connected to one end of capacitor C206, with the other end of capacitor C206 grounded; pin 20 of chip U21 is connected to one end of capacitor C203, with the other end of capacitor C203 grounded; pin 21 of chip U21 is grounded; pin 22 of chip U21 is connected to one end of capacitor C198, with the other end of capacitor C198 grounded; pin 23 of chip U21 is connected to one end of capacitors C193 and C195, with the other ends of capacitors C193 and C195 both grounded; pin 24 of chip U21 is connected to one end of capacitors C189 and C191, with the other ends of capacitors C189 and C191 both grounded.

[0030] Pin 33 of chip U21 is grounded.

[0031] According to the above technical solution, pin 25 of chip U21 is used to connect to the test point; pin 26 of chip U21 is connected to the test point and one end of resistor R212, and the other end of resistor R212 is grounded.

[0032] Pin 27 of chip U21 is grounded;

[0033] Pin 28 of chip U21 is connected to one end of capacitor C183 and the power supply; the other end of capacitor C183 is grounded.

[0034] Pin 29 of chip U21 is connected to one end of capacitor C485, and the other end of capacitor C485 is connected to one end of resistor R205; the other end of resistor R205 is connected to resistors R801, R775 and R776 respectively.

[0035] Pin 31 of chip U21 is connected to one end of capacitor C182, and the other end of capacitor C182 is connected to the power supply and pin 32 of chip U21.

[0036] Compared with the prior art, the present invention has the following beneficial effects:

[0037] In this invention, the clock signal is crucial for ensuring synchronized operation of all components in the data transmission and processing system. A stable clock ensures that the U603 chip can accurately sample and process input signals, avoiding bit errors and data loss caused by clock jitter or instability. Resistors (such as R630) and capacitors (such as C616 and C617) in the circuit form a power supply filtering and decoupling network. These components smooth the power supply voltage, reducing the impact of power fluctuations on the operation of the U603 chip. A stable power supply contributes to stable chip operation and improves the reliability of the entire circuit. Attached Figure Description

[0038] Figure 1 This is a circuit diagram of the signal shaping circuit of this utility model;

[0039] Figure 2 This is a circuit diagram of the clock source circuit of this utility model;

[0040] Figure 3 This is the circuit diagram of the MCU controller of this utility model. Detailed Implementation

[0041] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0042] Example 1

[0043] like Figure 1As shown, a novel bit error rate (BER) testing circuit includes an MCU controller, a clock source circuit, and a signal shaping circuit. The MCU controller is connected to both the clock source circuit and the signal shaping circuit. The MCU controller controls both the clock source circuit and the signal shaping circuit. The clock source circuit extracts a clock signal to provide a time reference for the signal shaping circuit.

[0044] The signal shaping circuit is used to equalize and filter the input signal, compensating for the distortion generated during signal transmission. The signal shaping circuit includes chip U603, crystal oscillator Y2, diode D207, capacitors C616, C617, C618, C619, C620, C722, C723, C740, C749, C750, resistors R627, R628, R630, R748, R774, R775, R776, R777, R780, R781, R782, R783, R799, and resistor R801.

[0045] Pin 1 of chip U603 is connected to pin 3 of crystal oscillator Y2, and pins 2 and 4 of crystal oscillator Y2 are both grounded; pin 1 of crystal oscillator Y2 is connected to pin 2 of chip U603; pin 3 of chip U603 is connected to one end of resistor R628, and pin 4 of chip U603 is connected to one end of resistor R627; the other ends of resistors R628 and R627 are both grounded; pin 6 of chip U603 is connected to one end of capacitor C749, and the other end of capacitor C749 is connected to one end of resistor R774, and the other end of resistor R774 is grounded.

[0046] Pin 7 of chip U603 is connected to pin 11 of chip U603, one end of capacitor C619, and one end of capacitor C620; pin 8 of chip U603 is connected to one end of resistor R630 and one end of resistor R748; the other end of resistor R748 is connected to diode D207, and the other end of diode D207 is grounded; the other end of resistor R630 is connected to the power supply.

[0047] Pin 12 of chip U603 is connected to the MCU controller; pin 15 of chip U603 is connected to pin 16 of chip U603, capacitor C618, and one end of capacitor C740; the other ends of capacitor C618 and capacitor C740 are grounded.

[0048] Pin 17 of chip U603 is connected to one end of capacitor C722, the other end of capacitor C722 is connected to one end of resistor R799, and the other end of resistor R799 is grounded; pin 18 of chip U603 is connected to one end of capacitor C723.

[0049] Pin 19 of chip U603 is connected to the MCU controller; pin 20 of chip U603 is connected to pin 24 of chip U603, one end of capacitor C617, and one end of capacitor C616; the other end of capacitor C616 is connected to pins 23 and 25 of chip U603; the other end of capacitor C617 is grounded; pin 21 of chip U603 is connected to one end of capacitor C750, the other end of capacitor C750 is connected to one end of resistor R777, and the other end of resistor R777 is connected to one end of resistor R776; pin 22 of chip U603 is connected to one end of resistor R801, and the other end of resistor R801 is connected to one end of resistor R775 and the other end of resistor R776.

[0050] In this invention, the clock signal is crucial for ensuring synchronized operation of all components in the data transmission and processing system. A stable clock ensures that the U603 chip can accurately sample and process input signals, avoiding bit errors and data loss caused by clock jitter or instability. Resistors (such as R630) and capacitors (such as C616 and C617) in the circuit form a power supply filtering and decoupling network. These components smooth the power supply voltage, reducing the impact of power fluctuations on the operation of the U603 chip. A stable power supply contributes to stable chip operation and improves the reliability of the entire circuit.

[0051] The technical solution of this utility model can process the input signal to compensate for the distortion generated during the transmission process, thereby achieving a more accurate bit error rate test.

[0052] Example 2

[0053] This embodiment is a further refinement of Embodiment 1.

[0054] The other ends of capacitors C619 and C620 are grounded, and pins 7 and 11 of chip U603, as well as capacitors C619 and C620, are all connected to the power supply.

[0055] Pins 15 and 16 of chip U603, capacitor C618, and capacitor C740 are all connected to the power supply.

[0056] Pins 25 and 23 of chip U603 and capacitor C616 are grounded; the other end of resistor R777 and the other end of resistor R776 are grounded; resistor R775 is also connected to the power supply; pins 20 and 24 of chip U603, capacitor C616 and capacitor C617 are all connected to the power supply.

[0057] The other end of capacitor C723 is connected to one end of resistor R780 and one end of resistor R781 respectively. The other end of resistor R780 is connected to the power supply, and the other end of resistor R781 is grounded.

[0058] The other end of resistor R799 is also connected to one end of resistor R783 and one end of resistor R782 respectively. The other end of resistor R783 is connected to the power supply, and the other end of resistor R782 is grounded.

[0059] The clock source circuit includes chip U21, resistors R205, R212, R218, R224, R225, R236, R237, R242, R243, R778, R785, R788, R789, R804, R805, R884, R885, R886, R887, R888, R889, R890, R891, R892, and capacitor C1. 82, C183, C189, C191, C193, C195, C197, C198, C202, C203, C204, C206, C209, C211, C213, C215, C216, C220, C229, C768, C771, C788, C789, C867, C868, C869, and C870;

[0060] Pins 1, 2, and 3 of chip U21 are connected to the MCU controller; pin 4 of chip U21 is connected to one end of resistors R804 and R805, with the other end of resistor R804 connected to the MCU controller and the other end of resistor R805 grounded; pin 5 of chip U21 is connected to one end of resistor R778, with the other end of resistor R778 connected to one end of resistor R218 and capacitor C204; the other end of resistor R281 is connected to one end of capacitor C197; the other end of capacitor C204 is connected to pin 7 of chip U21, the other end of capacitor C197, and one end of resistor R225.

[0061] Pin 6 of chip U21 is connected to the power supply and one end of capacitor C202; the other end of capacitor C202 is grounded.

[0062] The other end of resistor R225 is connected to one end of capacitor C211 and one end of resistor R224; the other end of capacitor C211 is grounded; the other end of resistor R224 is connected to pin 20 of chip U21.

[0063] Pins 8 and 9 of chip U21 are both grounded;

[0064] Pin 10 of chip U21 is connected to one end of capacitor C215 and the power supply, while the other end of capacitor C215 is grounded.

[0065] Pin 12 of chip U21 is connected to one end of resistors R785 and R236 respectively. The other end of resistor R785 is connected to one end of resistors R788 and R789 respectively. The other end of resistor R788 is connected to one end of capacitor C868, and the other end of capacitor C868 is connected to the digital-to-analog converter module. The other end of resistor R789 is connected to one end of capacitor C768, and the other end of capacitor C786 is connected to the digital-to-analog converter module.

[0066] The other end of resistor R236 is connected to one end of capacitor C221, one end of resistor R242, and the power supply, respectively. The other end of capacitor C221 is grounded. The other end of resistor R242 is connected to resistor R884 and pin 13 of chip U21, respectively. The other end of resistor R884 is connected to one end of resistors R885 and R886, respectively. The other end of resistor R885 is connected to one end of capacitor C867. The other end of capacitor C867 is connected to a digital-to-analog converter module. The other end of resistor R886 is connected to one end of capacitor C771, and the other end of capacitor C771 is connected to a digital-to-analog converter module.

[0067] Pin 14 of chip U21 is connected to one end of resistors R243 and R890 respectively; the other end of resistor R890 is connected to one end of resistors R891 and R892 respectively; the other end of resistor R891 is connected to one end of capacitor C870, and the other end of capacitor C870 is connected to a digital-to-analog converter module; the other end of resistor R892 is connected to one end of capacitor C229, and the other end of capacitor C229 is connected to a digital-to-analog converter module.

[0068] The other end of resistor R243 is connected to capacitor C220, one end of resistor R237, and the power supply; the other end of capacitor C220 is grounded; the other end of resistor R237 is connected to resistor R887 and pin 15 of chip U21; the other end of resistor R887 is connected to resistor R889 and one end of resistor R888; the other end of resistor R889 is connected to one end of capacitor C216, and the other end of capacitor C216 is connected to the digital-to-analog converter module; the other end of resistor R888 is connected to one end of capacitor C869, and the other end of capacitor C869 is connected to the digital-to-analog converter module.

[0069] Pin 16 of chip U21 is connected to one end of inductor L14, and the other end of inductor L14 is connected to one end of capacitor C213 and the power supply; the other end of capacitor C213 is grounded.

[0070] Pin 17 of chip U21 is connected to the power supply and one end of capacitor C209, with the other end of capacitor C209 grounded; pin 18 of chip U21 is grounded; pin 19 of chip U21 is connected to one end of capacitor C206, with the other end of capacitor C206 grounded; pin 20 of chip U21 is connected to one end of capacitor C203, with the other end of capacitor C203 grounded; pin 21 of chip U21 is grounded; pin 22 of chip U21 is connected to one end of capacitor C198, with the other end of capacitor C198 grounded; pin 23 of chip U21 is connected to one end of capacitors C193 and C195, with the other ends of capacitors C193 and C195 both grounded; pin 24 of chip U21 is connected to one end of capacitors C189 and C191, with the other ends of capacitors C189 and C191 both grounded.

[0071] Pin 33 of chip U21 is grounded.

[0072] Pin 25 of chip U21 is used to connect to the test point; pin 26 of chip U21 is connected to the test point and one end of resistor R212, and the other end of resistor R212 is grounded.

[0073] Pin 27 of chip U21 is grounded;

[0074] Pin 28 of chip U21 is connected to one end of capacitor C183 and the power supply; the other end of capacitor C183 is grounded.

[0075] Pin 29 of chip U21 is connected to one end of capacitor C485, and the other end of capacitor C485 is connected to one end of resistor R205; the other end of resistor R205 is connected to resistors R801, R775 and R776 respectively.

[0076] Pin 31 of chip U21 is connected to one end of capacitor C182, and the other end of capacitor C182 is connected to the power supply and pin 32 of chip U21.

[0077] Furthermore, the electronic components used in this utility model are all existing technologies. For example, the digital-to-analog converter module is a CS4344-CZZR digital-to-analog converter module, chip U21 is an LMX2581 SQE type chip; chip U603 is a Si5338 type chip; and chip U721 is a GD23F303CCT6 type chip.

[0078] The working principle of this invention is as follows: The MCU controller acts as the core control unit, connected to the clock source circuit and the signal shaping circuit. The clock source circuit extracts the clock signal to provide a time reference for the signal shaping circuit. The chip U603 in the signal shaping circuit operates in conjunction with crystal oscillator Y2, which generates a stable oscillation signal, ensuring the stable operation of the internal circuitry of chip U603. After the input signal enters the signal shaping circuit, it undergoes equalization and filtering processing through a circuit composed of numerous capacitors and resistors. For example, the power supply filtering and decoupling network composed of capacitors C616 and C617 and resistor R630 smooths the power supply voltage, reducing the impact of fluctuations on chip U603, allowing chip U603 to process the input signal more stably and compensate for signal distortion during transmission. Simultaneously, chip U603, through the connection of its various pins with other components, performs signal sampling and processing operations. The processed signal is then transmitted to subsequent circuits for bit error rate calculation and other analysis.

[0079] In data transmission processing systems, a stable clock is crucial for ensuring synchronized operation of all components. The stable clock signal in this circuit guarantees that the U603 chip can accurately sample and process input signals, avoiding bit errors and data loss caused by clock jitter or instability, thus improving the accuracy of bit error rate (BER) testing. The power supply filtering and decoupling networks in the circuit reduce the impact of power fluctuations on the U603 chip's operation. A stable power supply contributes to stable chip operation, thereby improving the reliability of the entire circuit. This allows the BER testing circuit to operate stably in complex electromagnetic environments or under unstable power conditions, ensuring the reliability of test results.

[0080] Example 3

[0081] This embodiment is a further refinement of Embodiment 2.

[0082] like Figure 3As shown, the MCU controller includes a chip U721 and peripheral devices connected to the chip U721; including resistors R1133, R1137, R1140, R1141, R1142, R1143, R1144, R1147, R1148, R1149, R1153, R1168, R1169, R1170, R1171, R1172, R1173, and resistors... R1174, R1179, R1180, R1193, C1018, C1019, C1021, C1022, C1023, C1025, C1026, C1028, C1029, C1030, C1035, C1036, C1037, C1038, C1039, crystal oscillator Y1, connector J3, connector J30, and chip U724.

[0083] Pin 1 of chip U721 is connected to one end of capacitor C1023 and capacitor C1026 respectively; the other end of capacitor C1023 is grounded, the other end of capacitor C1026 is grounded, and pin 1 of chip U721, capacitor C1023 and capacitor C1026 are all connected to the power supply.

[0084] Pin 5 of chip U721 is connected to pin 3 of crystal oscillator Y1 and one end of capacitor C1029; pin 6 of chip U721 is connected to pin 1 of crystal oscillator Y1 and one end of capacitor C1030, and the other ends of capacitors C1029 and C1030 are grounded; pins 2 and 4 of crystal oscillator Y1 are grounded.

[0085] Pin 7 of chip U721 is connected to one end of capacitor C1028 and one end of resistor R1137. The other end of capacitor C1028 is grounded, and the other end of resistor R1137 is connected to the power supply.

[0086] Pin 9 of chip U721 is connected to one end of capacitor C1025, capacitor C1022 and resistor R1133 respectively. The other ends of capacitors C1025 and C1022 are grounded; the other end of resistor R1133 is connected to a resistor.

[0087] Pin 10 of chip U721 is connected to one end of capacitor C1038, and the other end of capacitor C1038 is grounded; pin 11 of chip U721 is connected to one end of capacitor C1039, and the other end of capacitor C1039 is grounded; pin 12 of chip U721 is connected to one end of capacitor C1037, and the other end of capacitor C1037 is grounded.

[0088] Among them, pins 10, 11 and 12 of chip U721 are also connected to control pins ADC0, ADC1 and ADC2 respectively. Control pins ADC0, ADC1 and ADC2 are used for signal control of chip U721.

[0089] Pin 13 of chip U721 is connected to the test point (Lock_detect) for circuit testing; pin 14 of chip U721 is connected to one end of resistor R1146, and one end of resistor R1146 is connected to the other end of resistor R804; pin 16 of chip U721 is connected to one end of resistor R1149, and the other end of resistor R1149 is connected to pin 12 of chip U603; pin 17 of chip U721 is connected to one end of resistor R1148; the other end of resistor R1148 is connected to pin 19 of chip U603; pin 18 of chip U721 is connected to one end of resistor R1174, and the other end of resistor R1174 is connected to the communication module.

[0090] Pin 20 of chip U721 is connected to one end of resistor R1173, and the other end of resistor R1173 is grounded; pin 21 of chip U721 is connected to one end of resistor R1172, and the other end of resistor R1172 is connected to the communication module; pin 22 of chip U721 is connected to one end of resistor R1153, and the other end of resistor R1153 is connected to the communication module; pin 23 of chip U721 is grounded.

[0091] Furthermore, the communication module employs existing technologies, such as the MAX1487 low-power transceiver module which uses RS-485 communication.

[0092] Pin 24 of chip U721 is connected to one end of capacitor C1036 and capacitor C1035 respectively, and the other end of capacitor C1036 and capacitor C1035 is grounded; pin 24 of chip U721, capacitor C1036 and capacitor C1035 are all connected to the power supply.

[0093] Pin 25 of chip U721 is connected to one end of resistor R1168, and the other end of resistor R1168 is connected to pin 3 of chip U21; pin 26 of chip U721 is connected to one end of resistor R1147, and the other end of resistor R1147 is connected to pin 1 of chip U21; pin 27 of chip U721 is connected to one end of resistor R1193, and the other end of resistor R1193 is connected to pin 30 of chip U21; pin 28 of chip U721 is connected to one end of resistor R1169, and the other end of resistor R1169 is connected to pin 2 of chip U21.

[0094] Pin 29 of chip U721 is connected to one end of resistor R1142. The other end of resistor R1142 is connected to one end of resistor R1141, pin 2 of connector J3, pin 2 of connector J30, and pin 6 of chip U724. The other end of resistor R1141 is connected to pin 32 of chip U721.

[0095] Pin 33 of chip U721 is connected to pin 3 of connector J3, pin 4 of chip U724, and pin 3 of connector J30.

[0096] Pin 1 of connector J3 is connected to capacitor C1040, resistor R1143 and pin 5 of chip U724 respectively; the other end of capacitor C1040 is grounded; the other end of resistor R1143 is connected to one end of resistor R1144, and the other end of resistor R1144 is grounded.

[0097] Pin 4 of connector J30 is grounded; pin 2 of chip U724 is grounded. Pin 4 of connector J3 is grounded.

[0098] Pin 34 of chip U721 is connected to one end of resistor R1179, and the other end of resistor R1179 is connected to SWD IO.

[0099] Pin 35 of chip U721 is grounded.

[0100] Pin 36 of chip U721 is connected to one end of capacitor C1021 and one end of capacitor C1019 respectively; the other end of capacitor C1021 is grounded, and the other end of capacitor C1019 is grounded.

[0101] Pin 36 of chip U721, capacitor C1021, and capacitor C1019 are all connected to the power supply.

[0102] Pin 37 of chip U721 is connected to one end of resistor R1180, and the other end of resistor R1180 is connected to SWCLK; pin 39 of chip U721 is connected to EVB_STAT; pin 41 of chip U721 is connected to MD IO; pin 42 of chip U721 is connected to MDC; pin 44 of chip U721 is connected to one end of resistor R1170 and one end of resistor R1171, the other end of resistor R1170 is grounded, and the other end of resistor R1171 is connected to the power supply.

[0103] SWD IO and SWCLK are both debugging interfaces for this circuit, used for debugging functions; MD IO and MDC are both used to connect pull-up resistors to ensure the initial state of the circuit and enhance the output drive capability of the circuit.

[0104] Pin 44 of chip U721, resistor R1170, and resistor R1171 are all connected to the power supply.

[0105] Pin 48 of chip U721 is connected to one end of capacitor C1020 and one end of capacitor C1018 respectively; the other end of capacitor C1020 is grounded, and the other end of capacitor C1018 is grounded.

[0106] The working principle of this invention is as follows: The MCU controller is the core control unit of the entire circuit, which can regulate the clock source circuit and the signal shaping circuit. The function of the clock source circuit is to extract the clock signal and provide a time reference for the signal shaping circuit. The signal shaping circuit performs equalization and filtering on the input signal to compensate for the distortion generated during signal transmission, thereby improving signal quality and facilitating subsequent bit error rate testing.

[0107] The MCU controller is connected to both the clock source circuit and the signal shaping circuit, and its function is to control these two circuits. Specifically, it can set the parameters of the clock source circuit, thereby adjusting the frequency, phase, and other parameters of the clock signal; it can also control the operating mode, gain, and other parameters of the signal shaping circuit to adapt to the characteristics of different input signals.

[0108] The clock source circuit mainly consists of chip U21 and numerous resistors and capacitors. Its working principle is as follows: pins 1, 2, and 3 of chip U21 are connected to the MCU controller, and the MCU controls and sets parameters of chip U21 through these pins.

[0109] Pin 4 of chip U21 receives signals from the MCU and is processed by resistors R804 and R805. The signal received by pin 5 is processed by components such as resistors R778 and R218, and works together with capacitors C204 and C197 to provide a suitable input signal for chip U21.

[0110] Pins 6, 10, 16, 17, 28, and 32 of chip U21 are connected to the power supply and filtered by capacitors to ensure the stability of chip operation.

[0111] The U21 chip connects to multiple external interfaces (such as XT8-DINN, XT7-DINN, XTX6-DINN, etc.) to output the processed clock signal, providing a time reference for the signal shaping circuit.

[0112] The signal shaping circuit consists of a chip U603, a crystal oscillator Y2, and multiple resistors and capacitors. Its working principle is as follows:

[0113] Crystal oscillator Y2 is connected to pins 1 and 2 of chip U603 to provide a stable clock signal for chip U603 and ensure normal operation of chip.

[0114] Pins 3 and 4 of chip U603 receive input signals, which are then processed by resistors R628 and R627.

[0115] The U603 chip has multiple pins (such as pins 7, 11, 15, 16, 20, and 24) connected to the power supply, and is filtered by capacitors (such as C619, C620, C618, C740, C616, and C617) to ensure the stability of the chip's operation.

[0116] The U603 chip performs equalization and filtering on the input signal to compensate for distortion generated during transmission. The processed signal can be output through the relevant pins of the U603 chip for subsequent bit error rate testing.

[0117] The bit error rate testing circuit in this invention coordinates the operation of the clock source circuit and the signal shaping circuit through the MCU controller. Utilizing the time reference provided by the clock source circuit, the signal shaping circuit processes the input signal, ultimately improving signal quality and laying the foundation for accurate bit error rate testing.

[0118] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0119] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A novel bit error rate testing circuit, characterized in that: It includes an MCU controller, a clock source circuit, and a signal shaping circuit; wherein the MCU controller is connected to both the clock source circuit and the signal shaping circuit; the MCU controller is used to control the clock source circuit and the signal shaping circuit; the clock source circuit is used to extract the clock signal and provide a time reference for the signal shaping circuit; The signal shaping circuit is used to equalize and filter the input signal, compensating for the distortion generated during signal transmission. The signal shaping circuit includes chip U603, crystal oscillator Y2, diode D207, capacitors C616, C617, C618, C619, C620, C722, C723, C740, C749, C750, resistors R627, R628, R630, R748, R774, R775, R776, R777, R780, R781, R782, R783, R799, and resistor R801. Pin 1 of chip U603 is connected to pin 3 of crystal oscillator Y2, and pins 2 and 4 of crystal oscillator Y2 are both grounded; pin 1 of crystal oscillator Y2 is connected to pin 2 of chip U603; pin 3 of chip U603 is connected to one end of resistor R628, and pin 4 of chip U603 is connected to one end of resistor R627; the other ends of resistors R628 and R627 are both grounded; pin 6 of chip U603 is connected to one end of capacitor C749, and the other end of capacitor C749 is connected to one end of resistor R774, and the other end of resistor R774 is grounded. Pin 7 of chip U603 is connected to pin 11 of chip U603, one end of capacitor C619, and one end of capacitor C620; pin 8 of chip U603 is connected to one end of resistor R630 and one end of resistor R748; the other end of resistor R748 is connected to diode D207, and the other end of diode D207 is grounded; the other end of resistor R630 is connected to the power supply. Pin 12 of chip U603 is connected to the MCU controller; pin 15 of chip U603 is connected to pin 16 of chip U603, capacitor C618, and one end of capacitor C740; the other ends of capacitor C618 and capacitor C740 are grounded. Pin 17 of chip U603 is connected to one end of capacitor C722, the other end of capacitor C722 is connected to one end of resistor R799, and the other end of resistor R799 is grounded; pin 18 of chip U603 is connected to one end of capacitor C723. Pin 19 of chip U603 is connected to the MCU controller; pin 20 of chip U603 is connected to pin 24 of chip U603, one end of capacitor C617, and one end of capacitor C616; the other end of capacitor C616 is connected to pins 23 and 25 of chip U603; the other end of capacitor C617 is grounded; pin 21 of chip U603 is connected to one end of capacitor C750, the other end of capacitor C750 is connected to one end of resistor R777, and the other end of resistor R777 is connected to one end of resistor R776; pin 22 of chip U603 is connected to one end of resistor R801, and the other end of resistor R801 is connected to one end of resistor R775 and the other end of resistor R776.

2. The novel bit error rate testing circuit according to claim 1, characterized in that: The other ends of capacitors C619 and C620 are grounded, and pins 7 and 11 of chip U603, as well as capacitors C619 and C620, are all connected to the power supply.

3. The novel bit error rate testing circuit according to claim 2, characterized in that: Pins 15 and 16 of chip U603, capacitor C618, and capacitor C740 are all connected to the power supply.

4. The novel bit error rate testing circuit according to claim 3, characterized in that: Pins 25 and 23 of chip U603 and capacitor C616 are grounded; the other end of resistor R777 and the other end of resistor R776 are grounded; resistor R775 is also connected to the power supply; pins 20 and 24 of chip U603, capacitor C616 and capacitor C617 are all connected to the power supply.

5. A novel bit error rate testing circuit according to claim 4, characterized in that: The other end of capacitor C723 is connected to one end of resistor R780 and one end of resistor R781 respectively. The other end of resistor R780 is connected to the power supply, and the other end of resistor R781 is grounded. The other end of resistor R799 is also connected to one end of resistor R783 and one end of resistor R782 respectively. The other end of resistor R783 is connected to the power supply, and the other end of resistor R782 is grounded.

6. A novel bit error rate testing circuit according to claim 5, characterized in that: The clock source circuit includes chip U21, resistors R205, R212, R218, R224, R225, R236, R237, R242, R243, R778, R785, R788, R789, R804, R805, R884, R885, R886, R887, R888, R889, R890, R891, R892, and capacitor C1. 82, C183, C189, C191, C193, C195, C197, C198, C202, C203, C204, C206, C209, C211, C213, C215, C216, C220, C229, C768, C771, C788, C789, C867, C868, C869, and C870; Pins 1, 2, and 3 of chip U21 are connected to the MCU controller, respectively. Pin 4 of chip U21 is connected to one end of resistors R804 and R805, the other end of resistor R804 is connected to the MCU controller, and the other end of resistor R805 is grounded; pin 5 of chip U21 is connected to one end of resistor R778, the other end of resistor R778 is connected to one end of resistor R218 and capacitor C204; the other end of resistor R281 is connected to one end of capacitor C197; the other end of capacitor C204 is connected to pin 7 of chip U21, the other end of capacitor C197, and one end of resistor R225. Pin 6 of chip U21 is connected to the power supply and one end of capacitor C202; the other end of capacitor C202 is grounded. The other end of resistor R225 is connected to one end of capacitor C211 and one end of resistor R224; the other end of capacitor C211 is grounded; the other end of resistor R224 is connected to pin 20 of chip U21. Pins 8 and 9 of chip U21 are both grounded; Pin 10 of chip U21 is connected to one end of capacitor C215 and the power supply, while the other end of capacitor C215 is grounded. Pin 12 of chip U21 is connected to one end of resistors R785 and R236 respectively. The other end of resistor R785 is connected to one end of resistors R788 and R789 respectively. The other end of resistor R788 is connected to one end of capacitor C868, and the other end of capacitor C868 is connected to the digital-to-analog converter module. The other end of resistor R789 is connected to one end of capacitor C768, and the other end of capacitor C786 is connected to the digital-to-analog converter module. The other end of resistor R236 is connected to one end of capacitor C221, one end of resistor R242, and the power supply, respectively. The other end of capacitor C221 is grounded. The other end of resistor R242 is connected to resistor R884 and pin 13 of chip U21, respectively. The other end of resistor R884 is connected to one end of resistors R885 and R886, respectively. The other end of resistor R885 is connected to one end of capacitor C867. The other end of capacitor C867 is connected to a digital-to-analog converter module. The other end of resistor R886 is connected to one end of capacitor C771, and the other end of capacitor C771 is connected to a digital-to-analog converter module. Pin 14 of chip U21 is connected to one end of resistor R243 and resistor R890 respectively; the other end of resistor R890 is connected to one end of resistor R891 and resistor R892 respectively; the other end of resistor R891 is connected to one end of capacitor C870, and the other end of capacitor C870 is connected to the digital-to-analog converter module. The other end of resistor R892 is connected to one end of capacitor C229, and the other end of capacitor C229 is connected to a digital-to-analog converter module. The other end of resistor R243 is connected to capacitor C220, one end of resistor R237, and the power supply; the other end of capacitor C220 is grounded; the other end of resistor R237 is connected to resistor R887 and pin 15 of chip U21; the other end of resistor R887 is connected to resistor R889 and one end of resistor R888; the other end of resistor R889 is connected to one end of capacitor C216, and the other end of capacitor C216 is connected to a digital-to-analog converter module; the other end of resistor R888 is connected to one end of capacitor C869, and the other end of capacitor C869 is connected to a digital-to-analog converter module. Pin 16 of chip U21 is connected to one end of inductor L14, and the other end of inductor L14 is connected to one end of capacitor C213 and the power supply; the other end of capacitor C213 is grounded. Pin 17 of chip U21 is connected to the power supply and one end of capacitor C209, with the other end of capacitor C209 grounded; pin 18 of chip U21 is grounded; pin 19 of chip U21 is connected to one end of capacitor C206, with the other end of capacitor C206 grounded; pin 20 of chip U21 is connected to one end of capacitor C203, with the other end of capacitor C203 grounded; pin 21 of chip U21 is grounded; pin 22 of chip U21 is connected to one end of capacitor C198, with the other end of capacitor C198 grounded; pin 23 of chip U21 is connected to one end of capacitors C193 and C195, with the other ends of capacitors C193 and C195 both grounded; pin 24 of chip U21 is connected to one end of capacitors C189 and C191, with the other ends of capacitors C189 and C191 both grounded. Pin 33 of chip U21 is grounded.

7. A novel bit error rate testing circuit according to claim 6, characterized in that: Pin 25 of chip U21 is used to connect to the test point; pin 26 of chip U21 is connected to the test point and one end of resistor R212, and the other end of resistor R212 is grounded. Pin 27 of chip U21 is grounded; Pin 28 of chip U21 is connected to one end of capacitor C183 and the power supply; the other end of capacitor C183 is grounded. Pin 29 of chip U21 is connected to one end of capacitor C485, and the other end of capacitor C485 is connected to one end of resistor R205; the other end of resistor R205 is connected to resistors R801, R775 and R776 respectively; pin 30 of chip U21 is connected to the MCU controller. Pin 31 of chip U21 is connected to one end of capacitor C182, and the other end of capacitor C182 is connected to the power supply and pin 32 of chip U21.

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