Step time sequence power supply box
By designing a stepped timing power supply box, and using a small power supply box assembled with chip U19 and modules, the problems of resource waste and high cost caused by the complexity of programmable power supply equipment are solved, and efficient and low-cost VBAT and VBUS power supply is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-27
- Publication Date
- 2026-03-03
AI Technical Summary
Programmable power supply equipment is relatively complex in the production process of intelligent terminal products, resulting in resource waste and high costs. It is redundant when only VBAT and VBUS power supply is provided.
Design a stepped timing power supply box, including chip U19, power adapter module, power supply module and communication module. The box is assembled into a small power supply box through simple modules, providing VBAT and VBUS power supply, replacing the complex programmable power supply.
It simplifies the power supply process, reduces resource waste, lowers testing costs, and focuses on key functions, avoiding redundancy in programmable power supplies.
Smart Images
Figure CN223966827U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of circuit design technology, and in particular to a stepped timing power supply box. Background Technology
[0002] Currently, programmable power supplies are power devices that can precisely adjust parameters such as output voltage and current through external control signals, and are widely used in many fields such as electronics and power.
[0003] In related technologies, smart terminal products such as mobile phones, tablets, and wearable devices need to be powered on for various functional and performance tests during factory production. For example, during firmware download and testing processes in surface mount technology, VBAT and VBUS power supplies are required. The power supply is typically provided by a programmable power supply device, which provides the VBAT and VBUS required by the smart terminal products. However, programmable power supplies are relatively complex, and simply providing VBAT and VBUS leads to redundancy in other functions, resulting in wasted resources and relatively high costs. Utility Model Content
[0004] The purpose of this invention is to overcome the shortcomings of the existing technology and provide a stepped timing power supply box that can replace a programmable power supply and reduce resource waste.
[0005] The objective of this utility model is achieved through the following technical solution:
[0006] The first aspect of this application provides a stepped timing power supply box, comprising: a chip U19; a power adapter module, including a first voltage processing unit and a second voltage processing unit, wherein the first voltage processing unit and the second voltage processing unit are electrically connected, and the second voltage processing unit is electrically connected to the chip U19; a power supply module, including a VBUS voltage unit and a VBAT voltage unit, wherein both the VBUS voltage unit and the VBAT voltage unit are electrically connected to the first voltage processing unit; and a communication module, wherein the communication module is electrically connected to the chip U19 and is used to communicate with a host computer.
[0007] The first voltage processing unit includes a fuse F1, capacitors C48, C47, C36, and C49. The first end of the fuse F1 is electrically connected to an external power source. The second end of the fuse F1 is electrically connected to the first end of the capacitor C48, and the second end of the capacitor C48 is grounded. The first end of the capacitor C47 is electrically connected to the second end of the fuse F1, and the second end of the capacitor C47 is grounded. The first end of the capacitor C36 is electrically connected to the second end of the fuse F1, and the second end of the capacitor C36 is grounded. The first end of the capacitor C49 is electrically connected to the second end of the fuse F1, and the second end of the capacitor C49 is grounded. The second end of the fuse F1 is also electrically connected to the VBUS voltage unit and the VBAT voltage unit, respectively.
[0008] The second voltage processing unit includes chip U9, inductor L6, chip U5 and chip U15. Chip U9 is electrically connected to the second terminal of fuse F1. The first terminal of inductor L6 is electrically connected to chip U9. The second terminal of inductor L6 is electrically connected to chip U5 and chip U15 respectively. Chip U5 is electrically connected to chip U19.
[0009] The VBUS voltage unit includes a first step-down circuit, which comprises an inductor L4, capacitors C46, C118, C25, C26, C93, C94, and C117, a MOSFET Q3, a chip U2, a resistor R25, and an inductor L2. The second terminal of the inductor L4 is electrically connected to the second terminal of the fuse F1, and the first terminal of the inductor L4 is electrically connected to the first terminals of capacitors C46, C118, C25, C26, C93, C94, and C117, respectively. The second terminal of capacitor C46 is grounded, the second terminal of capacitor C118 is grounded, the second terminal of capacitor C25 is grounded, the second terminal of capacitor C26 is grounded, the second terminal of capacitor C93 is grounded, the second terminal of capacitor C94 is grounded, the second terminal of capacitor C117 is grounded, the first terminal of MOSFET Q3 is electrically connected to the first terminal of inductor L4, the second terminal of MOSFET Q3 is electrically connected to chip U2, the first terminal of MOSFET Q4 is electrically connected to both chip U2 and the first terminal of inductor L2, the second terminal of MOSFET Q4 is electrically connected to the first terminal of resistor R25, and the second terminal of resistor R25 is electrically connected to chip U2.
[0010] The VBUS voltage unit further includes a first sampling unit, which includes a resistor R52, a chip U8, a resistor R29, a resistor R74, an operational amplifier U40, and a diode D15. The first end of the resistor R52 is electrically connected to the first ends of the chip U8 and the resistor R29. The second end of the resistor R52 is electrically connected to the second end of the inductor L2. The chip U8 is electrically connected to the chip U19. The second end of the resistor R29 is electrically connected to the first end of the resistor R74. The second end of the resistor R74 is electrically connected to the first end of the operational amplifier U40. The second end of the operational amplifier U40 is electrically connected to the chip U19. The first end of the diode D15 is electrically connected to the first end of the resistor R52.
[0011] The VBUS voltage unit further includes a first discharge circuit, which includes a port J15, a resistor R118 and a switch Q11. The port J15 is electrically connected to the second end of the diode D15, the first end of the resistor R118 is electrically connected to the second end of the diode D15, and the second end of the resistor R118 is electrically connected to the switch Q11.
[0012] The VBAT voltage unit includes a second step-down circuit, which includes an inductor L3, capacitors C91, C2, C4, C3, and C90, MOSFETs Q1 and Q2, a chip U1, a resistor R10, and an inductor L1. The second terminal of the inductor L3 is electrically connected to the second terminal of the fuse F1, and the first terminal of the inductor L3 is electrically connected to the first terminals of capacitors C91, C2, C4, C3, and C90, respectively. The second terminal of capacitor C1 is grounded, the second terminal of capacitor C2 is grounded, the second terminal of capacitor C4 is grounded, the second terminal of capacitor C3 is grounded, the second terminal of capacitor C90 is grounded, the first terminal of MOSFET Q1 is electrically connected to the first terminal of inductor L3, the second terminal of MOSFET Q1 is electrically connected to chip U1, the first terminal of MOSFET Q2 is electrically connected to both chip U1 and the first terminal of inductor L1, the second terminal of MOSFET Q2 is electrically connected to the first terminal of resistor R10, and the second terminal of resistor R10 is electrically connected to chip U2.
[0013] The VBAT voltage unit further includes a second sampling unit, which includes a resistor R53, a chip U6, a resistor R14, a resistor R73, an operational amplifier U42, and a diode D11. The first end of the resistor R53 is electrically connected to the first ends of the chip U6 and the resistor R14, respectively. The chip U6 is electrically connected to the chip U19. The second end of the resistor R53 is electrically connected to the second end of the inductor L1. The second end of the resistor R14 is electrically connected to the first end of the resistor R73. The second end of the resistor R73 is electrically connected to the first end of the operational amplifier U42. The second end of the operational amplifier U42 is electrically connected to the chip U19. The first end of the diode D11 is electrically connected to the first end of the resistor R53.
[0014] The VBAT voltage unit further includes a second discharge circuit, which includes a port J3, a resistor R240 and a switch Q70. The second end of the diode D11 is electrically connected to the port J3 and the first end of the resistor R240, respectively, and the second end of the resistor R240 is electrically connected to the switch Q70.
[0015] The communication module includes a first serial port unit and a second serial port unit, which are electrically connected to the chip U19 respectively.
[0016] Compared with the prior art, the present invention has at least the following advantages:
[0017] By assembling a small power supply box using a chip U19, a power adapter module, a power supply module, and a communication module, the product can be powered via VBAT and VBUS, thus enabling testing. This replaces complex programmable power supplies, avoids resource waste, and reduces testing costs. Attached Figure Description
[0018] To more clearly illustrate the technical solutions of the embodiments of this utility model, the accompanying drawings used in the embodiments will be briefly described below.
[0019] Figure 1 This is a functional block diagram of a stepped timing power supply box in one embodiment of the present invention;
[0020] Figure 2 This is a circuit diagram of chip U19 in one embodiment of the present invention;
[0021] Figure 3 This is a circuit diagram of the first voltage processing unit in one embodiment of the present invention;
[0022] Figure 4 This is a circuit diagram of the second voltage processing unit in one embodiment of the present invention;
[0023] Figure 5 This is a circuit diagram of the VBUS voltage unit in one embodiment of the present invention;
[0024] Figure 6 This is a circuit diagram of the VBAT voltage unit in one embodiment of the present invention;
[0025] Figure 7 This is a circuit diagram of the first serial port unit in one embodiment of the present invention;
[0026] Figure 8 This is a circuit diagram of the second serial port unit in one embodiment of the present invention. Detailed Implementation
[0027] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. While embodiments of this application are shown in the drawings, it should be understood that this application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to make this application more thorough and complete, and to fully convey the scope of this application to those skilled in the art.
[0028] It should be understood that although the terms "first," "second," "third," etc., may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0029] Unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0030] Smart terminal products such as mobile phones, tablets, and wearable devices require power for various functional and performance tests during factory production. For example, during firmware download and testing in surface mount technology, VBAT and VBUS power supplies are needed. The power supply is typically provided by a programmable power supply device, which provides the VBAT and VBUS required by the smart terminal products. However, programmable power supplies are relatively complex, and simply providing VBAT and VBUS leads to redundancy in other functions, resulting in wasted resources and relatively high costs.
[0031] To address the aforementioned issues, this application provides a stepped timing power supply box that can replace a programmable power supply, reducing resource waste.
[0032] The technical solutions of the embodiments of this application are described in detail below with reference to the accompanying drawings.
[0033] Please see Figure 1 and Figure 2 A stepped timing power supply box includes a chip U19, a power adapter module 100, a power supply module 200, and a communication module 300. The power adapter module 100 includes a first voltage processing unit and a second voltage processing unit, which are electrically connected to each other and the second voltage processing unit is electrically connected to the chip U19. The power supply module 200 includes a VBUS voltage unit and a VBAT voltage unit, both of which are electrically connected to the first voltage processing unit. The communication module 300 is electrically connected to the chip U19 and is used to communicate with a host computer.
[0034] It should be noted that chip U19 is the main control chip, used to control the normal operation of each module; its model can be STM32F407ZGT6. Power adapter module 100 acts as a filter. The power supply module provides VBUS and VBAT voltages to the electronic product. Communication module 300 facilitates communication between chip U19 and the host computer. Furthermore, by assembling these simple modules—chip U19, power adapter module, power supply module, and communication module—into a small power supply box, it is possible to provide VBAT and VBUS power to the product, thereby completing the test. This replaces a complex programmable power supply, avoiding resource waste and reducing testing costs.
[0035] Please see Figure 3In one embodiment, the first voltage processing unit includes a fuse F1, capacitors C48, C47, C36, and C49. The first end of fuse F1 is electrically connected to an external power supply. The second end of fuse F1 is electrically connected to the first end of capacitor C48, and the second end of capacitor C48 is grounded. The first end of capacitor C47 is electrically connected to the second end of fuse F1, and the second end of capacitor C47 is grounded. The first end of capacitor C36 is electrically connected to the second end of fuse F1, and the second end of capacitor C36 is grounded. The first end of capacitor C49 is electrically connected to the second end of fuse F1, and the second end of capacitor C49 is grounded. The second end of fuse F1 is also electrically connected to the VBUS voltage unit and the VBAT voltage unit, respectively.
[0036] It should be noted that fuse F1 is used to protect the circuit and prevent damage from excessive current. Its first terminal is connected to an external 15V power supply. After being filtered by capacitors C48, C47, C36, and C49, it can be directly connected to the second voltage processing unit, the VBUS voltage unit, and the VBAT voltage unit.
[0037] Please see Figure 4 In one embodiment, the second voltage processing unit includes chip U9, inductor L6, chip U5 and chip U15. Chip U9 is electrically connected to the second end of fuse F1, the first end of inductor L6 is electrically connected to chip U9, the second end of inductor L6 is electrically connected to chip U5 and chip U15 respectively, and chip U5 is electrically connected to chip U19.
[0038] It should be noted that chip U9 is a step-down chip used to reduce the 15V voltage to 5V. After being filtered by inductor L6, the output chips U5 and U15 further reduce the voltage to 3.3V to power chip U19.
[0039] Please see Figure 5In one embodiment, the VBUS voltage unit includes a first step-down circuit, which includes an inductor L4, capacitors C46, C118, C25, C26, C93, C94, C117, MOSFET Q3, MOSFET Q4, chip U2, resistor R25, and inductor L2. The second terminal of inductor L4 is electrically connected to the second terminal of fuse F1. The first terminal of inductor L4 is connected to the first terminals of capacitors C46, C118, C25, C26, C93, C94, and C117 respectively. The first terminal of capacitor C117 is electrically connected, the second terminal of capacitor C46 is grounded, the second terminal of capacitor C118 is grounded, the second terminal of capacitor C25 is grounded, the second terminal of capacitor C26 is grounded, the second terminal of capacitor C93 is grounded, the second terminal of capacitor C94 is grounded, the second terminal of capacitor C117 is grounded, the first terminal of MOSFET Q3 is electrically connected to the first terminal of inductor L4, the second terminal of MOSFET Q3 is electrically connected to chip U2, the first terminal of MOSFET Q4 is electrically connected to both chip U2 and the first terminal of inductor L2, the second terminal of MOSFET Q4 is electrically connected to the first terminal of resistor R25, and the second terminal of resistor R25 is electrically connected to chip U2.
[0040] It should be noted that the first step-down circuit converts the voltage output from the first voltage processing unit into a VBUS step-down circuit. The 15V voltage is filtered by inductor L4, capacitors C46, C118, C25, C26, C93, C94, and C117, and then electrically connected to MOSFETs Q3 and Q4. MOSFETs Q3 and Q4 act as switches and do not turn on or off simultaneously. This is to ensure that the voltage after being stepped down by chip U2 is not too high or too low, thus providing dynamic regulation. Specifically, resistor R25 is a voltage divider resistor. The first step-down circuit also includes resistor R26. The first terminal of resistor R26 is electrically connected to chip U2, and the second terminal of resistor R26 is electrically connected to the second terminal of inductor L2. Resistor R26 also plays a role in dynamically regulating the voltage.
[0041] Please see Figure 5 In one embodiment, the VBUS voltage unit further includes a first sampling unit, which includes a resistor R52, a chip U8, a resistor R29, a resistor R74, an operational amplifier U40, and a diode D15. The first end of the resistor R52 is electrically connected to the first ends of the chip U8 and the resistor R29, the second end of the resistor R52 is electrically connected to the second end of the inductor L2, the chip U8 is electrically connected to the chip U19, the second end of the resistor R29 is electrically connected to the first end of the resistor R74, the second end of the resistor R74 is electrically connected to the first end of the operational amplifier U40, the second end of the operational amplifier U40 is electrically connected to the chip U19, and the first end of the diode D15 is electrically connected to the first end of the resistor R52.
[0042] It should be noted that the first sampling unit is used to feed back the sampled current and voltage values to chip U19 in real time for processing. Resistors R52, R29, and R74 are all voltage divider resistors, and operational amplifier U40 acts as a voltage follower. Chip U8 is a current sampling chip.
[0043] Please see Figure 5 In one embodiment, the VBUS voltage unit further includes a first discharge circuit, which includes a port J15, a resistor R118 and a switch Q11. The port J15 is electrically connected to the second end of the diode D15, the first end of the resistor R118 is electrically connected to the second end of the diode D15, and the second end of the resistor R118 is electrically connected to the switch Q11.
[0044] It should be noted that port J15 is used for connecting external electronic products and directly outputting VBUS voltage. Switch Q11 is used to open after port J15 has finished discharging, to discharge any residual voltage on the line.
[0045] It should also be noted that the first step-down circuit, the first sampling circuit, and the first discharge circuit of this application are each provided with 4 channels.
[0046] Please see Figure 6 In one embodiment, the VBAT voltage unit includes a second step-down circuit, which includes an inductor L3, capacitors C91, C2, C4, C3, and C90, MOSFETs Q1 and Q2, a chip U1, a resistor R10, and an inductor L1. The second terminal of the inductor L3 is electrically connected to the second terminal of the fuse F1. The first terminal of the inductor L3 is electrically connected to the first terminals of capacitors C91, C2, C4, C3, and C90, respectively. The second terminals of capacitors C91, C2, C4, C3, and C90 are grounded. The first terminal of MOSFET Q1 is electrically connected to the first terminal of inductor L3, and the second terminal of MOSFET Q1 is electrically connected to the chip U1. The first terminal of MOSFET Q2 is electrically connected to both the chip U1 and the first terminal of inductor L1, and the second terminal of MOSFET Q2 is electrically connected to the first terminal of resistor R10. The second terminal of resistor R10 is electrically connected to the chip U2.
[0047] It should be noted that the second step-down circuit converts the first voltage processing unit into VBAT voltage. The 15V voltage, after being filtered by capacitors C91, C2, C4, C3, and C90, is electrically connected to MOSFETs Q1 and Q2. MOSFETs Q1 and Q2 act as switches and do not turn on or off simultaneously. This is to ensure that the voltage after being stepped down by chip U1 is neither too high nor too low, thus providing dynamic regulation. Specifically, resistor R10 is a voltage divider resistor. The second step-down circuit also includes resistor R11. The first terminal of resistor R11 is electrically connected to chip U1, and the second terminal of resistor R11 is electrically connected to the second terminal of inductor L1. R11 plays a role in dynamically regulating the voltage.
[0048] Please see Figure 6 In one embodiment, the VBAT voltage unit further includes a second sampling unit, which includes a resistor R53, a chip U6, a resistor R14, a resistor R73, an operational amplifier U42, and a diode D11. The first end of the resistor R53 is electrically connected to the first ends of the chip U6 and the resistor R14, respectively. The chip U6 is electrically connected to the chip U19. The second end of the resistor R53 is electrically connected to the second end of the inductor L1. The second end of the resistor R14 is electrically connected to the first end of the resistor R73. The second end of the resistor R73 is electrically connected to the first end of the operational amplifier U42. The second end of the operational amplifier U42 is electrically connected to the chip U19. The first end of the diode D11 is electrically connected to the first end of the resistor R53.
[0049] It should be noted that the second sampling unit is used to feed back the sampled current and voltage values to chip U19 in real time for processing. Resistors R53, R14, and R73 are all voltage divider resistors, and operational amplifier U42 acts as a voltage follower. Chip U6 is a current sampling chip.
[0050] Please see Figure 6 In one embodiment, the VBAT voltage unit further includes a second discharge circuit, which includes a port J3, a resistor R240 and a switch Q70. The second end of the diode D11 is electrically connected to the port J3 and the first end of the resistor R240, respectively, and the second end of the resistor R240 is electrically connected to the switch Q70.
[0051] It should be noted that port J3 is used for connecting external electronic products and directly outputs VBAT voltage. Switch Q70 is used to open after port J3 has finished discharging, to discharge any residual voltage on the line.
[0052] It should also be noted that the second step-down circuit, the second sampling circuit, and the second discharge circuit of this application are each provided with 4 channels.
[0053] In one embodiment, the communication module 300 includes a first serial port unit and a second serial port unit, which are electrically connected to the chip U19 respectively.
[0054] It should be noted that the first serial port unit can be a USB serial port unit. The power supply box of this application can be connected to a host computer via a USB interface. For details, please refer to [link / reference needed]. Figure 7 The USB chip U7 is included. The second serial port unit can be an RS485 serial port unit. The power supply box of this application can communicate with the host computer via RS485 addressing. For details, please refer to [link / reference needed]. Figure 1 Chips U21, U20, and U16.
[0055] The circuit principle of this application is explained below:
[0056] The first voltage processing unit is connected to an external DC 15V / 3A converter. After filtering, it outputs 15V to the second processing unit, the VBAT unit, and the VBUS unit. The second processing unit steps down the 15V to 3.3V to power the U19 chip. The VBAT and VBUS units process the 15V and can then directly output the VBAT and VBUS voltages to the electronic product through ports J15 and J3, respectively.
[0057] The solution of this application has been described in detail above with reference to the accompanying drawings. In the above embodiments, the descriptions of each embodiment have different focuses; for parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. Those skilled in the art should also understand that the actions and modules involved in the specification are not necessarily essential to this application. Furthermore, it is understood that the steps in the method of this application embodiment can be adjusted, combined, and deleted according to actual needs, and the modules in the device of this application embodiment can be combined, divided, and deleted according to actual needs.
[0058] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.
Claims
1. A stepped timing power supply box, characterized in that, include: Chip U19; The power adapter module includes a first voltage processing unit and a second voltage processing unit, wherein the first voltage processing unit is electrically connected to the second voltage processing unit, and the second voltage processing unit is electrically connected to the chip U19. The power supply module includes a VBUS voltage unit and a VBAT voltage unit, both of which are electrically connected to the first voltage processing unit. A communication module is electrically connected to the chip U19 and is used to communicate with a host computer.
2. The stepped timing power supply box according to claim 1, characterized in that, The first voltage processing unit includes a fuse F1, capacitors C48, C47, C36, and C49. The first end of the fuse F1 is electrically connected to an external power source. The second end of the fuse F1 is electrically connected to the first end of the capacitor C48, and the second end of the capacitor C48 is grounded. The first end of the capacitor C47 is electrically connected to the second end of the fuse F1, and the second end of the capacitor C47 is grounded. The first end of the capacitor C36 is electrically connected to the second end of the fuse F1, and the second end of the capacitor C36 is grounded. The first end of the capacitor C49 is electrically connected to the second end of the fuse F1, and the second end of the capacitor C49 is grounded. The second end of the fuse F1 is also electrically connected to the VBUS voltage unit and the VBAT voltage unit, respectively.
3. The stepped timing power supply box according to claim 2, characterized in that, The second voltage processing unit includes chip U9, inductor L6, chip U5 and chip U15. Chip U9 is electrically connected to the second terminal of fuse F1. The first terminal of inductor L6 is electrically connected to chip U9. The second terminal of inductor L6 is electrically connected to chip U5 and chip U15 respectively. Chip U5 is electrically connected to chip U19.
4. The stepped timing power supply box according to claim 2, characterized in that, The VBUS voltage unit includes a first step-down circuit, which comprises an inductor L4, capacitors C46, C118, C25, C26, C93, C94, and C117, a MOSFET Q3, a chip U2, a resistor R25, and an inductor L2. The second terminal of the inductor L4 is electrically connected to the second terminal of the fuse F1, and the first terminal of the inductor L4 is electrically connected to the first terminals of capacitors C46, C118, C25, C26, C93, C94, and C117, respectively. The second terminal of capacitor C46 is grounded, the second terminal of capacitor C118 is grounded, the second terminal of capacitor C25 is grounded, the second terminal of capacitor C26 is grounded, the second terminal of capacitor C93 is grounded, the second terminal of capacitor C94 is grounded, the second terminal of capacitor C117 is grounded, the first terminal of MOSFET Q3 is electrically connected to the first terminal of inductor L4, the second terminal of MOSFET Q3 is electrically connected to chip U2, the first terminal of MOSFET Q4 is electrically connected to both chip U2 and the first terminal of inductor L2, the second terminal of MOSFET Q4 is electrically connected to the first terminal of resistor R25, and the second terminal of resistor R25 is electrically connected to chip U2.
5. The stepped timing power supply box according to claim 4, characterized in that, The VBUS voltage unit further includes a first sampling unit, which includes a resistor R52, a chip U8, a resistor R29, a resistor R74, an operational amplifier U40, and a diode D15. The first end of the resistor R52 is electrically connected to the first ends of the chip U8 and the resistor R29. The second end of the resistor R52 is electrically connected to the second end of the inductor L2. The chip U8 is electrically connected to the chip U19. The second end of the resistor R29 is electrically connected to the first end of the resistor R74. The second end of the resistor R74 is electrically connected to the first end of the operational amplifier U40. The second end of the operational amplifier U40 is electrically connected to the chip U19. The first end of the diode D15 is electrically connected to the first end of the resistor R52.
6. The stepped timing power supply box according to claim 5, characterized in that, The VBUS voltage unit further includes a first discharge circuit, which includes a port J15, a resistor R118 and a switch Q11. The port J15 is electrically connected to the second end of the diode D15, the first end of the resistor R118 is electrically connected to the second end of the diode D15, and the second end of the resistor R118 is electrically connected to the switch Q11.
7. The stepped timing power supply box according to claim 6, characterized in that, The VBAT voltage unit includes a second step-down circuit, which includes an inductor L3, capacitors C91, C2, C4, C3, and C90, MOSFETs Q1 and Q2, a chip U1, a resistor R10, and an inductor L1. The second terminal of the inductor L3 is electrically connected to the second terminal of the fuse F1, and the first terminal of the inductor L3 is electrically connected to the first terminals of capacitors C91, C2, C4, C3, and C90, respectively. The second terminal of capacitor C1 is grounded, the second terminal of capacitor C2 is grounded, the second terminal of capacitor C4 is grounded, the second terminal of capacitor C3 is grounded, the second terminal of capacitor C90 is grounded, the first terminal of MOSFET Q1 is electrically connected to the first terminal of inductor L3, the second terminal of MOSFET Q1 is electrically connected to chip U1, the first terminal of MOSFET Q2 is electrically connected to both chip U1 and the first terminal of inductor L1, the second terminal of MOSFET Q2 is electrically connected to the first terminal of resistor R10, and the second terminal of resistor R10 is electrically connected to chip U2.
8. The stepped timing power supply box according to claim 7, characterized in that, The VBAT voltage unit further includes a second sampling unit, which includes a resistor R53, a chip U6, a resistor R14, a resistor R73, an operational amplifier U42, and a diode D11. The first end of the resistor R53 is electrically connected to the first ends of the chip U6 and the resistor R14, respectively. The chip U6 is electrically connected to the chip U19. The second end of the resistor R53 is electrically connected to the second end of the inductor L1. The second end of the resistor R14 is electrically connected to the first end of the resistor R73. The second end of the resistor R73 is electrically connected to the first end of the operational amplifier U42. The second end of the operational amplifier U42 is electrically connected to the chip U19. The first end of the diode D11 is electrically connected to the first end of the resistor R53.
9. The stepped timing power supply box according to claim 8, characterized in that, The VBAT voltage unit further includes a second discharge circuit, which includes a port J3, a resistor R240 and a switch Q70. The second end of the diode D11 is electrically connected to the port J3 and the first end of the resistor R240, respectively, and the second end of the resistor R240 is electrically connected to the switch Q70.
10. The stepped timing power supply box according to claim 1, characterized in that, The communication module includes a first serial port unit and a second serial port unit, which are electrically connected to the chip U19 respectively.