Control circuit for external input signal of internal communication system

Abstract

The utility model relates to the technical field of input signal control, and discloses a control circuit for an external input signal of an internal connection system, which comprises a resistor R228, a capacitor C241, a triode Q13, a clamping diode D39, a relay K2 and an interface J9. According to the invention, accurate and stable control of external input signals is realized, damage of excessive current to subsequent elements is avoided based on current limiting of control signals, circuit safety is guaranteed, voltage fluctuation is reduced based on voltage stabilization, signal transmission is more stable, voltage abnormity is prevented based on clamping, and the relay K2 is protected. High and low levels are generated to control the switching action of the relay, three switching channels are output to the interface, a control signal is accurately transmitted to external equipment, and the interface is connected with a plurality of signals to adapt to the requirements of different external equipment, so that the problems of poor stability and low precision of a traditional control circuit are solved; and the requirements of external equipment with relatively high signal response requirements are met.

Description

Technical Field

[0001] This application relates to the field of input signal control technology, specifically a control circuit for an internal system to receive external input signals. Background Technology

[0002] In the field of interaction between internal communication systems and external devices, precise control of external input signals is crucial. The inventors, in their research of existing similar products, discovered the following shortcomings in achieving this functionality:

[0003] Traditional control circuits are not very stable and cannot ensure that external devices can reliably receive signals from the internal communication system. Interference and signal loss are common during signal transmission. They also lack control precision and cannot meet the needs of some external devices that have high signal response requirements.

[0004] The aforementioned problems mainly stem from the inadequate circuit structure design of existing similar products. For example, some circuits do not adequately consider signal voltage regulation and clamping, making the input signal susceptible to voltage fluctuations; moreover, the design of the signal transmission channel lacks optimization, resulting in signal attenuation or distortion during transmission.

[0005] In summary, there is an urgent need for a new control circuit for external input signals in an internal communication system to solve the above problems. Utility Model Content

[0006] The purpose of this application is to provide a control circuit for an internal communication system that receives external input signals, so as to solve the technical problems mentioned in the background art.

[0007] To achieve the above objectives, this application discloses the following technical solution: a control circuit for external input signals of an internal communication system, including a resistor R228, a capacitor C241, a transistor Q13, a clamping diode D39, a relay K2, and an interface J9;

[0008] In this configuration, the control signal AHC595_QF is connected to pin 1 of resistor R228; pin 1 of capacitor C241 and transistor Q13 are both connected to pin 2 of resistor R228; pin 2 of transistor Q13 is grounded; pin 3 of transistor Q13, pin 2 of capacitor C241, and pin 1 of clamping diode D39 are all connected to pin 10 of relay K2; pin 1 of relay K2 and pin 3 of clamping diode are both connected to VCC; pin 2 of clamping diode D39 is floating; pins 5 and 6 of relay K2 are floating; pins 4 and 7 of relay K2 are both connected to pin 8 of interface J9; and pins 3 and 8 of relay K2 are both connected to interface J9. Pin 15 of interface J9 is connected. Pins 2 and 9 of relay K2 are both connected to pin 7 of interface J9. Pin 1 of interface J9 is connected to signal CON1. ​​Pin 2 of interface J9 is connected to signal CON2. Pin 3 of interface J9 is connected to signal CON3. Pin 4 of interface J9 is connected to signal CON4. Pin 5 of interface J9 is grounded. Pin 6 of interface J9 is left floating. Pin 9 of interface J9 is connected to signal CON9. Pin 10 of interface J9 is connected to signal CON10. Pin 11 of interface J9 is connected to signal CON11. Pin 12 of interface J9 is connected to signal CON12. Pin 13 of interface J9 is left floating. Pin 14 of interface J9 is grounded.

[0009] Beneficial effects: The control circuit for external input signals of the internal communication system in this application achieves accurate and stable control of external input signals. Based on current limiting of the control signal, it avoids excessive current from damaging subsequent components and ensures circuit safety. Based on voltage regulation, it reduces voltage fluctuations and makes signal transmission more stable. Based on clamping to prevent abnormal voltage protection relay K2, it generates high and low levels through the connection between the transistor and the relay to control the switching action of the relay and outputs 3 switching channels to the interface to accurately transmit the control signal to the external device. The interface can connect multiple signals to adapt to the needs of different external devices, thereby solving the problems of poor stability and low accuracy of traditional control circuits and meeting the needs of external devices with high signal response requirements. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 The circuit diagram shows the control circuit for the external input signal of the internal communication system provided in the embodiments of this application. Detailed Implementation

[0012] The technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0013] In this document, the term "comprising" is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0014] This embodiment discloses, as follows: Figure 1 The control circuit for an internal communication system that receives external input signals includes a resistor R228, a capacitor C241, a transistor Q13, a clamping diode D39, a relay K2, and an interface J9.

[0015] In this configuration, the control signal AHC595_QF is connected to pin 1 of resistor R228; pin 1 of capacitor C241 and transistor Q13 are both connected to pin 2 of resistor R228; pin 2 of transistor Q13 is grounded; pin 3 of transistor Q13, pin 2 of capacitor C241, and pin 1 of clamping diode D39 are all connected to pin 10 of relay K2; pin 1 of relay K2 and pin 3 of clamping diode are both connected to VCC; pin 2 of clamping diode D39 is left floating; pins 5 and 6 of relay K2 are both left floating; pins 4 and 7 of relay K2 are both connected to pin 8 of interface J9; and pins 3 and 8 of relay K2 are both connected to pin 1 of interface J9. Pin 5 is connected. Pins 2 and 9 of relay K2 are both connected to pin 7 of interface J9. Pin 1 of interface J9 is connected to signal CON1. ​​Pin 2 of interface J9 is connected to signal CON2. Pin 3 of interface J9 is connected to signal CON3. Pin 4 of interface J9 is connected to signal CON4. Pin 5 of interface J9 is grounded. Pin 6 of interface J9 is left floating. Pin 9 of interface J9 is connected to signal CON9. Pin 10 of interface J9 is connected to signal CON10. Pin 11 of interface J9 is connected to signal CON11. Pin 12 of interface J9 is connected to signal CON12. Pin 13 of interface J9 is left floating. Pin 14 of interface J9 is grounded.

[0016] In one specific application of this embodiment, the control signal AHC595_QF is connected in series with resistor R228 to the base of transistor Q13 (i.e., pin 1 of transistor Q13). In this connection method, the control signal AHC595_QF serves as the input signal source, and resistor R228 limits the current to prevent excessive current from damaging the base of transistor Q13, ensuring that the base current is within a suitable range so that the transistor can work normally according to the requirements of the control signal, which is crucial for the stable operation of the subsequent circuit. Transistor Q13 is connected to relay K2 (in this embodiment, relay K2 is selected as Omron G6H-2F-24VDC): the emitter of transistor Q13 (i.e., pin 2 of the transistor) is grounded, and capacitor C241 provides voltage regulation to the collector of transistor Q13 (i.e., pin 3 of the transistor), which is then clamped by the collector of transistor Q13 and clamping diode D39. Connect VCC to pin 1 of relay K2. Connect the collector of transistor Q13 to pin 10 of relay K2. At this time, the emitter of transistor Q13 is grounded to provide a reference potential for transistor operation. Capacitor C241 can reduce the voltage fluctuation of the collector voltage of transistor Q13, ensuring the stable operating voltage of relay K2. Clamping diode D39 can prevent abnormal voltage and protect the relay. Thus, the high and low levels generated by connecting the collector of transistor Q13 to pin 10 of relay K2 realize the switching action of relay K2. Connect relay K2 to the external interface J9: relay K2 outputs 3 switching channels to pins 7, 8, and 15 of interface J9. When the switching state of relay K2 changes, the corresponding channel level changes. The control signal is transmitted to the external device through interface J9 to realize the control of the external device and complete the signal interaction between the internal communication system and the external device.

[0017] Based on the above, this embodiment utilizes an internal communication system control circuit composed of resistor R228, capacitor C241, transistor Q13, clamping diode D39, relay K2, and interface J9 to achieve precise and stable control of external input signals. Resistor R228 limits the current of the control signal AHC595_QF, preventing excessive current from damaging subsequent components and ensuring circuit safety. Capacitor C241 regulates the collector voltage of transistor Q13, reducing voltage fluctuations and making signal transmission more stable. Clamping diode D39 prevents abnormal voltage and protects relay K2. The connection between the collector of transistor Q13 and relay K2 generates high and low levels to control the switching action of relay K2. Relay K2 outputs three switching channels to interface J9, accurately transmitting control signals to external devices. Interface J9 connects multiple signals, adapting to the needs of different external devices. The overall circuit solves the problems of poor stability and low accuracy of traditional control circuits, meeting the needs of external devices with high signal response requirements.

[0018] In summary, the control circuit for the external input signal of the internal communication system in this embodiment achieves precise and stable control of the external input signal. It avoids damage to subsequent components due to excessive current by limiting the control signal, ensuring circuit safety. Voltage regulation reduces voltage fluctuations, making signal transmission more stable. Clamping prevents voltage abnormalities and protects relay K2. Through the connection between the transistor and the relay, high and low levels are generated to control the relay's switching action, and three switching channels are output to the interface, accurately transmitting the control signal to the external device. The interface connects to multiple signals to adapt to the needs of different external devices, thus solving the problems of poor stability and low accuracy of traditional control circuits and meeting the needs of external devices with high signal response requirements.

[0019] Finally, it should be noted that the above description is only a preferred embodiment of this application and is not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A control circuit for an internal communication system receiving external input signals, characterized in that, Includes resistor R228, capacitor C241, transistor Q13, clamping diode D39, relay K2, and interface J9; In this configuration, the control signal AHC595_QF is connected to pin 1 of resistor R228; pin 1 of capacitor C241 and transistor Q13 are both connected to pin 2 of resistor R228; pin 2 of transistor Q13 is grounded; pin 3 of transistor Q13, pin 2 of capacitor C241, and pin 1 of clamping diode D39 are all connected to pin 10 of relay K2; pin 1 of relay K2 and pin 3 of clamping diode are both connected to VCC; pin 2 of clamping diode D39 is floating; pins 5 and 6 of relay K2 are floating; pins 4 and 7 of relay K2 are both connected to pin 8 of interface J9; and pins 3 and 8 of relay K2 are both connected to interface J9. Pin 15 of interface J9 is connected. Pins 2 and 9 of relay K2 are both connected to pin 7 of interface J9. Pin 1 of interface J9 is connected to signal CON1. ​​Pin 2 of interface J9 is connected to signal CON2. Pin 3 of interface J9 is connected to signal CON3. Pin 4 of interface J9 is connected to signal CON4. Pin 5 of interface J9 is grounded. Pin 6 of interface J9 is left floating. Pin 9 of interface J9 is connected to signal CON9. Pin 10 of interface J9 is connected to signal CON10. Pin 11 of interface J9 is connected to signal CON11. Pin 12 of interface J9 is connected to signal CON12. Pin 13 of interface J9 is left floating. Pin 14 of interface J9 is grounded.

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