Probe detection device

Abstract

The utility model provides a probe detection device. The probe detection device comprises an upper computer, an LCR tester, a first circuit board, a pressing probe circuit board and a second circuit board. The first circuit board is provided with an MCU and a first FPGA, and the second circuit board is provided with a second FPGA. The upper computer sends a command for testing a specified probe to the MCU, the MCU controls the first FPGA switching path to be connected to one side of the needle tail end of the specified probe, and the MCU controls the second FPGA switching path to be indirectly connected to one side of the needle head end of the specified probe; the LCR tester measures the current and the voltage of the probe tail end and the probe head end of the specified probe, further calculates the impedance of the specified probe, and transmits the data of the impedance to the upper computer to judge whether the impedance is in a qualified range or not; and the test process is repeated, and the detection of each probe is completed one by one. Which probe on the probe pressing circuit board is abnormal can be accurately detected, and maintenance and replacement are facilitated.

Description

Technical Field

[0001] This utility model belongs to the field of integrated circuit manufacturing technology, and specifically relates to a probe detection device. Background Technology

[0002] In DC characteristic testing during wafer termination testing, a large number of pins are required. If even one pin path malfunctions, it can lead to a series of false readings in the DC characteristic test. When false readings occur, if it's impossible to accurately determine which path is faulty, repair personnel need to replace all test pins in all paths. After a period of use, the impedance of some or all probes on the pin header circuit board may change, affecting the test results. Therefore, a suitable probe detection device is urgently needed to accurately detect which specific pin (probe) is faulty, facilitating timely replacement during repair. Utility Model Content

[0003] The purpose of this invention is to provide a probe detection device that can detect the impedance and parasitic inductance and capacitance of each DC characteristic path, determine the LCR parameter changes of the path on the pressure pin circuit board, accurately locate the abnormal path, that is, accurately detect which specific pin (probe) on the pressure pin circuit board is abnormal, which facilitates repair and replacement.

[0004] This utility model provides a probe detection device, comprising:

[0005] Host computer, LCR tester, first circuit board, pressure pin circuit board, and second circuit board;

[0006] The first circuit board is equipped with an MCU and a first FPGA, and the second circuit board is equipped with a second FPGA; the pressure pin circuit board is equipped with multiple probes; the host computer is communicatively connected to the LCR tester and the MCU; the MCU is electrically connected to the first FPGA and the second FPGA.

[0007] The host computer sends a command to the MCU to test a specified probe. The MCU controls the first FPGA switching path to connect to the tail end of the specified probe, and the MCU controls the second FPGA switching path to indirectly connect to the tip end of the specified probe. The LCR tester measures the current and voltage at the tail end and tip end of the specified probe, calculates the impedance of the specified probe, and transmits the impedance data to the host computer to determine whether the impedance is within the acceptable range. The test process is repeated to complete the testing of each probe on the probe circuit board.

[0008] Furthermore, the multiple probes on the pressure pin circuit board are arranged in an array to form a probe group; the second circuit board is provided with a needle seat pad group, and the probe group and the needle seat pad group are pressed together to achieve electrical connection.

[0009] Furthermore, the pressure pin circuit board is provided with a first end of a first communication interface, which is one of the male and female ends of the first communication interface; the tail end of each probe in the probe group is connected to the first end of the first communication interface through the circuit traces on the pressure pin circuit board.

[0010] Furthermore, the first circuit board is provided with a second end of the first communication interface, which is the other end of the male and female terminals of the first communication interface; the first FPGA is electrically connected to the second end of the first communication interface; the first end of the first communication interface is electrically connected to the second end of the first communication interface, thereby realizing the communication connection between the first circuit board and the pressure pin circuit board.

[0011] Furthermore, the pressure pin circuit board is also provided with a first end of the second communication interface; on the first circuit board, the MCU is connected to the second end of the first communication interface via wiring, and the first end of the first communication interface is electrically connected to the second end of the first communication interface; the circuit connection from the first end of the first communication interface to the first end of the second communication interface is realized on the pressure pin circuit board via wiring.

[0012] Furthermore, the second circuit board is provided with a second end of the second communication interface, and the first end of the second communication interface is electrically connected to the second end of the second communication interface;

[0013] On the second circuit board, the second FPGA is electrically connected to the second end of the second communication interface through circuit traces; each pin pad in the pin pad group is connected to the second end of the second communication interface through circuit traces.

[0014] Furthermore, the host computer and the MCU communicate via a USB interface; the host computer and the LCR tester communicate via a USB interface.

[0015] Furthermore, the probe's tail end is soldered to the pad on the pressure pin circuit board. When a probe is detected to have an unqualified impedance, the unqualified probe is removed by electric soldering and a qualified probe is re-soldered on.

[0016] Furthermore, the first circuit board is provided with a first circuit interface, through which power is supplied to the first circuit board.

[0017] Furthermore, the second circuit board is provided with a second circuit interface, through which power is supplied to the second circuit board.

[0018] Compared with the prior art, the present invention has the following beneficial effects:

[0019] This utility model provides a probe testing device, including: a host computer, an LCR tester, a first circuit board, a pressure pin circuit board, and a second circuit board; the first circuit board is equipped with an MCU and a first FPGA, and the second circuit board is equipped with a second FPGA; multiple probes are arranged on the pressure pin circuit board; the host computer is communicatively connected to the LCR tester and the MCU respectively; the MCU is electrically connected to the first FPGA and the second FPGA respectively; the host computer sends a command to the MCU to test a specified probe, the MCU controls the first FPGA to switch the path to connect to the tail end of the specified probe, and the MCU controls the second FPGA to switch the path to indirectly connect to the tip end of the specified probe; the LCR tester measures the current and voltage at the tail end and tip end of the specified probe, and then calculates the impedance of the specified probe, and transmits the impedance data to the host computer to determine whether the impedance is within the qualified range; the testing process is repeated to complete the testing of each probe on the pressure pin circuit board one by one. This invention can detect the impedance and parasitic inductance and capacitance of each DC characteristic path, determine the LCR parameter changes of the path on the pressure pin circuit board, accurately locate the abnormal path, that is, accurately detect which specific pin (probe) on the pressure pin circuit board is abnormal, which facilitates repair and replacement. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the probe detection device according to an embodiment of the present invention.

[0021] Figure 2 This is a schematic diagram of the detection principle of the probe detection device according to an embodiment of the present invention.

[0022] The reference numerals in the attached figures are as follows:

[0023] 10-First circuit board; 20-Second circuit board; 30-Pin circuit board; 21-Pin socket pad group; 31-Probe group; 41a-First end of the first communication interface; 41b-Second end of the first communication interface; 42a-First end of the second communication interface; 42b-Second end of the second communication interface. Detailed Implementation

[0024] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0025] For ease of description, some embodiments of this application may use spatially relative terms such as “above,” “below,” “top,” and “under” to describe the relationship between one element or component and another (or more) elements or components as shown in the accompanying drawings. It should be understood that, in addition to the orientations described in the drawings, spatially relative terms are also intended to include different orientations of the device during use or operation. For example, if the device in the drawings is flipped, it is described as an element or component “below” or “under” other elements or components, and will subsequently be positioned “above” or “on” other elements or components. The terms “first,” “second,” etc., used below are used to distinguish between similar elements and are not necessarily used to describe a particular order or temporal sequence. It should be understood that these terms, as used, may be replaced where appropriate.

[0026] This embodiment provides a probe detection device, such as Figures 1 to 2 As shown, it includes:

[0027] Host computer, LCR tester, first circuit board 10, pressure pin circuit board 30, and second circuit board 20;

[0028] The first circuit board 10 is equipped with an MCU and a first FPGA, and the second circuit board 20 is equipped with a second FPGA; the pressure pin circuit board 30 is equipped with multiple probes; the host computer is communicatively connected to the LCR tester and the MCU respectively; the MCU is electrically connected to the first FPGA and the second FPGA respectively.

[0029] The host computer sends a command to the MCU to test a specified probe. The MCU controls the first FPGA switching path to connect to the tail end of the specified probe, and the MCU controls the second FPGA switching path to indirectly connect to the tip end of the specified probe. The LCR tester measures the current and voltage at the tail end and tip end of the specified probe, and then calculates the impedance of the specified probe. The impedance data is then transmitted to the host computer to determine whether the impedance is within the acceptable range. The test process is repeated to complete the testing of each probe on the probe circuit board.

[0030] The probe detection device of this utility model embodiment is described in detail below.

[0031] Specifically, the host computer is responsible for transmitting the switching instructions for the test probe paths and reading the test results from the LCR tester. The host computer and the MCU communicate via a USB interface. The LCR tester is a high-precision tester that can test the parameters of components such as inductors (L), capacitors (C), and resistors (R), providing various measurement combinations, sorting functions, and list testing capabilities. In the first circuit board 10, the MCU is responsible for communicating with the host computer, and the MCU controls the first FPGA to physically switch the probe paths. The second circuit board 20 receives instructions from the MCU and controls the second FPGA to physically switch the probe paths. The LCR tester receives instructions from the host computer, generates a sinusoidal AC signal, then measures the current and voltage across the probe, calculates the probe impedance according to Ohm's law in vector form, and then transmits the data to the host computer for judgment.

[0032] Multiple probes on the pressure pin circuit board 30 are arranged in an array to form a probe group 31; a needle socket pad group 21 is provided on the second circuit board 20, and the probe group 31 and the needle socket pad group 21 are pressed together to achieve electrical connection. The pressure pin circuit board 30 is provided with a first end 41a of a first communication interface, which is one of the male and female ends of the first communication interface; one side of the tail end of each probe in the probe group 31 is connected to the first end 41a of the first communication interface through the circuit traces on the pressure pin circuit board 30. The first circuit board 10 is provided with a second end 41b of the first communication interface, which is the other of the male and female ends of the first communication interface; the first FPGA is electrically connected to the second end 41b of the first communication interface; the first end 41a and the second end 41b of the first communication interface can be electrically connected, for example, through a ribbon cable, to achieve the communication connection between the first circuit board 10 and the pressure pin circuit board 30.

[0033] The pressure pin circuit board 30 also has a first terminal 42a of the second communication interface. On the first circuit board 10, the MCU is connected to the second terminal 41b of the first communication interface via wiring, and the first terminal 41a and the second terminal 41b of the first communication interface are electrically connected. A circuit is designed on the pressure pin circuit board 30 to realize the circuit connection from the first terminal 41a of the first communication interface to the first terminal 42a of the second communication interface. The second circuit board 20 has a second terminal 42b of the second communication interface, and the first terminal 42a and the second terminal 42b of the second communication interface can be electrically connected, for example, via a ribbon cable. On the second circuit board 20, the second FPGA is electrically connected to the second terminal 42b of the second communication interface via wiring. Therefore, the MCU is electrically connected to the second FPGA via the second terminal 41b of the first communication interface, the first terminal 41a of the first communication interface, the first terminal 42a of the second communication interface, and the second terminal 42b of the second communication interface. That is, the MCU and the second FPGA are electrically connected, so that the second circuit board 20 receives instructions from the MCU and controls the second FPGA to realize the physical switching of the probe path. On the second circuit board 20, each pin socket pad in the pin socket pad group 21 is connected to the second end 42b of the second communication interface through the circuit traces on the second circuit board 20.

[0034] The host computer and the LCR tester communicate via a USB interface. The LCR tester measures the current and voltage at the tip and tail of a specified probe. Specifically, the LCR tester is indirectly connected to the tip of the probe via a first interface (FH interface) and indirectly connected to the tip of the probe via a second interface (FL interface). This invention can detect the impedance and parasitic inductance and capacitance of each DC characteristic path, determine the LCR parameter changes of the paths on the pressure pin circuit board, accurately locate abnormal paths, and facilitate repair.

[0035] Multiple probes on the pin press circuit board 30 are arranged in an array to form a probe group 31. The pin press circuit board 30 can contain dozens or hundreds of probes. In actual testing, each probe is measured and judged individually. The pin press circuit board 30 to be tested is connected, and impedance testing is performed on each probe, with the results recorded. After testing, the failed probes are displayed with graphical and textual descriptions, making it easy for the operator to quickly find and replace them. The probe tails are soldered to the pads on the pin press circuit board 30. When a probe is found to have an impedance that is not up to standard, the failed probe is removed by soldering, and a qualified probe is resoldered. When an anomaly is found, only the faulty probe needs to be replaced. Compared with the previous method of replacing all test pins, this reduces costs and is more reasonable.

[0036] The first circuit board 10 is provided with a first circuit interface, through which power is supplied to the first circuit board 10. The second circuit board 20 is provided with a second circuit interface, through which power is supplied to the second circuit board 20.

[0037] The probe testing device provided by this utility model is used for testing and maintenance, periodic inspection and problem analysis on the pressure pin circuit board; furthermore, it can statistically analyze whether there is a high failure rate of one or more signal paths in a product during testing, and provide damage parameters to facilitate further evaluation of the product.

[0038] In summary, this utility model provides a probe testing device, comprising: a host computer, an LCR tester, a first circuit board, a pressure pin circuit board, and a second circuit board; the first circuit board is equipped with an MCU and a first FPGA, and the second circuit board is equipped with a second FPGA; multiple probes are arranged on the pressure pin circuit board; the host computer is communicatively connected to the LCR tester and the MCU; the MCU is electrically connected to the first FPGA and the second FPGA; the host computer sends a command to the MCU to test a specified probe, the MCU controls the first FPGA to switch its path to the tail end of the specified probe, and the MCU controls the second FPGA to switch its path to indirectly connect to the tip end of the specified probe; the LCR tester measures the current and voltage at the tail end and tip end of the specified probe, and then calculates the impedance of the specified probe, and transmits the impedance data to the host computer to determine whether the impedance is within the acceptable range; the testing process is repeated to complete the testing of each probe on the pressure pin circuit board one by one. This invention can detect the impedance and parasitic inductance and capacitance of each DC characteristic path, determine the LCR parameter changes of the path on the pressure pin circuit board, accurately locate the abnormal path, that is, accurately detect which specific pin (probe) on the pressure pin circuit board is abnormal, which facilitates repair and replacement.

[0039] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. The methods disclosed in the embodiments are described simply because they correspond to the devices disclosed in the embodiments; relevant details can be found in the method section.

[0040] The above description is only a description of the preferred embodiment of the present utility model and is not intended to limit the scope of the present utility model. Any person skilled in the art can make possible changes and modifications to the technical solution of the present utility model by using the methods and techniques disclosed above without departing from the spirit and scope of the present utility model. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present utility model without departing from the content of the technical solution of the present utility model shall fall within the protection scope of the technical solution of the present utility model.

Claims

1. A probe detection apparatus, characterized by, The probe detection device comprises an upper computer, an LCR tester, a first circuit board, a pressing needle circuit board and a second circuit board. The first circuit board is provided with an MCU and a first FPGA, and the second circuit board is provided with a second FPGA; the pressing needle circuit board is provided with a plurality of probes; the upper computer is in communication connection with the LCR tester and the MCU respectively; and the MCU is in electrical connection with the first FPGA and the second FPGA respectively.

2. The probe detection device according to claim 1, wherein the plurality of probes on the pressing needle circuit board are arranged in an array to form a probe group; and the second circuit board is provided with a needle seat pad group, and the probe group is pressed and combined with the needle seat pad group to realize electrical connection.

3. The probe detection device according to claim 2, wherein the pressing needle circuit board is provided with a first end of a first communication interface, and the first end is one end of the male end and the female end of the first communication interface; and the tail end of each probe in the probe group is connected to the first end of the first communication interface through circuit wiring on the pressing needle circuit board.

4. The probe detection device according to claim 3, wherein the first circuit board is provided with a second end of the first communication interface, and the second end is the other end of the male end and the female end of the first communication interface; the first FPGA is in electrical connection with the second end of the first communication interface; and the first end of the first communication interface is in electrical connection with the second end of the first communication interface, so as to realize communication connection between the first circuit board and the pressing needle circuit board.

5. The probe detection device according to claim 4, wherein the pressing needle circuit board is further provided with a first end of a second communication interface; on the first circuit board, the MCU is in communication connection with the second end of the first communication interface through circuit wiring, and the first end of the first communication interface is in electrical connection with the second end of the first communication interface; and on the pressing needle circuit board, circuit connection is realized between the first end of the first communication interface and the first end of the second communication interface through circuit wiring.

6. The probe detection device according to claim 5, wherein the second circuit board is provided with a second end of the second communication interface, and the first end of the second communication interface is in electrical connection with the second end of the second communication interface; on the second circuit board, the second FPGA is in electrical connection with the second end of the second communication interface through circuit wiring; and each needle seat pad in the needle seat pad group is connected to the second end of the second communication interface through circuit wiring.

7. The probe detection device according to claim 1, wherein the upper computer is in communication connection with the MCU through a USB interface; and the upper computer is in communication connection with the LCR tester through a USB interface.

8. The probe detection device according to claim 1, wherein the tail end of the probe is welded on a pad of the pressing needle circuit board through soldering; when it is detected that the impedance of a probe is unqualified, the unqualified probe is removed by electric welding, and a qualified probe is welded again. ​ 9. The probe detection apparatus of claim 1, wherein the first circuit board is provided with a first circuit interface through which the first circuit board is powered.

10. The probe detection apparatus of claim 1, wherein the second circuit board is provided with a second circuit interface through which the second circuit board is powered. ​ ​

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