Control circuit for automatically adapting program downloading of single chip microcomputer to watchdog

By pulling up an unused pin of the microcontroller to a high level when there is no signal output, the watchdog circuit control is stopped. After the program download is complete, the watchdog circuit takes over control, which solves the problem of watchdog misjudgment during the microcontroller program download process, realizes automatic adaptation, improves download accuracy and simplifies operation.

CN223986319UActive Publication Date: 2026-03-10HNAC TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-03-27
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

In the current microcontroller program download process, the watchdog circuit misjudged and reset, causing the program download to fail. This process is cumbersome and prone to errors.

Method used

By pulling up an unused pin of the microcontroller to a high level when there is no signal output, the watchdog circuit control is stopped. After the program download is complete, the watchdog circuit takes over control, achieving automatic adaptation and simplifying the operation process.

Benefits of technology

It improved the accuracy of program downloads, reduced the workload of technical personnel, and simplified the operation process.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a single-chip microcomputer program downloading and watchdog automatic adaptation control circuit, and relates to the field of single-chip microcomputer control. A reset output pin of a watchdog circuit is connected with a first input end of an OR gate; a second input end of the OR gate is connected with power supply voltage through a first resistor, and an output end of the OR gate is connected with a reset pin of the single chip microcomputer; the common end of the OR gate and the first resistor is connected with an unoccupied pin of the single-chip microcomputer, and the unoccupied pin of the single-chip microcomputer has no signal output when a program is downloaded and is at a low level after the program is downloaded. When the program is downloaded, the spare pin of the single-chip microcomputer has no signal output, so that the output of the OR gate is always pulled up by the first resistor to be high level, the control of the watchdog circuit to the single-chip microcomputer is stopped, and after the program is downloaded, the spare pin of the single-chip microcomputer is low level, so that the output of the OR gate is controlled by the watchdog circuit; automatic adaptation of program downloading and a watchdog circuit is achieved, the operation process is simplified, and the accuracy of product testing is improved.
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Description

TECHNICAL FIELD

[0001] The utility model relates to the field of singlechip control, especially a kind of control circuit of singlechip program download and watchdog automatic adaptation. BACKGROUND

[0002] At present, with the continuous development of single-chip technology, it has been widely used. In order to prevent the single-chip from being disturbed by the external electromagnetic field during work, the program enters the dead cycle, which leads to the single-chip unable to continue normal work. Generally, the hardware "watchdog" circuit is added outside the single-chip to monitor the operation of the main program. Once the program is out of control and runs wildly, the "watchdog" circuit will reset and restart the single-chip to avoid system malfunction. However, during the product testing process, the single-chip needs to download the program again. During the program downloading process, the main program is interrupted and the watchdog fails. The "watchdog" circuit misjudges that the program runs wildly, controls the single-chip to reset, and causes the program downloading to fail. The prior art is to close the "watchdog" function by inserting a jumper cap or a dial switch before downloading the program, and to open the "watchdog" function by the jumper cap or the dial switch after the program is downloaded. This method is complicated to operate and prone to errors, which adds workload to the technical personnel. CONTENT OF THE UTILITY MODEL

[0003] The utility model aims at providing a kind of control circuit of single-chip program download and watchdog automatic adaptation, can be through the spare pin of single-chip when program downloading no signal output, so that the output of or gate is always pulled up to high level by first resistance, stop the control of watchdog circuit to single-chip, after the completion of program downloading, the spare pin of single-chip is low level, so that the output of or gate is controlled by watchdog circuit, realizes program downloading and watchdog circuit automatic adaptation, simplifies the operation process, and improves the accuracy of product testing.

[0004] To solve the above technical problems, the utility model provides a kind of control circuit of single-chip program download and watchdog automatic adaptation, including program downloading interface, single-chip, watchdog circuit, first resistance and or gate;

[0005] The positive power supply pin of the program downloading interface is connected to the power supply voltage, the bidirectional data pin of the program downloading interface is connected to the bidirectional data pin of the single-chip, the synchronous clock pin of the program downloading interface is connected to the synchronous clock pin of the single-chip, and the negative power supply pin of the program downloading interface is grounded;

[0006] The output pin of the single-chip is connected to the input pin of the watchdog circuit, and the reset output pin of the watchdog circuit is connected to the first input end of the or gate;

[0007] The positive power pin of the watchdog circuit is connected to the power supply voltage, and the negative power pin and the power failure detection input pin of the watchdog circuit are grounded.

[0008] The second input end of the OR gate is connected to the power supply voltage through the first resistor, and the output end of the OR gate is connected to the reset pin of the single-chip microcomputer.

[0009] The common end of the OR gate and the first resistor is connected to the spare pin of the single-chip microcomputer, wherein the spare pin of the single-chip microcomputer has no signal output during program downloading and is at a low level after program downloading is completed.

[0010] Optionally, the first filter module is further connected to the positive power pin of the watchdog circuit at a first end and to the negative power pin and the power failure detection input pin of the watchdog circuit at a second end.

[0011] Optionally, the first filter module comprises a first capacitor and a second capacitor, wherein the first end of the first capacitor and the first end of the second capacitor are both connected to the positive power pin of the watchdog circuit, and the second end of the first capacitor and the second end of the second capacitor are both connected to the negative power pin and the power failure detection input pin of the watchdog circuit.

[0012] Optionally, the energy storage module is further connected to the positive power pin of the watchdog circuit at a first end and to the negative power pin and the power failure detection input pin of the watchdog circuit at a second end.

[0013] Optionally, the energy storage module is a third capacitor.

[0014] Optionally, the overvoltage protection circuit is further connected to the positive power pin of the watchdog circuit at a first end and to the negative power pin and the power failure detection input pin of the watchdog circuit at a second end.

[0015] Optionally, the overvoltage protection circuit comprises a second resistor, a third resistor and a parallel voltage stabilizer.

[0016] The first end of the second resistor is connected to the positive power pin of the watchdog circuit, and the second end of the second resistor is connected to the first end of the third resistor.

[0017] The second end of the third resistor is connected to the negative power pin and the power failure detection input pin of the watchdog circuit.

[0018] The anode of the parallel voltage stabilizer is connected with the negative power supply pin and the power supply fault detection input pin of the watchdog circuit, the cathode of the parallel voltage stabilizer is connected with the positive power supply pin of the watchdog circuit, and the reference end of the parallel voltage stabilizer is connected with the common end of the second resistor and the third resistor.

[0019] Optionally, the reset pin of the program download interface and a fourth resistor are further included, the reset pin of the program download interface is connected with the first end of the fourth resistor and the reset pin of the single-chip microcomputer, and the second end of the fourth resistor is connected with the power supply voltage.

[0020] Optionally, a second filter module is further included, the first end of the second filter module is connected with the common end of the reset pin of the program download interface, the first end of the fourth resistor and the reset pin of the single-chip microcomputer, and the second end of the second filter module is grounded.

[0021] Optionally, the second filter module includes a fourth capacitor and a fifth capacitor, the first end of the fourth capacitor and the first end of the fifth capacitor are both connected with the common end of the reset pin of the program download interface, the first end of the fourth resistor and the reset pin of the single-chip microcomputer, the second end of the fourth capacitor and the second end of the fifth capacitor are both grounded.

[0022] The application provides a control circuit for automatic adaptation of single-chip microcomputer program download and watchdog, including a program download interface, a single-chip microcomputer, a watchdog circuit, a first resistor and an OR gate; the positive power supply pin of the program download interface is connected with the power supply voltage, the bidirectional data pin of the program download interface is connected with the bidirectional data pin of the single-chip microcomputer, the synchronous clock pin of the program download interface is connected with the synchronous clock pin of the single-chip microcomputer, and the negative power supply pin of the program download interface is grounded; the output pin of the single-chip microcomputer is connected with the input pin of the watchdog circuit, and the reset output pin of the watchdog circuit is connected with the first input end of the OR gate; the positive power supply pin of the watchdog circuit is connected with the power supply voltage, and the negative power supply pin and the power supply fault detection input pin of the watchdog circuit are both grounded; the second input end of the OR gate is connected with the power supply voltage through the first resistor, the output end of the OR gate is connected with the reset pin of the single-chip microcomputer, and the common end of the OR gate and the first resistor is connected with the spare pin of the single-chip microcomputer, wherein the spare pin of the single-chip microcomputer has no signal output during program download and is at a low level after program download. It can be seen that, by making the spare pin of the single-chip microcomputer have no signal output during program download, the output of the OR gate is always pulled up to a high level by the first resistor, the control of the single-chip microcomputer by the watchdog circuit is stopped, the spare pin of the single-chip microcomputer is at a low level after program download, the output of the OR gate is controlled by the watchdog circuit, the automatic adaptation of program download and the watchdog circuit is realized, the operation process is simplified, the accuracy of product testing is improved, and the workload of technical personnel is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0023] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the control circuit for automatic adaptation of microcontroller program download and watchdog timer disclosed in this utility model;

[0025] Figure 2 This is a schematic diagram of the control circuit for automatic adaptation of microcontroller program download and watchdog timer disclosed in this utility model. Detailed Implementation

[0026] The core of this invention is to provide a control circuit for automatic adaptation between microcontroller program download and watchdog timer. During program download, the unused pins of the microcontroller have no signal output, ensuring the output of the OR gate is always pulled high by the first resistor, thus stopping the watchdog circuit's control of the microcontroller. After program download is complete, the unused pins of the microcontroller are at a low level, allowing the OR gate output to be controlled by the watchdog circuit. This achieves automatic adaptation between program download and watchdog timer circuit, simplifying the operation process and improving the accuracy of product testing.

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0028] For details, please see Figure 1 As shown, Figure 1 This is a schematic diagram of the control circuit for microcontroller program download and watchdog automatic adaptation disclosed in this utility model.

[0029] The control circuit for automatic adaptation of microcontroller program download and watchdog timer includes a program download interface J1, a microcontroller U1, a watchdog circuit U2, a first resistor R1, and an OR gate U3. The positive power supply pin V+ of the program download interface J1 is connected to the power supply voltage VCC. The bidirectional data pin SWDIO of the program download interface J1 is connected to the bidirectional data pin SWDIO of the microcontroller U1. The synchronous clock pin SWCLK of the program download interface J1 is connected to the synchronous clock pin SWCLK of the microcontroller U1. The negative power supply pin V- of the program download interface J1 is grounded to GND. The output pin W of the microcontroller U1... DI is connected to the input pin WDI of the watchdog circuit U2. The reset output pin RESET of the watchdog circuit U2 is connected to the first input of the OR gate U3. The positive power supply pin V+ of the watchdog circuit U2 is connected to the power supply voltage VCC. The negative power supply pin V- and the power fault detection input pin PFI of the watchdog circuit U2 are both grounded to GND. The second input of the OR gate U3 is connected to the power supply voltage VCC through the first resistor R1. The output of the OR gate U3 is connected to the reset pin RESET of the microcontroller U1. The common terminal of the OR gate U3 and the first resistor R1 is connected to the unused pin OE of the microcontroller U1.

[0030] Specifically, when downloading the program through the program download interface J1, the main program execution is interrupted and the watchdog timer fails to feed. The input pin WDI of the watchdog circuit U2 does not receive a normal watchdog square wave signal, and the reset output pin RESET of the watchdog circuit U2 outputs a low-level signal. When passing through OR gate U3, since the program has not yet been burned in, the unused pin OE of the microcontroller U1 has no signal output and is pulled up to a high level by the first resistor R1. At this time, although the second input of OR gate U3 is low, the output of OR gate U3 must be high. The signal received by the reset pin RESET of the microcontroller U1 is high, and the microcontroller U1 can burn the program normally. After the program download is completed, the unused pin OE of the microcontroller U1 is set to a low level by the software, or When the first input of gate U3 is low, the output of gate U3 is determined by the reset output pin of the watchdog timer. The watchdog circuit U2 resumes its "watchdog" function and continues to monitor the running status of microcontroller U1. When the input pin WDI of watchdog circuit U2 receives a normal feed square wave signal, the reset output pin of the watchdog timer is high, and gate U3 outputs a high level, and the main program of microcontroller U1 continues to run. When the input pin WDI of watchdog circuit U2 does not receive a normal feed square wave signal, watchdog circuit U2 determines that the main program of microcontroller U1 has crashed, and the reset output pin RESET of watchdog circuit U2 immediately outputs a low level, and gate U3 outputs a low level, and microcontroller U1 immediately resets and restarts the main program.

[0031] It should be noted that the unused pin OE of microcontroller U1 is any idle pin other than the bidirectional data pin SWDIO, the synchronous clock pin SWCLK, the output pin, and the reset pin. Preferably, the pin of microcontroller U1 that has no signal output when downloading the program through the program download interface J1 and outputs a low level after the program download is completed is used as the unused pin OE of microcontroller U1 in this scheme. In this way, the pin can realize the function of the unused pin OE of microcontroller U1 in this scheme, and also realize the multiplexing of the pin; the power supply voltage VCC can be 3.3V, and the reset pin RESET of microcontroller U1 is active low.

[0032] As can be seen, this application achieves automatic adaptation between program download and watchdog circuit U2 by ensuring that the unused pin OE of microcontroller U1 has no signal output during program download, thus preventing the output of OR gate U3 from being pulled high by the first resistor R1 and stopping the watchdog circuit U2 from controlling microcontroller U1. After program download is completed, the unused pin OE of microcontroller U1 is at a low level, allowing the output of OR gate U3 to be controlled by watchdog circuit U2. This simplifies the operation process, improves the accuracy of product testing, and reduces the workload of technicians.

[0033] Based on the above embodiments:

[0034] For details, please see Figure 2 As shown, Figure 2 This is a schematic diagram of the control circuit for automatic adaptation of microcontroller program download and watchdog timer disclosed in this utility model.

[0035] As an optional embodiment, it also includes a first filtering module, the first end of which is connected to the positive power supply pin V+ of the watchdog circuit U2, and the second end of which is connected to the negative power supply pin V- and the power fault detection input pin PFI of the watchdog circuit U2.

[0036] Considering that external environment or internal components may introduce high-frequency noise and transient interference, such as high-frequency switching and electromagnetic interference, which can cause the watchdog circuit U2 to falsely trigger or fail, this embodiment sets up a first filter module between the positive power supply pin V+ and the negative power supply pin V- of the watchdog circuit U2 and the power fault detection input pin PFI. Firstly, the first filter module can effectively suppress high-frequency noise and transient interference on the power line, ensuring the stability of the power supply voltage VCC of the watchdog circuit U2 and avoiding false triggering or failure due to power fluctuations. Secondly, by smoothing the power supply voltage VCC fluctuations, the first filter module can reduce noise interference received by the power fault detection input pin PFI, improving the accuracy of power fault detection and avoiding false alarms or missed alarms. Furthermore, the first filter module can also absorb transient voltage surges on the power line, protecting the watchdog circuit U2 and its related components from damage and extending circuit life.

[0037] Specifically, the first filtering module may include a first capacitor C1 and a second capacitor C2. The first terminals of both capacitors C1 and C2 are connected to the positive power supply pin V+ of the watchdog circuit U2. The second terminals of both capacitors C1 and C2 are connected to the negative power supply pin V- and the power fault detection input pin PFI of the watchdog circuit U2. One capacitor C1 can be large, and the other small. The large capacitor filters out low-frequency ripple, while the small capacitor filters out high-frequency interference, thereby improving the purity of the output voltage and smoothing the power supply voltage VCC input to the watchdog circuit U2.

[0038] As can be seen, in this embodiment, a first filtering module is set between the positive power supply pin V+ of the watchdog circuit U2, the negative power supply pin V- of the watchdog circuit U2, and the power fault detection input pin PFI. This enhances the anti-interference capability and reliability of the watchdog circuit U2, enabling it to operate stably in complex electromagnetic environments. At the same time, it improves the accuracy of power fault detection, ensuring timely response and protective measures when power is abnormal.

[0039] As an optional embodiment, it also includes an energy storage module, the first end of which is connected to the positive power supply pin V+ of the watchdog circuit U2, and the second end of which is connected to the negative power supply pin V- and the power fault detection input pin PFI of the watchdog circuit U2.

[0040] Specifically, the energy storage module can store electrical energy and release it when the power supply voltage VCC fluctuates instantaneously or is briefly interrupted, providing temporary power support to the watchdog circuit U2 to balance the fluctuations in the power supply voltage VCC and thus maintain the stability of the power supply to the watchdog circuit U2. The energy storage module can be a third capacitor C3.

[0041] As can be seen, the energy storage module in this embodiment can balance the fluctuation of the power supply voltage VCC and ensure the stability of the power supply to the watchdog circuit U2.

[0042] As an optional embodiment, an overvoltage protection circuit is also included. The first terminal of the overvoltage protection circuit is connected to the positive power supply pin V+ of the watchdog circuit U2, and the second terminal of the overvoltage protection circuit is connected to the negative power supply pin V- and the power fault detection input pin PFI of the watchdog circuit U2.

[0043] To improve the anti-interference capability of the control circuit for microcontroller program download and watchdog automatic adaptation, and to prevent watchdog circuit U2 from malfunctioning, this embodiment adds an overvoltage protection circuit. When the power supply voltage VCC of watchdog circuit U2 is too high, the overvoltage protection circuit can clamp the voltage of the positive power supply pin V+ of watchdog circuit U2 within the safe voltage range of watchdog circuit U2, preventing watchdog circuit U2 from being damaged due to overvoltage.

[0044] Specifically, the overvoltage protection circuit may include a second resistor R2, a third resistor R3, and a parallel voltage regulator U4; the first end of the second resistor R2 is connected to the positive power supply pin V+ of the watchdog circuit U2, and the second end of the second resistor R2 is connected to the first end of the third resistor R3; the second end of the third resistor R3 is connected to the negative power supply pin V- and the power fault detection input pin PFI of the watchdog circuit U2; the anode of the parallel voltage regulator U4 is connected to the negative power supply pin V- and the power fault detection input pin PFI of the watchdog circuit U2, the cathode of the parallel voltage regulator U4 is connected to the positive power supply pin V+ of the watchdog circuit U2, and the reference terminal of the parallel voltage regulator U4 is connected to the common terminal of the second resistor R2 and the third resistor R3.

[0045] As can be seen, this embodiment adds an overvoltage protection circuit between the positive power supply pin V+ of the watchdog circuit U2, the negative power supply pin V- of the watchdog circuit U2, and the power fault detection input pin PFI. When the power supply voltage VCC of the watchdog circuit U2 is too high, the overvoltage protection circuit can clamp the voltage of the positive power supply pin V+ of the watchdog circuit U2 within the safe voltage range of the watchdog circuit U2, preventing the watchdog circuit U2 from being damaged due to overvoltage and ensuring the safety of the watchdog circuit.

[0046] As an optional embodiment, it also includes a reset pin SRST of the program download interface J1 and a fourth resistor R4. The reset pin SRST of the program download interface J1 is connected to the first end of the fourth resistor R4 and the reset pin RESET of the microcontroller U1, and the second end of the fourth resistor R4 is connected to the power supply voltage VCC.

[0047] Before downloading the program, to avoid data errors or download failures caused by program conflicts or inconsistent hardware states during the download process, and to ensure that the microcontroller U1 stops its current running task, the program download interface J1 in this embodiment also includes a reset pin. A reset signal can be sent through the reset pin SRST of the program download interface J1 to force the microcontroller U1 into a reset state. During program download, the reset pin SRST of the program download interface J1 has no output, ensuring that the microcontroller U1 starts up and can correctly receive and burn the program code. If an abnormality occurs during the program download process, the reset pin SRST of the program download interface J1 will also send a reset signal to quickly restart the microcontroller U1, helping the microcontroller program download and watchdog automatic adaptation control circuit to recover and retry the download, thereby improving the fault tolerance capability of the microcontroller program download and watchdog automatic adaptation control circuit.

[0048] Additionally, it includes the manual reset pin MR of watchdog circuit U2, the output pin WDO of watchdog circuit U2, and the power fault output pin PFO of watchdog circuit U2. The manual reset pin MR of watchdog circuit U2 is connected to the output pin WDO of watchdog circuit U2. When the manual reset pin MR of watchdog circuit U2 receives a low-level signal, the watchdog will reset immediately. If watchdog circuit U2 fails to reset within a timeout period, the output pin WDO of watchdog circuit U2 will output a low-level or high-level signal to indicate whether the system needs to be reset. When the power fault output pin PFO of watchdog circuit U2 detects that the power supply voltage VCC is lower than the set threshold, this pin will output a signal to indicate a power fault.

[0049] As can be seen, this embodiment also includes a reset pin SRST for the program download interface J1, which can force the microcontroller U1 to enter a reset state before downloading the program, ensuring that the microcontroller U1 stops its current running task and avoids data errors or download failures caused by program conflicts or inconsistent hardware states during the download process; if an abnormality occurs during the program download process, the microcontroller U1 will be quickly restarted, improving the fault tolerance capability of the control circuit for automatic adaptation of microcontroller program download and watchdog timer.

[0050] As an optional embodiment, it also includes a second filtering module. The first end of the second filtering module is connected to the common terminal of the reset pin SRST of the program download interface J1, the first end of the fourth resistor R4, and the reset pin RESET of the microcontroller U1. The second end of the second filtering module is grounded to GND.

[0051] For an introduction to the second filtering module provided in this embodiment, please refer to the corresponding embodiment of the first filtering module described above. This utility model will not be described again here.

[0052] Specifically, the second filtering module may include a fourth capacitor C4 and a fifth capacitor C5. The first end of the fourth capacitor C4 and the first end of the fifth capacitor C5 are both connected to the common terminal of the reset pin SRST of the program download interface J1, the first end of the fourth resistor R4, and the reset pin RESET of the microcontroller U1. The second end of the fourth capacitor C4 and the second end of the fifth capacitor C5 are both grounded to GND.

[0053] As can be seen, this embodiment sets a second filtering module on the reset pin SRST of the program download interface J1 to filter the reset signal of the reset pin SRST of the program download interface, prevent the reset signal from being interfered with, enable it to operate stably in complex electromagnetic environments, and enhance the reliability of the control circuit for microcontroller program download and watchdog automatic adaptation.

[0054] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0055] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0056] The above description of the disclosed embodiments enables those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A control circuit for automatic adaptation of a microcontroller program download and watchdog, characterized in that, The program download interface, the single-chip microcomputer, the watchdog circuit, the first resistor and the OR gate are included. The positive power supply pin of the program download interface is connected to the power supply voltage, the bidirectional data pin of the program download interface is connected to the bidirectional data pin of the single-chip microcomputer, the synchronous clock pin of the program download interface is connected to the synchronous clock pin of the single-chip microcomputer, and the negative power supply pin of the program download interface is grounded. The output pin of the single-chip microcomputer is connected to the input pin of the watchdog circuit, and the reset output pin of the watchdog circuit is connected to the first input end of the OR gate. The positive power supply pin of the watchdog circuit is connected to the power supply voltage, and the negative power supply pin and the power supply fault detection input pin of the watchdog circuit are grounded. The second input end of the OR gate is connected to the power supply voltage through the first resistor, and the output end of the OR gate is connected to the reset pin of the single-chip microcomputer. The common end of the OR gate and the first resistor is connected to the spare pin of the single-chip microcomputer, wherein the spare pin of the single-chip microcomputer has no signal output during program download and is at a low level after program download is completed.

2. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to claim 1, characterized in that, The first filter module is further included, the first end of the first filter module is connected to the positive power supply pin of the watchdog circuit, and the second end of the first filter module is connected to the negative power supply pin and the power supply fault detection input pin of the watchdog circuit.

3. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to claim 2, characterized in that, The first filter module includes a first capacitor and a second capacitor, the first end of the first capacitor and the first end of the second capacitor are both connected to the positive power supply pin of the watchdog circuit, and the second end of the first capacitor and the second end of the second capacitor are both connected to the negative power supply pin and the power supply fault detection input pin of the watchdog circuit.

4. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to claim 1, characterized in that, The energy storage module is further included, the first end of the energy storage module is connected to the positive power supply pin of the watchdog circuit, and the second end of the energy storage module is connected to the negative power supply pin and the power supply fault detection input pin of the watchdog circuit.

5. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to claim 4, characterized in that, The energy storage module is a third capacitor.

6. The control circuit for automatic adaptation of microcontroller program download and watchdog as claimed in claim 1 wherein, The overvoltage protection circuit is further included, the first end of the overvoltage protection circuit is connected to the positive power supply pin of the watchdog circuit, and the second end of the overvoltage protection circuit is connected to the negative power supply pin and the power supply fault detection input pin of the watchdog circuit.

7. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to claim 6, characterized in that, The overvoltage protection circuit includes a second resistor, a third resistor and a parallel voltage stabilizer. The first end of the second resistor is connected to the positive power supply pin of the watchdog circuit, and the second end of the second resistor is connected to the first end of the third resistor. The second end of the third resistor is connected to the negative power supply pin and the power supply fault detection input pin of the watchdog circuit. The anode of the parallel voltage stabilizer is connected to the negative power supply pin and the power supply fault detection input pin of the watchdog circuit, the cathode of the parallel voltage stabilizer is connected to the positive power supply pin of the watchdog circuit, and the reference end of the parallel voltage stabilizer is connected to the common end of the second resistor and the third resistor.

8. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to any one of claims 1 to 7, characterized in that, The reset pin of the program download interface and a fourth resistor are further included, the reset pin of the program download interface is connected to the first end of the fourth resistor and the reset pin of the single-chip microcomputer, and the second end of the fourth resistor is connected to the power supply voltage.

9. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to claim 8, characterized in that, The second filter module is further included, a first end of the second filter module is connected with a common end of a reset pin of the program download interface, a first end of the fourth resistor and a reset pin of the single-chip microcomputer, and a second end of the second filter module is grounded.

10. The control circuit for automatic adaptation of a microcontroller program download and watchdog according to claim 9, characterized in that, The second filter module includes a fourth capacitor and a fifth capacitor, a first end of the fourth capacitor and a first end of the fifth capacitor are connected with a common end of a reset pin of the program download interface, a first end of the fourth resistor and a reset pin of the single-chip microcomputer, and a second end of the fourth capacitor and a second end of the fifth capacitor are grounded.