Chip and electronic equipment

By using carrier boards and white wafers in frame packaging, the high cost of substrate-type packaging in miniaturized packaging is solved, which enables component mounting and cost reduction, and improves chip connection strength.

CN223987373UActive Publication Date: 2026-03-10GUANGDONG DAPU TELECOM TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-03-21
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

In miniaturized packaging, substrate-based packaging is costly and the pins cannot support components such as crystal oscillators.

Method used

The system employs a frame package, connecting components to multiple pins via a carrier board. It uses white wafers and DAF film for fixation, reducing costs and improving connection strength.

Benefits of technology

Without a base island, component mounting was achieved, reducing processing costs and improving chip connection strength and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of chip processing, and discloses a chip and electronic equipment. Wherein the chip comprises a frame, a carrier plate, a component and a bare chip, and the frame is provided with a plurality of pins; one side of the carrier plate is connected to the plurality of pins; the component is mounted on one side, deviating from the pins, of the carrier plate; one side of the bare chip is connected to the plurality of pins. During assembly, one side of the bare chip is connected to the plurality of pins, bearing of the bare chip is realized, one side of the carrier plate is connected to the plurality of pins, then the components are mounted on one side, deviating from the pins, of the carrier plate, and the components are connected to the plurality of pins through the carrier plate, so that the problem that the components cannot be damaged under the condition of no base island is solved. According to the invention, the mounting of components is completed in the frame package, and the processing cost is greatly reduced compared with the substrate package.
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Description

TECHNICAL FIELD

[0001] The utility model relates to chip processing technical field especially, it relates to a chip and electronic equipment. BACKGROUND

[0002] In the frame type package, a metal platform is usually needed in the middle. The wafer is cut into one by one chip die and is attached on the metal platform by glue, and then subsequent bonding and plastic packaging and other processing procedures are completed. After the package is completed, the metal platform is exposed at the bottom of the chip and is used for heat dissipation and other purposes. However, in the face of the increasingly miniaturized package size, the use end begins to reduce the design of the space-occupying heat sink, and only the pins are at the bottom. Most of the market uses substrate packaging to complete this design, but the cost of the substrate is higher than that of the frame, so some factories begin to use frame packaging with pins for production, but the frame packaging only has pins at the bottom to support the chip die, but the pins cannot support the crystal oscillator and other components.

[0003] Therefore, there is an urgent need for a chip and electronic equipment to solve the above problems. UTILITY MODEL CONTENTS

[0004] Based on the above, the utility model aims at providing a chip and electronic equipment, components are connected to multiple pins through a carrier plate, solving the problem of attaching components in the frame package without a base island, and greatly reducing the processing cost compared with substrate packaging.

[0005] To achieve the above purpose, the utility model adopts the following technical scheme:

[0006] On the one hand, a chip is provided, comprising:

[0007] A frame is provided with multiple pins;

[0008] A carrier plate is connected to multiple pins on one side;

[0009] Components are installed on the side of the carrier plate away from the pins;

[0010] Chip dies are connected to multiple pins on one side.

[0011] As a preferred technical scheme of a chip, the carrier plate is a white wafer.

[0012] As a preferred technical scheme of a chip, the components are bonded to the other side of the carrier plate by insulating glue.

[0013] As a preferred technical scheme of a chip, the carrier plate is provided with an adhesive film on one side, and the carrier plate is attached to multiple pins through the adhesive film.

[0014] As a preferred technical scheme of the chip, one side of the chip die is provided with an adhesive film, and the chip die is attached to the plurality of pins through the adhesive film.

[0015] As a preferred technical scheme of the chip, the adhesive film is a DAF film.

[0016] As a preferred technical scheme of the chip, the component is a crystal oscillator, a resistor, a capacitor or an inductor.

[0017] As a preferred technical scheme of the chip, the component and the pin are bonded to the chip die through a lead wire.

[0018] As a preferred technical scheme of the chip, the top of the pin is provided with an extension portion, and the extension portion extends below the carrier plate or the chip die.

[0019] In another aspect, an electronic device is provided, comprising the chip according to any one of the above-mentioned schemes, and the chip is arranged on the circuit board.

[0020] The chip provided by the present application has the following beneficial effects:

[0021] The chip and the electronic device provided by the present application have the following beneficial effects: when assembled, one side of the chip die is connected to the plurality of pins, thereby achieving the bearing of the chip die; one side of the carrier plate is connected to the plurality of pins, and then the component is mounted on the side of the carrier plate away from the pins, and the component is connected to the plurality of pins through the carrier plate, thereby solving the problem of mounting and attaching the component in the frame package without a base island, and greatly reducing the processing cost relative to the substrate package. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical scheme in the embodiments of the present application, the drawings needed in the description of the embodiments of the present application will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of the contents of the embodiments of the present application and the drawings.

[0023] Figure 1 is a structural schematic diagram of the chip provided by the embodiment of the present application.

[0024] The symbols in the drawings are as follows:

[0025] 1, frame; 11, pin; 12, extension portion; 2, carrier plate; 3, component; 4, chip die; 5, lead wire. DETAILED DESCRIPTION

[0026] The utility model will be further described in detail below in combination with the drawings and examples. It can be understood that the specific examples described herein are only used to explain the utility model and not limit the utility model. In addition, it should be noted that only the parts related to the utility model are shown in the drawings for ease of description, not all the structures.

[0027] In the description of the utility model, unless otherwise explicitly specified and limited, the terms "connected", "connected", "fixed" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integrated; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through intermediate medium, it can be the communication inside two elements or the interaction relationship of two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.

[0028] In the utility model, unless otherwise explicitly specified and limited, the first feature "on" or "below" the second feature can include that the first and second features are in direct contact, or the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the first feature "on", "above" and "above" the second feature includes that the first feature is directly above and obliquely above the second feature, or only indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature "below", "below" and "below" the second feature includes that the first feature is directly below and obliquely below the second feature, or only indicates that the horizontal height of the first feature is less than that of the second feature.

[0029] In the description of the embodiment, the terms "up", "down", "left", "right" and other orientation or position relationship are based on the orientation or position relationship shown in the drawings, only for the convenience of description and simplification of operation, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, therefore it cannot be understood as a limitation of the utility model. In addition, the terms "first", "second" are only used to distinguish in description and have no special meaning.

[0030] A metal platform is usually needed in the middle of the frame type package. The wafer is cut into one by one chip die and attached on the metal platform by glue, and then the subsequent bonding and plastic packaging process is completed. After completing the packaging, the metal platform is exposed at the bottom of the chip and used for heat dissipation and other purposes. However, facing the increasingly small packaging size, the use end begins to reduce the design of the space-occupying heat sink, and only the pins are at the bottom. Most of them on the market use substrate packaging to complete this design, but the cost of substrate is higher than that of frame, so some factories begin to use frame packaging with pins to produce, but the frame packaging only has pins under the chip die, but the pins cannot bear the crystal oscillator and other components.

[0031] To solve the above problems, such as Figure 1 As shown, this embodiment provides an electronic device, including a circuit board and a chip, with the chip disposed on the circuit board. The chip includes a frame 1, a carrier board 2, components 3, and a die 4. The frame 1 has multiple pins 11; one side of the carrier board 2 is connected to the multiple pins 11; the components 3 are mounted on the side of the carrier board 2 away from the pins 11; and one side of the die 4 is connected to the multiple pins 11. During assembly, the die 4 is supported by the multiple pins 11 on one side, and the carrier board 2 is connected to the multiple pins 11 on one side. Then, the components 3 are mounted on the side of the carrier board 2 away from the pins 11, and the components 3 are connected to the multiple pins 11 through the carrier board 2. This solves the problem of mounting components 3 within the frame 1 package in the absence of a substrate island, and significantly reduces processing costs compared to substrate-based packaging.

[0032] In this embodiment, component 3 is bonded to the other side of carrier plate 2 with insulating adhesive, which not only fixes component 3 but also does not affect the characteristics of component 3.

[0033] In this embodiment, an adhesive film is provided on one side of the carrier plate 2, and the carrier plate 2 is attached to the plurality of pins 11 through the adhesive film. In other embodiments, the carrier plate 2 can also be attached to the plurality of pins 11 by means of insulating adhesive.

[0034] Furthermore, an adhesive film is provided on one side of the chip die 4, and the chip die 4 is attached to multiple pins 11 by the adhesive film.

[0035] In this embodiment, the adhesive film is a DAF film (Die Attach Film). DAF film has excellent thermal conductivity and adhesion. It can not only provide mechanical support, but also withstand the effects of temperature changes and mechanical stress without affecting the characteristics of the processed chip.

[0036] Preferably, the carrier 2 is a blank wafer. Firstly, blank wafers are very common raw materials in the market, and their physical properties are consistent with normal wafers. The blank wafer carrying the component 3 will not affect the characteristics of the finished product. Secondly, blank wafers are inexpensive, which can greatly reduce processing costs. Thirdly, before wafer cutting, a DAF film is applied to one side of the wafer. Both the bare chip dies 4 formed after wafer cutting and the blank wafers used to carry the component 3 can be used for chip processing. The blank wafers are bonded to multiple pins 11 by the DAF film, reducing the number of process steps.

[0037] In this embodiment, component 3 is a crystal oscillator, resistor, capacitor, or inductor.

[0038] Furthermore, component 3 and pin 11 are bonded to the bare chip 4 via lead 5. Lead 5 can be made of gold wire or alloy wire.

[0039] Preferably, an extension 12 is provided on the top of the pin 11, extending to the underside of the carrier 2 or the die 4. By providing the extension 12, the contact area between the carrier 2 and the pin 11, and between the die 4 and the pin 11, is increased, thereby improving the connection strength. After chip packaging, the extension 12 is not exposed. Since each pin 11 has a different electrical characteristic, a gap is provided between adjacent extensions 12 to prevent short circuits.

[0040] This embodiment also provides a method for processing the chip, including the following steps:

[0041] S1. A DAF film is attached to one side of the wafer, and then the wafer is cut into multiple chip dies 4 and multiple white wafers for carrying components 3.

[0042] S2. The white wafer is attached to pin 11 of frame 1 through DAF film, and the bare chip 4 is attached to pin 11 of frame 1 through DAF film.

[0043] S3. Attach components such as the crystal oscillator 3 to the white wafer;

[0044] S4, component 3, and pin 11 are bonded to the die 4 via lead 5.

[0045] S5. Complete subsequent bonding and encapsulation processes to finish chip manufacturing.

[0046] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A chip, characterized by Comprising: a frame (1) provided with a plurality of pins (11); a carrier plate (2) connected to one side of the plurality of pins (11); a component (3) mounted on the side of the carrier plate (2) away from the pins (11); a chip die (4) connected to one side of the plurality of pins (11).

2. The chip according to claim 1, characterized in that, The carrier plate (2) is a white wafer.

3. The chip of claim 1, wherein The component (3) is bonded to the other side of the carrier plate (2) by insulating glue.

4. The chip of claim 1, wherein One side of the carrier plate (2) is provided with an adhesive film, and the carrier plate (2) is attached to the plurality of pins (11) by the adhesive film.

5. The chip of claim 1, wherein, One side of the chip die (4) is provided with an adhesive film, and the chip die (4) is attached to the plurality of pins (11) by the adhesive film.

6. The chip according to claim 4 or 5, characterized in that, The adhesive film is a DAF film.

7. The chip of claim 1, wherein The component (3) is a crystal oscillator, a resistor, a capacitor, or an inductor.

8. The chip according to any one of claims 1 to 5, wherein The component (3) and the pins (11) are bonded to the chip die (4) by wire leads (5).

9. The chip according to any one of claims 1 to 5, wherein The top of the pin (11) is provided with an extension (12) extending below the carrier plate (2) or the chip die (4).

10. An electronic device, comprising: Comprising a circuit board and a chip as claimed in any one of claims 1-9, the chip being arranged on the circuit board.