Integrated circuit wafer with reinforced packaging structure
By setting a combination structure of packaging pads, thermal conductive layers, buffer protection layers and packaging layers on the wafer, combined with cutting and heat dissipation grooves, the problem of the single installation method of wafer packaging structure is solved, and the effects of flexible installation, enhanced protection and efficient heat dissipation are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2026-03-10
AI Technical Summary
Existing wafer packaging structures have a single mounting method, which cannot simultaneously achieve flexible installation, enhanced protection, and convenient cutting and heat dissipation.
It adopts a combination structure of encapsulation pad, thermal conductive layer, buffer protection layer and encapsulation layer, combined with cutting groove and heat dissipation groove to realize multiple connection methods and enhance protection. Through the design of connection pins and pin connection slots, it supports multiple installation methods, and achieves rapid heat conduction and heat dissipation through thermal conductive layer and heat dissipation holes.
It enables flexible wafer installation, enhanced protection, convenient cutting, and efficient heat dissipation, improving installation flexibility and cutting accuracy, while also enhancing the support strength of the package and the efficiency of heat dissipation.
Smart Images

Figure CN223987380U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to a semiconductor technical field, concretely is a kind of integrated circuit wafer with reinforced packaging structure. BACKGROUND
[0002] Wafer refers to the silicon wafer used to make silicon semiconductor circuit, and its raw material is silicon, and the main processing mode of wafer is sheet processing and batch processing, wafer level packaging is an advanced integrated circuit packaging technology, wafer packaging can prevent physical damage, moisture, dust and other environmental influences.
[0003] The common wafer packaging structure still has the condition that the mounting structure is single, and the wafer packaging structure is usually connected or soldered by using pin connection, but the above two connection mounting modes cannot appear and be used on the same group of packaging structures at the same time, thereby affecting the flexibility of installation.
[0004] An integrated circuit wafer with reinforced packaging structure is urgently needed to solve the technical defects in the above-mentioned technology. UTILITY MODEL CONTENTS
[0005] The utility model aims at providing an integrated circuit wafer with reinforced packaging structure to solve the problem of inconvenient flexible installation in the above-mentioned background technology.
[0006] To achieve the above-mentioned purpose, the utility model provides the following technical scheme: an integrated circuit wafer with reinforced packaging structure, comprising a packaging gasket and a wafer sheet, the wafer sheet is installed on the packaging gasket, a heat conduction layer is arranged above the wafer sheet, a buffer protection layer is arranged above the heat conduction layer, a packaging layer is arranged above the buffer protection layer, the packaging gasket is uniformly provided with a cutting groove, a reserved groove is arranged at the bottom end of the packaging gasket, a connecting pin is fixedly connected to the packaging gasket, an installation sheet is arranged at the bottom end of the packaging gasket, a chip soldering layer is fixedly connected to the bottom end of the installation sheet, a connecting block is fixedly connected to the top end of the installation sheet, and a pin connection groove is arranged in the connecting block.
[0007] As a further technical scheme of the utility model, the top end of the connecting pin is connected to the wafer sheet.
[0008] As a further technical scheme of the utility model, the bottom end of the connecting pin is embedded in the inside of the pin connection groove.
[0009] As a further technical scheme of the utility model, an adhesive layer is arranged at the top end of the installation sheet, and the top end of the installation sheet is adhesively fixed to the bottom end of the packaging gasket.
[0010] As a further technical solution of this utility model, the thermal conductive layer is made of semiconductor silicon material, and the thermal conductive layer is connected to the encapsulation pad.
[0011] As a further technical solution of this utility model, the buffer protective layer is made of alumina material, and the interior of the buffer protective layer is uniformly provided with vent holes.
[0012] As a further technical solution of this utility model, the cutting grooves are provided on both sides of the wafer.
[0013] As a further technical solution of this utility model, a heat dissipation groove is provided at the top of the encapsulation layer, and heat dissipation holes are uniformly arranged inside the heat dissipation groove.
[0014] Compared with the prior art, the beneficial effects of this utility model are: the integrated circuit wafer with the reinforced packaging structure not only realizes the function of easy and flexible installation and enhanced protection, but also realizes the function of easy cutting and heat dissipation;
[0015] (1) By setting up a packaged wafer, a reserved slot, a connecting pin, a mounting plate, a chip soldering layer and a pin connection slot, the packaged wafer can be connected to the circuit board after being divided into appropriate sizes. During connection, the mounting plate can be directly used to install on the circuit board. The chip soldering layer at the bottom of the mounting plate facilitates direct soldering connection. The connecting pin is inserted into the pin connection slot for conductive connection. The connecting pin can also be directly used for installation. Before installation, the mounting plate is removed from the bottom of the packaged pad, and then the connecting pin can be directly used for soldering. This structure realizes the function of easy and flexible installation.
[0016] (2) By setting up an encapsulation layer, a wafer, a buffer protection layer and a thermal conductive layer, the bottom of the wafer is protected by an encapsulation pad, the top of the wafer is rapidly heated by a thermal conductive layer, the buffer protection layer outside the thermal conductive layer not only has the effect of buffer protection but also has the effect of insulation, and the encapsulation layer outside the buffer protection layer improves the support strength after encapsulation and prevents external objects from directly scratching the wafer. This structure realizes the function of easy enhancement of protection.
[0017] (3) By setting up packaging pads, cutting grooves, heat dissipation grooves and heat dissipation holes, the wafers are regularly installed on the packaging pads. After packaging, the wafers can be cut into appropriate sizes according to requirements. During cutting, the cutting grooves on the packaging pads can assist in cutting and positioning, improving the efficiency and accuracy of cutting. The heat-conducting layer on the outside of the wafers can quickly conduct heat out of the wafers and discharge it through the heat dissipation holes of the heat dissipation grooves. This structure realizes the functions of easy cutting and heat dissipation. Attached Figure Description
[0018] Figure 1 This is a frontal cross-sectional view of the present invention.
[0019] Figure 2 This is a front view schematic diagram of the wafer structure of this utility model;
[0020] Figure 3 For the present utility model Figure 1 Enlarged structural diagram at point A in the middle;
[0021] Figure 4 This is a top view of the protective layer structure of this utility model.
[0022] In the diagram: 1. Packaging pad; 2. Packaging layer; 3. Wafer; 4. Cutting groove; 5. Buffer protection layer; 6. Thermal conductive layer; 7. Reserved slot; 8. Connection pin; 9. Mounting piece; 10. Chip soldering layer; 11. Connector block; 12. Pin connection slot; 13. Heat dissipation groove; 14. Heat dissipation hole. Detailed Implementation
[0023] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0024] Please see Figures 1-4 An embodiment of this utility model provides: an integrated circuit wafer with a reinforced packaging structure, including a packaging pad 1 and a wafer 3. The wafer 3 is mounted on the packaging pad 1. A thermally conductive layer 6 is disposed above the wafer 3. A buffer protection layer 5 is disposed above the thermally conductive layer 6. A packaging layer 2 is disposed above the buffer protection layer 5. Cutting grooves 4 are uniformly disposed on the packaging pad 1. A reserved groove 7 is disposed at the bottom end of the packaging pad 1. A connection pin 8 is fixedly connected to the packaging pad 1. A mounting piece 9 is disposed at the bottom end of the packaging pad 1. A chip bonding layer 10 is fixedly connected to the bottom end of the mounting piece 9. A connection block 11 is fixedly connected to the top end of the mounting piece 9. A pin connection groove 12 is disposed inside the connection block 11.
[0025] The top of the connecting pin 8 is connected to the wafer 3, and the bottom of the connecting pin 8 is embedded in the pin connection groove 12. The top of the mounting plate 9 is provided with an adhesive layer, and the top of the mounting plate 9 is bonded and fixed to the bottom of the encapsulation pad 1.
[0026] Specifically, such as Figure 1 , Figure 2 and Figure 3As shown, after the packaged wafer 3 is divided into appropriate sizes, it can be connected to the circuit board. During connection, the mounting plate 9 can be directly used to install it on the circuit board. The chip soldering layer 10 at the bottom of the mounting plate 9 facilitates direct soldering connection. The connection pin 8 is inserted into the pin connection slot 12 for conductive connection. Alternatively, the connection pin 8 can be used directly for installation. Before installation, the mounting plate 9 is removed from the bottom of the packaging pad 1, and then the connection pin 8 can be directly used for soldering.
[0027] The thermal conductive layer 6 is made of semiconductor silicon material and is connected to the encapsulation pad 1. The buffer protection layer 5 is made of aluminum oxide material and has vent holes uniformly arranged inside the buffer protection layer 5.
[0028] Specifically, such as Figure 1 and Figure 2 As shown, the bottom of the wafer 3 is protected by the encapsulation pad 1, and the top of the wafer 3 is rapidly heated by the thermal conductive layer 6. The buffer protective layer 5 outside the thermal conductive layer 6 not only has the effect of buffer protection but also has the effect of insulation. The encapsulation layer 2 outside the buffer protective layer 5 improves the support strength after encapsulation and prevents external objects from directly scratching the wafer 3.
[0029] Cutting grooves 4 are provided on both sides of wafer 3, and heat dissipation grooves 13 are provided on the top of encapsulation layer 2. Heat dissipation holes 14 are uniformly provided inside the heat dissipation grooves 13.
[0030] Specifically, such as Figure 1 and Figure 4 As shown, wafers 3 are regularly mounted on packaging pads 1. After packaging, wafers 3 can be cut into appropriate sizes as needed. During cutting, the cutting grooves 4 on the packaging pads 1 can assist in cutting and positioning, improving the efficiency and accuracy of cutting. The heat-conducting layer 6 on the outside of wafers 3 can quickly conduct heat out of wafers 3 and discharge it through the heat dissipation holes 14 of the heat dissipation grooves 13.
[0031] Working principle: After the packaged wafer 3 is divided into appropriate sizes, it can be connected to the circuit board. During connection, the mounting plate 9 can be directly used to mount it onto the circuit board. The chip soldering layer 10 on the bottom of the mounting plate 9 facilitates direct soldering. The connection pins 8 are inserted into the pin connection slots 12 for conductive connection. Alternatively, the connection pins 8 can be used directly for mounting. Before installation, the mounting plate 9 should be removed from the bottom of the packaging pad 1, and then the connection pins 8 can be used for soldering. After packaging, the wafer 3 can be cut to appropriate sizes as needed. During cutting, the cutting grooves 4 on the packaging pad 1 can assist in the cutting process. Cutting and positioning improves cutting efficiency and accuracy. The heat-conducting layer 6 on the outside of the wafer 3 can quickly conduct heat out of the wafer 3 and discharge it through the heat dissipation holes 14 of the heat dissipation groove 13. The bottom of the wafer 3 is protected by the encapsulation pad 1, and the top of the wafer 3 achieves rapid heat conduction through the heat-conducting layer 6. The buffer protection layer 5 outside the heat-conducting layer 6 not only has the effect of buffer protection but also has the effect of insulation. The encapsulation layer 2 outside the buffer protection layer 5 improves the support strength after encapsulation and prevents external objects from directly scratching the wafer 3. This structure realizes the function of easy enhancement of protection.
[0032] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.
Claims
1. An integrated circuit wafer having a reinforced package structure comprising a package pad (1) and a wafer sheet (3), characterized in that: The wafer (3) is mounted on the packaging gasket (1), a heat-conducting layer (6) is arranged above the wafer (3), a buffer protection layer (5) is arranged above the heat-conducting layer (6), a packaging layer (2) is arranged above the buffer protection layer (5), the packaging gasket (1) is uniformly provided with a cutting groove (4), the bottom end of the packaging gasket (1) is provided with a reserved groove (7), the packaging gasket (1) is fixedly connected with a connecting pin (8), the bottom end of the packaging gasket (1) is provided with a mounting sheet (9), the bottom end of the mounting sheet (9) is fixedly connected with a chip welding layer (10), the top end of the mounting sheet (9) is fixedly connected with a connecting block (11), and the connecting block (11) is internally provided with a pin connecting groove (12).
2. The integrated circuit wafer having a strengthened package structure of claim 1, wherein: The top end of the connecting pin (8) is connected with the wafer (3).
3. The integrated circuit wafer having a strengthened package structure of claim 1, wherein: The bottom end of the connecting pin (8) is embedded in the inside of the pin connecting groove (12).
4. The integrated circuit wafer having a strengthened package structure of claim 1, wherein: The top end of the mounting sheet (9) is provided with an adhesive layer, and the top end of the mounting sheet (9) is adhesively fixed to the bottom end of the packaging gasket (1).
5. An integrated circuit wafer with a reinforced packaging structure according to claim 1, characterized in that: The heat-conducting layer (6) is made of semiconductor silicon material, and the heat-conducting layer (6) is connected with the packaging gasket (1).
6. The integrated circuit wafer having a strengthened package structure of claim 1, wherein: The buffer protection layer (5) is made of aluminum oxide material, and the buffer protection layer (5) is uniformly provided with exhaust holes in the inside.
7. The integrated circuit wafer having a strengthened package structure of claim 1, wherein: The cutting groove (4) is arranged on both sides of the wafer (3).
8. The integrated circuit wafer having a strengthened package structure of claim 1, wherein: The top end of the packaging layer (2) is provided with a heat dissipation groove (13), and the inside of the heat dissipation groove (13) is uniformly provided with heat dissipation holes (14).