Multi-channel impedance measurement circuit and device

Abstract

The utility model discloses a multichannel impedance measurement circuit and equipment. The multichannel impedance measurement circuit comprises a DAC module, a channel sub-module, a first chip selection module, a second chip selection module, an operational amplifier module, an ADC module and a comparator module. The DAC module is provided with a plurality of output channels; the channel sub-module is provided with a constant current loop, a constant current output interface and a signal acquisition interface, the constant current loop is provided with a plurality of resistance voltage dividing branches, the resistance voltage dividing branches are all connected to a first gating unit and a second gating unit, and the second gating unit is connected to the constant current output interface; the first chip selection module is respectively connected to the first gating units of the plurality of channel sub-modules; the second chip selection module is connected to the signal acquisition interfaces of the plurality of channel sub-modules; the operational amplifier module is connected to the first chip selection module and the second chip selection module, the ADC module is connected with the operational amplifier module, and the comparator module is connected to the operational amplifier module and a preset signal end. Therefore, multi-channel parallel testing can be supported, multiple testing scenes can be met, and dynamic impedance can be monitored.

Description

TECHNICAL FIELD

[0001] The utility model relates to impedance test technical field, especially in a kind of multi-channel impedance measurement circuit and equipment. BACKGROUND

[0002] With the rapid development of electronic technology, the complexity and diversity of system are increasing, and the integration of electronic products is higher and higher, and the functionality is also more and more powerful, and the impedance test and precision of PCBA of consumer electronics product are higher requirements. The impedance test scheme of the related art has the following disadvantages: few test channels, test channels are not scalable, cannot be tested in parallel, test precision is not high, and only static impedance can be tested, and dynamic impedance cannot be monitored. UTILITY MODEL CONTENT

[0003] The utility model aims at at least one of the technical problems existing in prior art. To this end, the utility model provides a kind of multi-channel impedance measurement circuit and equipment, which can support multi-channel parallel test, meet multiple test scenarios, and monitor dynamic impedance.

[0004] In one aspect, the utility model embodiment provides a kind of multi-channel impedance measurement circuit, comprising:

[0005] DAC module is connected with signal input end, and the DAC module is provided with multiple output channels;

[0006] Multiple channel sub-modules, each channel sub-module is connected to one output channel, and the channel sub-module is provided with constant current loop, constant current output interface and signal acquisition interface, a plurality of resistance voltage division branches are provided on the constant current loop, the plurality of resistance voltage division branches are connected to first gating unit and second gating unit, and the output end of the second gating unit is connected to the constant current output interface;

[0007] First chip selection module, multiple input ends are connected to the first gating unit of the plurality of channel sub-modules respectively;

[0008] Second chip selection module, multiple input ends are connected to the signal acquisition interface of the plurality of channel sub-modules respectively;

[0009] Operational amplifier module, multiple input ends are connected to the output end of the first chip selection module and the second chip selection module respectively;

[0010] ADC module, input end is connected with the output end of the operational amplifier module, and the output end of the ADC module is connected to the signal input end;

[0011] Comparator module, input end is connected to the output end of the operational amplifier module and preset signal end, and the output end of the comparator module is connected to the signal input end.

[0012] According to some embodiments of the present application, a signal amplification unit is further arranged on the constant current loop, an input end of the signal amplification unit is connected with an output channel of the DAC module, and an output end of the signal amplification unit is connected with the plurality of resistance voltage division branches.

[0013] According to some embodiments of the present application, a switch control unit is further arranged on the constant current loop, a first end of the switch control unit is connected with the constant current output interface, a second end of the switch control unit is connected with the reference voltage end, and a control end of the switch control unit is connected with the output channel of the DAC module.

[0014] According to some embodiments of the present application, the switch control unit comprises an operational amplifier subunit and a MOS tube subunit, an input end of the operational amplifier subunit is connected with the output channel of the DAC module, and an output end of the operational amplifier subunit is connected with a control end of the MOS tube subunit.

[0015] According to some embodiments of the present application, the resistance voltage division branch comprises a plurality of voltage division resistors, and the plurality of voltage division resistors are connected in parallel with the second gating unit.

[0016] According to some embodiments of the present application, the first gating unit has a plurality of groups of input ends, and each group of input ends of the first gating unit is connected in parallel with a corresponding voltage division resistor.

[0017] According to some embodiments of the present application, the first piece selection module comprises a third gating unit and a fourth gating unit, a plurality of input ends of the third gating unit and the fourth gating unit are respectively connected with the first gating unit of the plurality of channel submodules, and output ends of the third gating unit and the fourth gating unit are both connected with the operational amplifier module.

[0018] According to some embodiments of the present application, the second piece selection module comprises a fifth gating unit and a sixth gating unit, a plurality of input ends of the fifth gating unit and the sixth gating unit are respectively connected with the signal acquisition interface of the plurality of channel submodules, and output ends of the fifth gating unit and the sixth gating unit are both connected with the operational amplifier module.

[0019] According to some embodiments of the present application, the signal input end integrates a plurality of general signal interfaces.

[0020] On the other hand, the embodiment of the present application provides a multi-channel impedance test device comprising the multi-channel impedance measurement circuit.

[0021] The embodiment of the present application has at least the following beneficial effects:

[0022] The DAC module is connected with multiple channel sub-modules, supports multiple-channel parallel testing, and is beneficial to improve testing efficiency; each channel sub-module is provided with a constant current loop and multiple resistance voltage division branches, and a constant current and resistance voltage division mode is adopted to meet multiple testing scenarios, which is beneficial to improve testing precision; the signal acquisition interface of the channel sub-module is used to acquire signals of the target product and process through the operational amplifier module and the comparator module, and the dynamic impedance of the target product can be monitored.

[0023] The additional aspects and advantages of the present application will be partially given in the following description, and some will become apparent from the following description, or be understood through the practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0024] The above and / or additional aspects and advantages of the present application will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:

[0025] Figure 1 The figure is a principle block diagram of the multi-channel impedance measurement circuit of the embodiments of the present application.

[0026] Reference signs:

[0027] DAC module 100, channel sub-module 200, resistance voltage division branch 210, first gating unit 220, second gating unit 230, signal amplification unit 240, switch control unit 250, first chip selection module 300, second chip selection module 400, operational amplifier module 500, ADC module 600, comparator module 700. DETAILED DESCRIPTION

[0028] The embodiments of the present application will be described in detail below, and examples of the embodiments are shown in the drawings, in which the same or similar reference signs represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0029] In the description of the present application, the meaning of "several" is one or more, the meaning of "multiple" is two or more, greater than, less than, more than, etc. are understood as not including the number, "above", "below", "within", etc. are understood as including the number. If there is a description of "first", "second", etc. is only used to distinguish technical features for the purpose, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or implicitly indicating the sequence of indicated technical features.

[0030] In the description of the utility model, unless otherwise explicitly limited, the words such as '' set '' '' connect '' should be understood broadly, and the person skilled in the art can determine the specific meaning of the above words in the utility model in combination with the specific content of the technical scheme.

[0031] The embodiment discloses a kind of multi-channel impedance measurement equipment, including multi-channel impedance measurement circuit. Figure 1 , multi-channel impedance measurement circuit includes DAC module 100, channel submodule 200, first chip selection module 300, second chip selection module 400, operational amplifier module 500, ADC module 600 and comparator module 700, wherein DAC is digital-to-analog converter, ADC is analog-to-digital converter. DAC module 100 is connected with signal input end, and signal input end can be the output end of upper control module, and upper control module can use single-chip microcomputer, microprocessor and the like integrated circuit with logic processing capability. DAC module 100 is provided with multiple output channels, for example, DAC module 100 includes first DAC unit (as shown in the figure marked DAC#1) and second DAC unit (as shown in the figure marked DAC#2), first DAC unit and second DAC unit both have 8 output pins, and every two output pins (such as pin mark VOUTA_CH1 and pin mark VOUTB_CH1) form an output channel, so that 16 output pins can form 8 output channels. The number of channel submodule 200 is multiple, and the embodiment takes 8 as an example (as shown in the figure marked CH#1, CH#2... CH#8), each channel submodule 200 is connected to an output channel, and channel submodule 200 is provided with constant current loop, constant current output interface and signal acquisition interface, a plurality of resistance voltage division branches 210 are provided on constant current loop, a plurality of resistance voltage division branches 210 are connected to first gating unit 220 and second gating unit 230, the output end of second gating unit 230 is connected to constant current output interface, a plurality of input ends of first chip selection module 300 are connected to the first gating unit 220 of a plurality of channel submodules 200, a plurality of input ends of second chip selection module 400 are connected to the signal acquisition interface of a plurality of channel submodules 200, a plurality of input ends of operational amplifier module 500 are connected to the output end of first chip selection module 300 and second chip selection module 400, the input end of ADC module 600 is connected with the output end of operational amplifier module 500, the output end of ADC module 600 is connected to signal input end, the input end of comparator module 700 is connected to the output end of operational amplifier module 500 and preset signal end (as shown in the figure marked DACA), the output end of comparator module 700 is connected to signal input end.

[0032] The DAC module 100 is used for digital-to-analog conversion of a signal from an upper control module and output to a corresponding channel sub-module 200 through a corresponding output channel. The channel sub-module 200 is provided with a constant current loop and a constant current output interface for connecting a target product to be tested (indicated by DUT in the figure), can support multi-channel parallel testing, and is beneficial to improve the testing efficiency. Each channel sub-module 200 is provided with a constant current loop and a plurality of resistance voltage division branches 210. The second gating unit 230 can be controlled to switch different resistance voltage division branches 210 according to the resistance value of different target products, accurately match target products with different resistance values, and adopt a constant current and resistance voltage division mode to meet various testing scenarios, which is beneficial to improve the testing accuracy. The first gating unit 220 collects signals of the resistance voltage division branches 210 and inputs them to the upper control module through the third chip selection module, the operational amplifier module 500 and the ADC module 600 to realize feedback regulation and further improve the testing accuracy. The signal collection interface of the channel sub-module 200 is used for collecting signals of the target product and processing them through the operational amplifier module 500 and the comparator module 700, so as to monitor the dynamic impedance of the target product and monitor the maximum change of the impedance.

[0033] In actual application, the multi-channel impedance measurement circuit can be integrated on the same circuit board to form a board card level integrated module. The board card level integrated module is connected to the upper control module through a signal input end, supports board card expansion, and meets more channel requirements.

[0034] The signal amplification unit 240 is further arranged on the constant current loop. The input end of the signal amplification unit 240 is connected to the output channel of the DAC module 100, and the output end of the signal amplification unit 240 is connected to the plurality of resistance voltage division branches 210. The signal amplification unit 240 collects an operational amplifier integrated circuit and is used for signal amplification to drive the subsequent circuit.

[0035] The switch control unit 250 is further arranged on the constant current loop. The first end of the switch control unit 250 is connected to the constant current output interface, the second end of the switch control unit 250 is connected to the reference voltage end, and the control end of the switch control unit 250 is connected to the output channel of the DAC module 100. The switch control unit 250 is used for output control of the constant current loop according to the output signal of the DAC module 100, so as to realize constant current output control.

[0036] The switch control unit 250 includes an operational amplifier sub-unit (indicated by U2) and a MOS tube sub-unit (indicated by Q1). The input end of the operational amplifier sub-unit is connected to the output channel of the DAC module 100, and the output end of the operational amplifier sub-unit is connected to the control end of the MOS tube sub-unit. The operational amplifier sub-unit is used for controlling the MOS tube sub-unit to adjust the output value of the constant current loop.

[0037] The resistance voltage dividing branch 210 includes a plurality of voltage dividing resistors connected in parallel to the second gating unit 230. As shown in the resistors R1, R2, R3 and R4, each resistor corresponds to a different gear, and the resistance value of the different gears can be switched according to the different resistance values of the target product, so as to accurately match different target products and improve the test accuracy.

[0038] The first gating unit 220 has a plurality of groups of input terminals, and each group of input terminals of the first gating unit 220 is connected in parallel to a corresponding voltage dividing resistor. When the resistance voltage dividing branch 210 switches to different voltage dividing resistors, the first gating unit 220 can be switched to the corresponding voltage dividing resistor to collect the voltage signal across the corresponding voltage dividing resistor and output to the first chip selection module 300, thereby achieving accurate voltage detection and feedback regulation.

[0039] The first chip selection module 300 includes a third gating unit (labeled as MUX3 in the figure) and a fourth gating unit (labeled as MUX4 in the figure), and a plurality of input terminals of the third gating unit and the fourth gating unit are connected to the first gating units 220 of the plurality of channel sub-modules 200, and the output terminals of the third gating unit and the fourth gating unit are connected to the operational amplifier module 500. The first gating unit 220 has a positive output terminal and a negative output terminal, and the positive output terminal and the negative output terminal of the first gating unit 220 are connected to the first chip selection module 300. In order to match the number of positive and negative output terminals of the first gating units 220 of the plurality of channel sub-modules 200, the first chip selection module 300 includes the third gating unit and the fourth gating unit, and the third gating unit and the fourth gating unit have the same number of pins to meet the signal transmission requirements of different channel sub-modules 200.

[0040] The second chip selection module 400 includes a fifth gating unit (labeled as MUX5 in the figure) and a sixth gating unit (labeled as MUX6 in the figure), and a plurality of input terminals of the fifth gating unit and the sixth gating unit are connected to the signal collection interfaces of the plurality of channel sub-modules 200, and the output terminals of the fifth gating unit and the sixth gating unit are connected to the operational amplifier module 500. Each signal collection interface has a positive signal terminal and a negative signal terminal, and each channel sub-module 200 is provided with a signal collection interface, and the fifth gating unit and the sixth gating unit have the same number of pins to meet the signal transmission requirements of the signal collection interfaces.

[0041] The signal input end integrates various general signal interfaces, for example, the DAC module 100 and the ADC module 600 both communicate with the upper control module through SPI signals, and the comparator module 700 communicates with the upper control module through GPIO (general input and output interface), the integration of the SPI interface and the GPIO interface in the signal input end can meet the communication requirements between different modules, and the SPI interface and the GPIO interface are both general interfaces, the channels can be expanded according to the requirements, and the application requirements can be met.

[0042] The embodiments of the utility model are explained in detail above in combination with the drawings, but the utility model is not limited to the above-mentioned embodiments, and various changes can be made within the knowledge range possessed by the ordinary skilled in the art without departing from the purpose of the utility model.

Claims

1. A multi-channel impedance measurement circuit, characterized by, The application relates to a signal input terminal, which comprises the following parts: a DAC module (100) connected with a signal input terminal, wherein the DAC module (100) is provided with multiple output channels; multiple channel sub-modules (200), each of which is connected with one of the output channels, wherein the channel sub-module (200) is provided with a constant current loop, a constant current output interface and a signal acquisition interface, the constant current loop is provided with multiple resistance voltage division branches (210), the multiple resistance voltage division branches (210) are connected with a first gating unit (220) and a second gating unit (230), and the output end of the second gating unit (230) is connected with the constant current output interface; a first chip selection module (300) with multiple input ends connected with the first gating units (220) of the multiple channel sub-modules (200); a second chip selection module (400) with multiple input ends connected with the signal acquisition interfaces of the multiple channel sub-modules (200); an operational amplifier module (500) with multiple input ends connected with the output ends of the first chip selection module (300) and the second chip selection module (400); an ADC module (600) with an input end connected with the output end of the operational amplifier module (500), wherein the output end of the ADC module (600) is connected with the signal input terminal; a comparator module (700) with input ends connected with the output end of the operational amplifier module (500) and a preset signal end, wherein the output end of the comparator module (700) is connected with the signal input terminal.

2. The multi-channel impedance measurement circuit of claim 1, wherein, The constant current loop is further provided with a signal amplification unit (240), the input end of the signal amplification unit (240) is connected with the output channel of the DAC module (100), and the output end of the signal amplification unit (240) is connected with the multiple resistance voltage division branches (210).

3. The multi-channel impedance measurement circuit of claim 1 or 2, wherein, The constant current loop is further provided with a switch control unit (250), the first end of the switch control unit (250) is connected with the constant current output interface, the second end of the switch control unit (250) is connected with a reference voltage end, and the control end of the switch control unit (250) is connected with the output channel of the DAC module (100).

4. The multi-channel impedance measurement circuit of claim 3, wherein, The switch control unit (250) comprises an operational amplifier sub-unit and a MOS tube sub-unit, the input end of the operational amplifier sub-unit is connected with the output channel of the DAC module (100), and the output end of the operational amplifier sub-unit is connected with the control end of the MOS tube sub-unit.

5. The multi-channel impedance measurement circuit of claim 1, wherein, The resistance voltage division branch (210) comprises multiple voltage division resistors, and the multiple voltage division resistors are connected in parallel with the second gating unit (230).

6. The multi-channel impedance measurement circuit of claim 5, wherein, The first gating unit (220) has multiple groups of input ends, and each group of input ends of the first gating unit (220) is connected in parallel with the corresponding voltage division resistor.

7. The multi-channel impedance measurement circuit of claim 1, wherein, The first piece select module (300) comprises a third gating unit and a fourth gating unit, a plurality of input ends of the third gating unit and the fourth gating unit are connected to the first gating unit (220) of the plurality of channel sub-modules (200) respectively, and output ends of the third gating unit and the fourth gating unit are connected to the operational amplifier module (500).

8. The multi-channel impedance measurement circuit of claim 1 or 7, wherein, The second piece select module (400) comprises a fifth gating unit and a sixth gating unit, a plurality of input ends of the fifth gating unit and the sixth gating unit are connected to the signal acquisition interface of the plurality of channel sub-modules (200) respectively, and output ends of the fifth gating unit and the sixth gating unit are connected to the operational amplifier module (500).

9. The multi-channel impedance measurement circuit of claim 1, wherein, The signal input end integrates a plurality of general signal interfaces.

10. A multi-channel impedance test device, characterized by, A multichannel impedance measurement circuit comprising any one of claims 1 to 9.

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