Electrical testing board of spliced large board

By setting dummy terminals on the electrical testing board and adjusting their arrangement, the problem of difficulty in distinguishing between display panels of similar sizes and models was solved, thus improving the efficiency of classification and placement after electrical testing.

CN224137393UActive Publication Date: 2026-04-17TRULY (RENSHOU) HIGH-END DISPLAY TECH LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
TRULY (RENSHOU) HIGH-END DISPLAY TECH LTD
Filing Date
2025-03-18
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

In the existing technology, when performing electrical tests on the display panels on the large board, it is difficult to distinguish between display panels of different models with similar sizes, resulting in reduced production efficiency.

Method used

A dummy terminal is set on the electrical test terminal block of the electrical test board, and the arrangement order of the dummy terminal, the gate drive terminal, and each pixel drive terminal is adjusted so that each order corresponds to a display panel of a certain model, so that they can be classified and placed after testing.

Benefits of technology

By setting and arranging the virtual terminals, different models of display panels can be effectively distinguished, thus improving work efficiency.

✦ Generated by Eureka AI based on patent content.

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  • Figure CN224137393U_ABST
    Figure CN224137393U_ABST
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Abstract

The utility model discloses an electrical testing board of a spliced large board. The electrical testing board comprises an electrical testing circuit and a testing terminal strip. The electrical measurement circuit is led out from each pixel circuit of the display panel of the corresponding model and is used for performing electrical measurement on pixels; the test terminal strip comprises a grid driving end, an R pixel driving end, a G pixel driving end and a B pixel driving end; the grid electrode driving end is used for being electrically connected with a pixel grid electrode of each pixel circuit, and the R pixel driving end, the G pixel driving end and the B pixel driving end are electrically connected with a source electrode of each corresponding pixel. The virtual end is arranged on the electrical testing terminal row of the electrical testing board, the virtual end is suspended, the arrangement sequence of the virtual end, the gate driving end and each pixel driving end is adjusted, and each sequence corresponds to a display panel of one model in a spliced large board, so that small display panels of various models can be placed in a classified manner after testing; and the working efficiency is improved.
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Description

Technical Field

[0001] This utility model relates to the field of electrical testing technology for liquid crystal display panels, and particularly to an electrical testing board for splicing large panels. Background Technology

[0002] To improve the utilization rate of large display panels, current display devices typically employ a panelizing design on the same large panel to avoid waste. The panels can be of the same model or different models. During the manufacturing process, electrical testing is performed to identify defective products and prevent them from entering subsequent processes, thus avoiding material waste.

[0003] Electrical testing of each pixel on the display panel is a crucial step in ensuring the quality and performance of the display screen. This involves checking the electrical performance of each pixel, such as whether it can emit light normally, whether the brightness is uniform, whether the color is accurate, and whether there are any short circuits or open circuits, to guarantee the display's effect and stability. By inputting specific electrical signals, the system checks whether each pixel can light up normally, identifying and eliminating dead pixels. The brightness and color of pixels at different locations are measured to ensure brightness and color consistency across the entire screen.

[0004] After electrical testing is completed, different displays need to be placed separately. If the two displays are different models but have similar size and perimeter, it is difficult to distinguish them, which reduces production efficiency. Utility Model Content

[0005] In the existing technology, when electrical testing is performed on the display panels on a large board, it is difficult to distinguish between display panels of different models with similar sizes after the test is completed.

[0006] To address the aforementioned issues, an electrical test board for splicing large panels is proposed. By setting dummy terminals on the electrical test terminal blocks of the electrical test board and suspending the dummy terminals, the arrangement order of the dummy terminals, the gate driving terminals, and the individual pixel driving terminals is adjusted. Each order corresponds to a display panel of a certain model in the splicing large panel. Thus, after testing, the display panel boards of various models can be classified and placed, improving work efficiency.

[0007] An electrical testing board for splicing large panels, comprising:

[0008] Electrical testing circuit and test terminal block;

[0009] The electrical testing circuit is drawn from each pixel circuit of the corresponding model display panel and is used to perform electrical testing on the pixels;

[0010] The test terminal block includes a gate driving terminal, an R pixel driving terminal, a G pixel driving terminal, and a B pixel driving terminal;

[0011] The gate driving terminal is used to be electrically connected to the pixel gate of each pixel circuit, and the R pixel driving terminal, G pixel driving terminal and B pixel driving terminal are respectively electrically connected to the source of each corresponding pixel.

[0012] The test terminal block also includes a dummy terminal, which is suspended and disposed on the test terminal block.

[0013] In the first possible embodiment of the electrical test board of the splicing large board described in this utility model, the dummy terminal is located on the left or right side of the gate driving terminal and is arranged sequentially from left to right on the test terminal block.

[0014] In the second possible embodiment of the electrical test board of the splicing large board described in this utility model, the virtual terminal is located on the left or right side of the R pixel driving terminal, G pixel driving terminal or B pixel driving terminal, and is arranged sequentially from left to right on the test terminal block.

[0015] In conjunction with the second possible implementation of this utility model, in the third possible implementation, the gates of each row of pixels in the pixel circuit are connected in parallel to the connection line of the gate driving terminal, and the gate driving terminal is used to input a high level to the gate of each pixel to drive the pixel.

[0016] In conjunction with the third and fourth possible embodiments of this utility model, the source of each row of R pixels in the pixel circuit is electrically connected to the connection line of the R pixel driving terminal, and the gate driving terminal is used to write data to the source of each R pixel to test the R pixel.

[0017] In conjunction with the fourth and fifth possible embodiments of this utility model, the source of each row of G pixels in the pixel circuit is electrically connected to the connection line of the G pixel driving terminal, and the gate driving terminal is used to write data to the source of each G pixel to test the G pixel.

[0018] In conjunction with the fifth and sixth possible embodiments of this utility model, the source of each row of B pixels in the pixel circuit is electrically connected to the connection line of the B pixel driving terminal, and the gate driving terminal is used to write data to the source of each B pixel to test the B pixel.

[0019] The electrical test board for the splicing large board described in this utility model has a virtual terminal set on the electrical test terminal block. The virtual terminal is suspended and the arrangement order of the virtual terminal, the gate driving terminal and each pixel driving terminal is adjusted. Each order corresponds to a display panel of a certain model in the splicing large board. After testing, the display panel small boards of each model can be classified and placed, which improves work efficiency. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of the display panel layout of the splicing large panel in this application;

[0022] Figure 2 This is a schematic diagram of the test terminal block layout of the first type of display panel in the splicing large board of this application;

[0023] Figure 3 This is a schematic diagram of the electrical measurement circuit of the first type of display panel in the splicing board of this application;

[0024] Figure 4 This is a schematic diagram of the test terminal block layout for the second type of display panel in the splicing panel of this application;

[0025] Figure 5 This is a schematic diagram of the electrical testing circuit for the second type of display panel in the splicing board of this application. Detailed Implementation

[0026] The technical solutions of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, and not all of them. Based on the embodiments of this utility model, other embodiments obtained by those skilled in the art without creative effort are all within the scope of protection of this utility model.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0028] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0029] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0030] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0031] In the existing technology, when electrical testing is performed on the display panels on a large board, it is difficult to distinguish between display panels of different models with similar sizes after the test is completed.

[0032] To address the above problems, an electrical measurement circuit for a display panel is proposed.

[0033] A type of large-panel electrical testing board, such as Figure 1 , Figure 1 This is a schematic diagram of the display panel layout of the splicing board in this application; it includes electrical testing circuits and test terminal blocks. The electrical testing circuits are led out from each pixel circuit of the corresponding model of display panel for performing electrical tests on the pixels. The test terminal blocks include a gate driver terminal VGG, an R pixel driver terminal, a G pixel driver terminal, and a B pixel driver terminal. The gate driver terminal VGG is used to electrically connect to the pixel gate of each pixel circuit, and the R pixel driver terminal, G pixel driver terminal, and B pixel driver terminal are respectively electrically connected to the source of each corresponding pixel. The test terminal blocks also include a dummy terminal DUMMY, which is left floating and is set on the test terminal blocks. By setting a dummy terminal DUMMY on the electrical testing terminal blocks of the electrical testing board, leaving the dummy terminal DUMMY floating, and adjusting the arrangement order of the dummy terminal DUMMY, the gate driver terminal VGG, and each pixel driver terminal, with each order corresponding to a model of display panel in the splicing board, the smaller display panel boards of each model can be classified and placed after testing, improving work efficiency.

[0034] like Figure 2 and Figure 4 , Figure 2 This is a schematic diagram of the test terminal block layout of the first type of display panel A-Panel in the splicing large panel of this application; Figure 4This is a schematic diagram of the test terminal block layout of the second type of display panel B-Panel in the splicing large board of this application; the dummy terminal DUMMY is located to the left or right of the gate driving terminal VGG, and is arranged sequentially from left to right on the test terminal block.

[0035] like Figure 2 The virtual DUMMY terminal is positioned to the right of the gate driver VGG. Figure 4 This design places the dummy terminal (DUMMY) to the left of the gate driver terminal (VGG). By swapping these two terminals, even if a first-type display panel (A-Panel) is placed in the electrical testing fixture for a second-type display panel (B-Panel), the gate driver terminal (VGG) will be the dummy terminal (DUMMY) (relative to the second-type display panel (B-Panel)). Therefore, the first-type display panel (A-Panel) cannot be lit up. In other words, the first-type display panel (A-Panel) can only be tested on its corresponding electrical testing fixture. Similarly, the second-type display panel (B-Panel) can only be tested on its corresponding electrical testing fixture. This prevents confusion between the two display models and improves work efficiency.

[0036] In some implementations, the virtual terminal DUMMY can also be set to the left or right of the R pixel driver, G pixel driver, or B pixel driver, and arranged sequentially from left to right on the test terminal block, corresponding to the corresponding electrical testing fixture, thereby distinguishing the display panels in more types of splicing boards.

[0037] like Figure 3 and Figure 5 , Figure 3 This is a schematic diagram of the electrical testing circuit for the A-Panel, the first type of display panel in the splicing board of this application. Figure 5 This is a schematic diagram of the electrical testing circuit for the second type of display panel (B-Panel) in the splicing large panel of this application. The gates of each row of pixels in the pixel circuit are connected in parallel to the connection line of the gate driving terminal VGG. The gate driving terminal VGG is used to input a high-level signal to the gate of each pixel to drive that pixel. The gate driving terminal VGG is used to provide a high-level signal.

[0038] like Figure 3 and Figure 5 In the pixel circuit, the source of each row of R pixels is electrically connected to the connection line of the R pixel driver terminal. The gate driver terminal VGG is used to write data to the source of each R pixel to test the R pixel.

[0039] like Figure 3 and Figure 5In the pixel circuit, the source of each row of G pixels is electrically connected to the connection line of the G pixel driver terminal. The gate driver terminal VGG is used to write data to the source of each G pixel to test the G pixel.

[0040] like Figure 3 and Figure 5 In the pixel circuit, the source of each row of B pixels is electrically connected to the connection line of the B pixel driving terminal. The gate driving terminal VGG is used to write data to the source of each B pixel to test the B pixel.

[0041] The electrical test board of the splicing large board of this utility model sets a dummy terminal DUMMY on the electrical test terminal block of the electrical test board, suspends the dummy terminal DUMMY, and adjusts the arrangement order of the dummy terminal DUMMY, the gate driving terminal VGG and each pixel driving terminal. Each order corresponds to a display panel of a certain model in the splicing large board. Thus, after testing, the small boards of each model of display panel can be classified and placed, which improves work efficiency.

[0042] The above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. An electrical measuring board for splicing large panels, characterized by, include: Electrical testing circuit and test terminal block; The electrical testing circuit is drawn from each pixel circuit of the corresponding model display panel and is used to perform electrical testing on the pixels; The test terminal block includes a gate driving terminal, an R pixel driving terminal, a G pixel driving terminal, and a B pixel driving terminal; The gate driving terminal is used to be electrically connected to the pixel gate of each pixel circuit, and the R pixel driving terminal, G pixel driving terminal and B pixel driving terminal are respectively electrically connected to the source of each corresponding pixel. The test terminal block also includes a dummy terminal, which is suspended and disposed on the test terminal block.

2. The electrical test board of claim 1, wherein, The dummy terminals are located on the left or right side of the gate drive terminal and are arranged sequentially from left to right on the test terminal block.

3. The electrical test board of claim 1, wherein, The virtual terminals are located to the left or right of the R pixel driver, G pixel driver, or B pixel driver, and are arranged sequentially from left to right on the test terminal block.

4. The electrical test board of the large panel according to claim 2 or 3, wherein The gates of each row of pixels in the pixel circuit are connected in parallel to the connection line of the gate driving terminal. The gate driving terminal is used to input a high level to the gate of each pixel to drive the pixel.

5. The electrical panel of claim 4, wherein, The source of each row of R pixels in the pixel circuit is electrically connected to the connection line of the R pixel driving terminal, and the gate driving terminal is used to write data to the source of each R pixel to test the R pixel.

6. The electrical panel of claim 5, wherein, The source of each row of G pixels in the pixel circuit is electrically connected to the connection line of the G pixel driving terminal, and the gate driving terminal is used to write data to the source of each G pixel to test the G pixel.

7. The electrical testing board for spliced ​​large panels according to claim 6, characterized in that, The source of each row of B pixels in the pixel circuit is electrically connected to the connection line of the B pixel driving terminal, and the gate driving terminal is used to write data to the source of each B pixel to test the B pixel.