Metal oxide varistor

By using an electrode structure with a nickel alloy seed layer and a copper capping layer in a metal oxide varistor, the problem of poor wettability between copper and ceramic surfaces is solved, achieving low-cost, high-performance electrode connection.

CN224137972UActive Publication Date: 2026-04-17DONGGUAN LITTELFUSE ELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
DONGGUAN LITTELFUSE ELECTRONICS CO LTD
Filing Date
2025-03-31
Publication Date
2026-04-17

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Abstract

A metal oxide varistor includes a metal oxide varistor chip, a first electrode disposed on a first side of the metal oxide varistor chip, and a second electrode disposed on a second side of the metal oxide varistor chip, wherein each of the first electrode and the second electrode includes a seed layer formed of a nickel alloy disposed directly on a surface of the metal oxide varistor chip and a capping layer formed of a metal disposed on the seed layer.
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Description

Technical Field

[0001] This disclosure generally relates to the field of circuit protection devices. More specifically, this disclosure relates to metal oxide varistors. Background Technology

[0002] Metal oxide varistors (MOVs) are voltage-dependent, nonlinear devices that provide transient voltage suppression in electronic circuits. MOVs exhibit high resistance at low voltages and low resistance at high voltages. When connected in parallel with protected circuit elements, MOVs can clamp voltage to a safe level when high transient voltages occur in the circuit. Therefore, MOVs absorb energy that could otherwise damage the protected components.

[0003] At its most basic, an MOV comprises an MOV chip formed from a material having voltage-dependent, nonlinear resistive characteristics as described above. The MOV chip is typically formed from a ceramic material (e.g., zinc oxide) and small amounts of other metal oxides (e.g., bismuth, cobalt, and manganese). Metal electrodes are applied to opposite sides of the MOV chip (e.g., via printing, sputtering deposition, etc.) to facilitate electrical connections of the MOVs within the circuit, such as electrical connections via conductive leads soldered to the electrodes.

[0004] Typically, MOV electrodes are formed from noble metals, such as silver. The surface energy of these metals is similar to that of the ceramics used in MOV chips, allowing the metal to adhere to the MOV chip surface in a continuous planar layer of desired thickness. However, the increasing cost of noble metals has led to a demand for alternative materials that can achieve similar or better performance at a lower cost. Copper would be a good candidate for this type of material, but its surface energy differs significantly from that of the ceramics used in MOV chips. This significant difference in surface energy results in poor wettability between the MOV chip and the copper surface. Therefore, when molten copper is applied to the MOV chip, the copper atoms lack sufficient surface tension to effectively diffuse and conform to the ceramic surface, resulting in the formation of isolated copper islands rather than a continuous, well-adhered layer.

[0005] It is precisely because of these and other considerations that this improvement will be useful. Utility Model Content

[0006] This utility model is provided to present the chosen concept in a simplified form, which is further described in the following detailed description. This utility model is not intended to identify key or essential features of the claimed subject matter, nor is it intended to serve as an aid in determining the scope of the claimed subject matter.

[0007] The metal oxide varistor according to an embodiment of the present disclosure includes a metal oxide varistor chip, a first electrode disposed on a first side of the metal oxide varistor chip, and a second electrode disposed on a second side of the metal oxide varistor chip, wherein each of the first electrode and the second electrode includes a seed layer formed of nickel alloy disposed directly on the surface of the metal oxide varistor chip and a capping layer formed of metal disposed on the seed layer.

[0008] The metal oxide varistor according to an embodiment of the present disclosure includes a metal oxide varistor chip, a first electrode disposed on a first side of the metal oxide varistor chip, and a second electrode disposed on a second side of the metal oxide varistor chip, wherein each of the first electrode and the second electrode includes a seed layer formed of nickel alloy disposed directly on the surface of the metal oxide varistor chip and a capping layer formed of metal disposed on the seed layer.

[0009] A method for manufacturing a metal oxide varistor according to an embodiment of the present disclosure includes providing a metal oxide varistor chip, forming electrodes on the surface of the metal oxide varistor chip, comprising: applying a seed layer formed of a nickel alloy on the surface of the metal oxide varistor chip; and applying a capping layer formed of metal on the seed layer. Attached Figure Description

[0010] The accompanying drawings illustrate exemplary aspects of this disclosure, including practical applications of its principles, as follows:

[0011] Figure 1 This is a side view showing a metal oxide varistor according to the present disclosure;

[0012] Figure 2 yes Figure 1 A cross-sectional view of the metal oxide varistor shown in the figure;

[0013] Figure 3 It shows the manufacturing process. Figure 1 and Figure 2 The flowchart shows a method for using a metal oxide varistor. Detailed Implementation

[0014] Embodiments of metal oxide varistors (MOVs) according to this disclosure and associated manufacturing methods will now be described more fully below with reference to the accompanying drawings. However, MOVs and associated methods may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will convey certain exemplary aspects of MOVs and associated methods to those skilled in the art.

[0015] Reference Figure 1 and Figure 2 The figures show a side view and a cross-sectional view of a metal oxide varistor 10 (hereinafter referred to as "MOV 10") according to an embodiment of the present disclosure. MOV 10 may include an MOV chip 12 having a conductive first electrode 14 and a second electrode 16 disposed on opposite first and second sides. MOV chip 12 may be formed from any MOV composition known in the art, such as a ceramic material (e.g., zinc oxide) mixed with a certain amount of one or more other metal oxides (e.g., bismuth, cobalt, and manganese). The present disclosure is not limited in this respect. MOV chip 12, as well as the first electrode 14 and the second electrode 16, are depicted in a circular shape, but this is not critical. It is contemplated that one or more of MOV chip 12 and the first electrode 14 and the second electrode 16 may have different shapes, such as rectangular, triangular, irregular shapes, etc., without departing from the scope of the present disclosure.

[0016] The first electrode 14 and the second electrode 16 may each include seed layers 14a, 16a and capping layers 14b, 16b, which are arranged in a stacked configuration in the aforementioned order. Seed layers 14a, 16a may be formed of a nickel alloy (e.g., an iron-nickel alloy) and may be directly disposed on the opposing surfaces of the MOV chip 12. In various embodiments, seed layers 14a, 16a may be applied to the MOV chip 12 using a sputtering process (e.g., magnetron sputtering) and may each have a thickness ranging from 0.01 micrometers to 2.00 micrometers. This disclosure is not limited in this respect. Nickel exhibits excellent wetting properties when applied to ceramics, ensuring strong adhesion between seed layers 14a, 16a and the MOV chip 12. Furthermore, the coefficient of thermal expansion of nickel is similar to that of the ceramic material of the MOV chip 12, thus reducing the risk of delamination of seed layers 14a, 16a due to thermal stress during operation of the MOV 10.

[0017] Capping layers 14b and 16b can be disposed on the respective seed layers 14a and 16a and can be formed of a metal different from the seed layers 14a and 16a. In various embodiments, capping layers 14b and 16b can be formed of non-precious metals (e.g., copper, tin, aluminum, etc.) and can each have a thickness ranging from 0.05 micrometers to 20.00 micrometers. This disclosure is not limited in this respect. In particular, copper has excellent thermal and electrical conductivity, ensuring good electrical performance of the MOV 10 when connected to a circuit. Therefore, capping layers 14b and 16b can effectively carry high currents and efficiently dissipate heat, contributing to the overall stability and reliability of the MOV 10.

[0018] Reference Figure 3A flowchart illustrating the method for manufacturing the aforementioned MOV 10 is shown. (Refer to...) Figure 1 and Figure 2 The method is described using MOV 10 shown.

[0019] exist Figure 3 Block 100 of the method shown can provide an MOV chip 12. The MOV chip can be formed from any MOV composition known in the art, such as a ceramic material (e.g., zinc oxide) mixed with a certain amount of one or more other metal oxides (bismuth, cobalt, and manganese, etc.). This disclosure is not limited in this respect. The MOV chip 12 is depicted as circular in shape, but this is not critical. It is conceivable that the MOV chip 12 can have different shapes, such as rectangular, triangular, irregular shapes, etc., without departing from the scope of this disclosure.

[0020] exist Figure 3 In block 110 of the method shown, an MOV chip 12 may be provided. The MOV chip 12 can be formed from any MOV composition known in the art, such as a ceramic material (e.g., zinc oxide) mixed with a certain amount of one or more other metal oxides (e.g., bismuth, cobalt, and manganese). This disclosure is not limited in this respect. The MOV chip 12 is depicted as circular in shape, but this is not critical. It is conceivable that the MOV chip 12 can have different shapes, such as rectangular, triangular, irregular shapes, etc., without departing from the scope of this disclosure.

[0021] exist Figure 3 In block 110 of the method shown, seed layers 14a and 16a can be directly applied to the opposing surfaces of the MOV chip 12. Seed layers 14a and 16a can be formed of a nickel alloy (e.g., an iron-nickel alloy) and can be applied to the MOV chip 12 using a sputtering process (e.g., magnetron sputtering). Each of the seed layers 14a and 16a can each have a thickness ranging from 0.01 micrometers to 2.00 micrometers. This disclosure is not limited in this respect. As mentioned above, nickel exhibits excellent wetting properties when applied to ceramics, ensuring strong adhesion between seed layers 14a and 16a and the MOV chip 12. Furthermore, the sputtering process used to apply the seed layers 14a and 16a allows for precise control over the deposition thickness and uniformity of the seed layers 14a and 16a.

[0022] exist Figure 3In block 120 of the method shown, capping layers 14b and 16b can be formed of a metal different from the seed layers 14a and 16a, and can be applied to the seed layers 14a and 16a using a sputtering process (e.g., magnetron sputtering). In various embodiments, capping layers 14b and 16b can be formed of non-precious metals (e.g., copper, tin, aluminum, etc.) and can each have a thickness ranging from 0.05 micrometers to 20.00 micrometers. This disclosure is not limited in this respect. As mentioned above, copper, in particular, has excellent thermal and electrical conductivity, ensuring good electrical performance of the MOV 10 when connected to a circuit. Therefore, capping layers 14b and 16b can effectively carry high currents and efficiently dissipate heat, contributing to the overall stability and reliability of the MOV 10.

[0023] When the first electrode 14 and the second electrode 16 are formed on the MOV chip 12 in the manner described above with respect to blocks 110 and 120, each of the seed layers 14a and 16a acts as a transition layer, seamlessly bonding the copper overlay layers 14b and 16b to the ceramic MOV chip 12. Furthermore, the seed layers 14a and 16a act as a barrier to prevent the copper overlay layers 14b and 16b from diffusing into the ceramic material of the MOV chip 12.

[0024] Those skilled in the art will appreciate the numerous advantages offered by the embodiments of this disclosure. Specifically, the above embodiments provide MOV electrodes that offer robust, reliable performance and can be manufactured at a much lower cost compared to conventional electrodes formed from precious metals.

[0025] As used herein, elements or steps described in the singular and beginning with the words “a” or “an” should be understood to not exclude plural elements or steps unless such exclusion is explicitly stated. Furthermore, references to “one embodiment” in this disclosure are not intended to be construed as excluding the existence of other embodiments also incorporated into the described features.

[0026] While this disclosure refers to certain embodiments, many modifications, alterations, and variations of the described embodiments are possible without departing from the field and scope of this disclosure as defined in the appended claims. Therefore, this disclosure is intended to be limited to the described embodiments, but rather to have the full scope defined by the language of the following claims and their equivalents.

Claims

1. A metal oxide varistor, characterized by, include: Metal oxide varistor chip; A first electrode and a second electrode, wherein the first electrode is disposed on a first side of the metal oxide varistor chip, and the second electrode is disposed on a second side of the metal oxide varistor chip, wherein each of the first electrode and the second electrode comprises: A seed layer made of nickel alloy is directly disposed on the surface of the metal oxide varistor chip; and A metal covering layer disposed on the seed layer.

2. The metal oxide varistor of claim 1, wherein, The seed layer is formed of an iron-nickel alloy.

3. The metal oxide varistor of claim 1, wherein, The coating is formed of a non-precious metal.

4. The metal oxide varistor of claim 3, wherein, The coating is formed from one of copper, tin, and aluminum.

5. The metal oxide varistor of claim 1, wherein, The seed layer has a thickness ranging from 0.01 micrometers to 2.00 micrometers.

6. The metal oxide varistor of claim 1, wherein, The covering layer has a thickness ranging from 0.05 micrometers to 20.00 micrometers.